From nobody Mon Oct 6 06:37:39 2025 Received: from newagemicro-plesk-3-1.smartt.com (newagemicro-plesk-3-1.smartt.com [69.31.177.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5980B1EB5DD; Wed, 23 Jul 2025 15:43:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=69.31.177.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753285408; cv=none; b=EBT4E15LAYBiYnnrQqVbX9uBmo2HOTEGH9y0vbIFYv8r8rnDH3ARDNiyUFgxEw3JY/sYbDNbMegtyq64eqgIPfBGJtf92lXgAxXtvb0DXBMC8+QOcppILHrDaAixf9Ri5nGBhuegt2aQkRn/AHYvUf5t2fDZayWDsKnPtNs4ng4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753285408; c=relaxed/simple; bh=HLBhb0LCd8+Yi56PywxWCtCAYIqK7E4jdeG5yM0dzLA=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Me3mfHsfkiaNM043QAk20ntZ3B6IKI+n4qJI+38qgxy4ByUH52rmX9ukiXySTUFoDOTTbkQ2zyAsBsGGPasSCWBVcQgnGdFC1sbpI5wy+3Hv34ghip5yoDbum3Z/Q13bErRR31ajDsljNrN6Rpm/hvJW1m900d9ERiE+9lTN+k0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=newagemicro.com; spf=pass smtp.mailfrom=newagemicro.com; arc=none smtp.client-ip=69.31.177.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=newagemicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=newagemicro.com Received: from newagemicro-plesk-3-1.smartt.com (localhost.localdomain [127.0.0.1]) by newagemicro-plesk-3-1.smartt.com (Postfix) with ESMTP id 65B2CE36CC; Wed, 23 Jul 2025 08:36:01 -0700 (PDT) Authentication-Results: newagemicro-plesk-3-1.smartt.com; spf=pass (sender IP is 127.0.0.1) smtp.mailfrom=msobchuk@newagemicro.com smtp.helo=newagemicro-plesk-3-1.smartt.com Received-SPF: pass (newagemicro-plesk-3-1.smartt.com: localhost is always allowed.) client-ip=127.0.0.1; envelope-from=msobchuk@newagemicro.com; helo=newagemicro-plesk-3-1.smartt.com; X-Virus-Scanned: amavis at example.com X-Spam-Flag: NO X-Spam-Score: -2.9 X-Spam-Level: Received: from newagemicro-plesk-3-1.smartt.com ([127.0.0.1]) by newagemicro-plesk-3-1.smartt.com (newagemicro-plesk-3-1.smartt.com [127.0.0.1]) (amavis, port 10024) with ESMTP id 0CToRNmg3XX1; Wed, 23 Jul 2025 08:36:00 -0700 (PDT) Received: from MIKE1 (unknown [50.205.63.162]) by newagemicro-plesk-3-1.smartt.com (Postfix) with ESMTPSA id 400DBB6262; Wed, 23 Jul 2025 08:35:59 -0700 (PDT) Received-SPF: pass (newagemicro-plesk-3-1.smartt.com: connection is authenticated) From: To: , Cc: "Dave Tyree" , "Mike Sobchuk" Subject: [Patch v1] driver/eth/usb/asix.ko: Support for 88772C in Rev-RMII Date: Wed, 23 Jul 2025 11:35:57 -0400 Message-ID: <000201dbfbe7$7d4ac1b0$77e04510$@newagemicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0003_01DBFBC5.F65694C0" X-Mailer: Microsoft Outlook 16.0 Thread-Index: Adv753S3jDDtaeIqQveCkX4C2/uJfg== Content-Language: en-us X-PPP-Message-ID: <175328496025.3523951.4198707262386615334@newagemicro-plesk-3-1.smartt.com> X-PPP-Vhost: newagemicro.com This is a multipart message in MIME format. ------=_NextPart_000_0003_01DBFBC5.F65694C0 Content-Type: multipart/alternative; boundary="----=_NextPart_001_0004_01DBFBC5.F65694C0" ------=_NextPart_001_0004_01DBFBC5.F65694C0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit This Patch adds support to the asix.ko driver for the AX88772C in Reverse-RMII mode. The 'asix.ko' driver is designed to support 88772A, B and C. The AX88772C supports running in Reverse-RMII mode to enable MAC to MAC communication. The base 'asix.ko' driver does NOT currently support the AX88772C in Reverse-RMII mode. This is due to several reasons: 1. The AX88772C PHY register "LINK STATUS" Link value never is set to 1. a. This prevents the drivers from setting the interface 'UP' 2. The AX88772C PHY-ID is hard coded to 0x10, this configures the chip to use the internal PHY not an external PHY. a. To use the AX88772C in Reverse-RMII mode, the chip must be configured to use the external 'PHY'. Asix provides a dedicated AX88772C driver which supports Reverse-RMII. This 'C' driver was references to add Reverse-RMII support to the base asix.ko driver. To resolve the issue, the following changes were made: 1. MDIO_READ prior to configuring chip to determine what operational mode it is in (Internal, RMII, or Reverse-RMII) 2. If in Reverse-RMII mode, force chip to be configured as if it had an external PHY. 3. If in Reverse-RMII mode, set the interface status to UP regardless of the value of the 'LINK STATUS' bit. ------=_NextPart_001_0004_01DBFBC5.F65694C0 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

This Patch adds support to the asix.ko driver = for the AX88772C in Reverse-RMII mode.

 

The = ‘asix.ko’ driver is designed to support 88772A, B and = C.

The AX88772C supports running in Reverse-RMII = mode to enable MAC to MAC communication.

The base = ‘asix.ko’ driver does NOT currently support the AX88772C in = Reverse-RMII mode.

 

This is due to = several reasons:

  1. The AX88772C PHY register “LINK = STATUS” Link value never is set to 1.
    1. This prevents the drivers from setting the = interface ‘UP’
  2. The AX88772C PHY-ID is hard coded = to 0x10, this configures the chip to use the internal PHY not an = external PHY.
    1. To use the AX88772C in Reverse-RMII mode, the = chip must be configured to use the external = ‘PHY’.

 

Asix provides a = dedicated AX88772C driver which supports Reverse-RMII. This = ‘C’ driver was references to add Reverse-RMII support to the = base asix.ko driver.

To resolve the issue, the following changes = were made:

  1. MDIO_READ prior to configuring chip to = determine what operational mode it is in (Internal, RMII, or = Reverse-RMII)
  2. If in Reverse-RMII mode, force chip to be = configured as if it had an external PHY.
  3. If in Reverse-RMII mode, set the = interface status to UP regardless of the value of the ‘LINK = STATUS’ bit.
------=_NextPart_001_0004_01DBFBC5.F65694C0-- ------=_NextPart_000_0003_01DBFBC5.F65694C0 Content-Type: application/octet-stream; name="0001-Subject-Patch-v1-driver-eth-usb-asix.ko-Support-for-.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="0001-Subject-Patch-v1-driver-eth-usb-asix.ko-Support-for-.patch" From fe97ec1812e6befc8bddc319fdf9cc913f45617f Mon Sep 17 00:00:00 2001=0A= From: Mike =0A= Date: Tue, 22 Jul 2025 16:16:44 -0400=0A= Subject: [PATCH] Subject: [Patch v1] driver/eth/usb/asix.ko: Support for=0A= 88772C in Rev-RMII=0A= =0A= From: Mike Sobchuk =0A= AX88772C in Reverse-RMII mode does not set LINK status to 1.=0A= Results in driver being unable to set interface up.=0A= PHY-ID forces driver to configure chip to use internal PHY not external.=0A= Patch provides support for AX88772C in Reverse-RMII with the following=0A= changes:=0A= mdio_read to determine operational mode (Internal, RMII, or REV-RMII).=0A= if in REV-RMII, configure mac to use external PHY (Same as RMII mode).=0A= if in REV-RMII, force LINK status to UP regardless of PHY 'LINK status'=0A= register value.=0A= =0A= Signed-off-by: Mike Sobchuk =0A= ---=0A= drivers/net/usb/asix.h | 12 +++++++++++-=0A= drivers/net/usb/asix_devices.c | 19 +++++++++++++++++++=0A= 2 files changed, 30 insertions(+), 1 deletion(-)=0A= =0A= diff --git a/drivers/net/usb/asix.h b/drivers/net/usb/asix.h=0A= index 74162190bccc..70e63e278720 100644=0A= --- a/drivers/net/usb/asix.h=0A= +++ b/drivers/net/usb/asix.h=0A= @@ -32,6 +32,7 @@=0A= #define DRIVER_VERSION "22-Dec-2011"=0A= #define DRIVER_NAME "asix"=0A= =0A= +=0A= /* ASIX AX8817X based USB 2.0 Ethernet Devices */=0A= =0A= #define AX_CMD_SET_SW_MII 0x06=0A= @@ -72,7 +73,12 @@=0A= #define AX_HOST_EN 0x01=0A= =0A= #define AX_PHYSEL_PSEL 0x01=0A= -#define AX_PHYSEL_SSMII 0=0A= +#define AX_PHYSEL_SSMII 0x00=0A= +#define AX_PHYSEL_ASEL 0x02=0A= +#define AX_PHYSEL_MASK 0x0C=0A= +#define AX_PHYSEL_SSMII 0x00=0A= +#define AX_PHYSEL_SSRMII 0x04=0A= +#define AX_PHYSEL_SSRRMII 0x0C=0A= #define AX_PHYSEL_SSEN 0x10=0A= =0A= #define AX_PHY_SELECT_MASK (BIT(3) | BIT(2))=0A= @@ -160,6 +166,9 @@=0A= =0A= #define AX_EMBD_PHY_ADDR 0x10=0A= =0A= +#define OPERATION_MAC_MODE 0=0A= +#define OPERATION_PHY_MODE 1=0A= +=0A= /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes = */=0A= struct asix_data {=0A= u8 multi_filter[AX_MCAST_FILTER_SIZE];=0A= @@ -191,6 +200,7 @@ struct asix_common_private {=0A= u16 phy_addr;=0A= bool embd_phy;=0A= u8 chipcode;=0A= + u8 OperationMode;=0A= };=0A= =0A= extern const struct driver_info ax88172a_info;=0A= diff --git a/drivers/net/usb/asix_devices.c = b/drivers/net/usb/asix_devices.c=0A= index f7cff58fe044..28223d13ef1e 100644=0A= --- a/drivers/net/usb/asix_devices.c=0A= +++ b/drivers/net/usb/asix_devices.c=0A= @@ -42,11 +42,17 @@ struct ax88172_int_data {=0A= =0A= static void asix_status(struct usbnet *dev, struct urb *urb)=0A= {=0A= + struct asix_common_private *priv =3D dev->driver_priv;=0A= struct ax88172_int_data *event;=0A= int link;=0A= =0A= if (urb->actual_length < 8)=0A= return;=0A= + if (priv->OperationMode =3D=3D OPERATION_PHY_MODE){=0A= + usbnet_link_change(dev, 1, 0);=0A= + return;=0A= + }=0A= +=0A= =0A= event =3D urb->transfer_buffer;=0A= link =3D event->link & 0x01;=0A= @@ -836,6 +842,15 @@ static int ax88772_bind(struct usbnet *dev, struct = usb_interface *intf)=0A= =0A= usbnet_get_endpoints(dev, intf);=0A= =0A= + ret =3D asix_read_cmd(dev, AX_CMD_SW_PHY_STATUS, 0, 0, 1, buf, = 0);=0A= + *buf &=3D AX_PHYSEL_MASK;=0A= +=0A= + if(*buf =3D=3D AX_PHYSEL_SSRRMII){=0A= + priv->OperationMode =3D OPERATION_PHY_MODE;=0A= + netdev_dbg(dev->net, "PHY MODE\n");=0A= + }=0A= +=0A= +=0A= /* Maybe the boot loader passed the MAC address via device tree */=0A= if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) {=0A= netif_dbg(dev, ifup, dev->net,=0A= @@ -876,6 +891,10 @@ static int ax88772_bind(struct usbnet *dev, struct = usb_interface *intf)=0A= priv->phy_addr =3D ret;=0A= priv->embd_phy =3D ((priv->phy_addr & 0x1f) =3D=3D AX_EMBD_PHY_ADDR);=0A= =0A= + if(priv->OperationMode =3D=3D OPERATION_PHY_MODE) {=0A= + priv->embd_phy =3D 0;=0A= + }=0A= +=0A= ret =3D asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1,=0A= &priv->chipcode, 0);=0A= if (ret < 0) {=0A= -- =0A= 2.43.0=0A= =0A= ------=_NextPart_000_0003_01DBFBC5.F65694C0--