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Mon, 21 Sep 2026 06:19:22 -0700 (PDT) Message-ID: Date: Mon, 21 Sep 2026 15:19:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH] x86/HVM: replace paging_mode_hap() uses Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1789996763-508CDCFC-114C4D77/0/0 X-purgate-type: clean X-purgate-size: 10516 X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1789996787478158500 Content-Type: text/plain; charset="utf-8" HVM guests cannot run without either HAP or shadow enabled. While paging_mode_shadow() is compile-time-constant when SHADOW_PAGING=3Dn, paging_mode_hap() isn't. Hence the former is preferred to leverage DCE. In svm_update_guest_cr() combine two adjacent conditionals. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monn=C3=A9 --- a/xen/arch/x86/hvm/dom0_build.c +++ b/xen/arch/x86/hvm/dom0_build.c @@ -473,7 +473,7 @@ static int __init pvh_populate_p2m(struc } } =20 - if ( using_vmx() && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) + if ( using_vmx() && !paging_mode_shadow(d) && !vmx_unrestricted_guest(= v) ) { /* * Since Dom0 cannot be migrated, we will only setup the --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -8,7 +8,7 @@ #include #include #include -#include /* paging_mode_hap */ +#include /* paging_mode_(hap|shadow)() */ #include /* for local_event_delivery_(en|dis)able */ #include /* p2m_get_pagetable, p2m_get_nestedp2m */ #include @@ -243,7 +243,7 @@ static int nsvm_vcpu_hostrestore(struct /* host nested paging + guest nested paging. */ /* hvm_set_cr3() below sets v->arch.hvm.guest_cr[3] for us. */ } - else if ( paging_mode_hap(v->domain) ) + else if ( !paging_mode_shadow(v->domain) ) { /* host nested paging + guest shadow paging. */ /* hvm_set_cr3() below sets v->arch.hvm.guest_cr[3] for us. */ @@ -525,7 +525,7 @@ static int nsvm_vmcb_prepare4vmrun(struc if ( rc !=3D X86EMUL_OKAY ) gdprintk(XENLOG_ERR, "hvm_set_cr3 failed, rc: %u\n", rc); } - else if ( paging_mode_hap(v->domain) ) + else if ( !paging_mode_shadow(v->domain) ) { /* host nested paging + guest shadow paging. */ vmcb_set_np(n2vmcb, true); @@ -1033,7 +1033,7 @@ nsvm_vmcb_prepare4vmexit(struct vcpu *v, * unshadowed guest h_cr3 is kept in ns_vmcb->h_cr3, * hence we keep the ns_vmcb->h_cr3 value. */ } - else if ( paging_mode_hap(v->domain) ) + else if ( !paging_mode_shadow(v->domain) ) { /* host nested paging + guest shadow paging. */ vmcb_set_np(ns_vmcb, false); @@ -1260,7 +1260,7 @@ nestedsvm_check_intercepts(struct vcpu * /* host nested paging + guest nested paging */ return NESTEDHVM_VMEXIT_HOST; } - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { if ( is_intercepted ) return NESTEDHVM_VMEXIT_FATALERROR; @@ -1559,7 +1559,7 @@ void svm_nested_features_on_efer_update( if ( nsvm_efer_svm_enabled(v) ) { if ( !vmcb->virt_ext.fields.vloadsave_enable && - paging_mode_hap(v->domain) && + !paging_mode_shadow(v->domain) && cpu_has_svm_vloadsave ) { vmcb->virt_ext.fields.vloadsave_enable =3D 1; --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -113,7 +113,8 @@ static void cf_check svm_update_guest_cr switch ( cr ) { case 0: - if ( paging_mode_hap(v->domain) ) + value =3D v->arch.hvm.guest_cr[0]; + if ( !paging_mode_shadow(v->domain) ) { uint32_t intercepts =3D vmcb_get_cr_intercepts(vmcb); =20 @@ -122,9 +123,7 @@ static void cf_check svm_update_guest_cr monitor_ctrlreg_bitmask(VM_EVENT_X86_CR3) ) vmcb_set_cr_intercepts(vmcb, intercepts | CR_INTERCEPT_CR3_= WRITE); } - - value =3D v->arch.hvm.guest_cr[0]; - if ( paging_mode_shadow(v->domain) ) + else value |=3D X86_CR0_PG | X86_CR0_WP; vmcb_set_cr0(vmcb, value); break; @@ -148,7 +147,7 @@ static void cf_check svm_update_guest_cr break; case 4: value =3D HVM_CR4_HOST_MASK; - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) value &=3D ~X86_CR4_PAE; value |=3D v->arch.hvm.guest_cr[4]; =20 @@ -418,7 +417,7 @@ static int svm_vmcb_restore(struct vcpu svm_update_guest_cr(v, 0, 0); svm_update_guest_cr(v, 4, 0); =20 - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { vmcb_set_np(vmcb, true); vmcb_set_g_pat(vmcb, MSR_IA32_CR_PAT_RESET /* guest PAT */); @@ -2519,7 +2518,7 @@ void asmlinkage svm_vmexit_handler(void) regs, !(vmcb_get_efer(vmcb) & EFER_LMA) || !(vmcb->cs.l)); =20 v->arch.hvm.guest_cr[2] =3D vmcb_get_cr2(vmcb); - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { v->arch.hvm.guest_cr[0] =3D vmcb_get_cr0(vmcb); v->arch.hvm.guest_cr[3] =3D v->arch.hvm.hw_cr[3] =3D vmcb_get_cr3(= vmcb); --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -143,7 +143,7 @@ static int construct_vmcb(struct vcpu *v =20 vmcb->_exception_intercepts =3D HVM_TRAP_MASK; =20 - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { vmcb_set_np(vmcb, true); /* enable nested paging */ vmcb->_g_pat =3D MSR_IA32_CR_PAT_RESET; /* guest PAT */ --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -1141,7 +1141,7 @@ static int construct_vmcs(struct vcpu *v SECONDARY_EXEC_ENABLE_VM_FUNCTIONS | SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS); =20 - if ( paging_mode_hap(d) ) + if ( !paging_mode_shadow(d) ) { v->arch.hvm.vmx.exec_control &=3D ~(CPU_BASED_INVLPG_EXITING | CPU_BASED_CR3_LOAD_EXITING | @@ -1203,7 +1203,7 @@ static int construct_vmcs(struct vcpu *v vmx_clear_msr_intercept(v, MSR_IA32_SYSENTER_CS, VMX_MSR_RW); vmx_clear_msr_intercept(v, MSR_IA32_SYSENTER_ESP, VMX_MSR_RW); vmx_clear_msr_intercept(v, MSR_IA32_SYSENTER_EIP, VMX_MSR_RW); - if ( paging_mode_hap(d) && (!is_iommu_enabled(d) || iommu_snoop) ) + if ( !paging_mode_shadow(d) && (!is_iommu_enabled(d) || iommu_snoo= p) ) vmx_clear_msr_intercept(v, MSR_IA32_CR_PAT, VMX_MSR_RW); if ( (vmexit_ctl & VM_EXIT_CLEAR_BNDCFGS) && (vmentry_ctl & VM_ENTRY_LOAD_BNDCFGS) ) @@ -1327,7 +1327,7 @@ static int construct_vmcs(struct vcpu *v __vmwrite(VMCS_LINK_POINTER, ~0UL); =20 v->arch.hvm.vmx.exception_bitmap =3D HVM_TRAP_MASK - | (paging_mode_hap(d) ? 0 : (1U << X86_EXC_PF)); + | (!paging_mode_shadow(d) ? 0 : (1U << X86_EXC_PF)); =20 if ( cpu_has_vmx_notify_vm_exiting ) __vmwrite(NOTIFY_WINDOW, vm_notify_window); @@ -1347,7 +1347,7 @@ static int construct_vmcs(struct vcpu *v __vmwrite(TPR_THRESHOLD, 0); } =20 - if ( paging_mode_hap(d) ) + if ( !paging_mode_shadow(d) ) { struct p2m_domain *p2m =3D p2m_get_hostp2m(d); struct ept_data *ept =3D &p2m->ept; @@ -1377,7 +1377,7 @@ static int construct_vmcs(struct vcpu *v =20 vmx_vlapic_msr_changed(v); =20 - if ( opt_l1d_flush && paging_mode_hap(d) ) + if ( opt_l1d_flush && !paging_mode_shadow(d) ) rc =3D vmx_add_msr(v, MSR_FLUSH_CMD, FLUSH_CMD_L1D, VMX_MSR_GUEST_LOADONLY); =20 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1707,7 +1707,7 @@ static void cf_check vmx_update_guest_cr if ( paging_mode_shadow(v->domain) ) hw_cr0_mask |=3D X86_CR0_WP; =20 - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { /* Manage GUEST_CR3 when CR0.PE=3D0. */ uint32_t old_ctls =3D v->arch.hvm.vmx.exec_control; @@ -1772,7 +1772,7 @@ static void cf_check vmx_update_guest_cr /* Fallthrough: Changing CR0 can change some bits in real CR4. */ case 4: v->arch.hvm.hw_cr[4] =3D HVM_CR4_HOST_MASK; - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) v->arch.hvm.hw_cr[4] &=3D ~X86_CR4_PAE; =20 if ( !nestedhvm_vcpu_in_guestmode(v) ) @@ -1792,7 +1792,7 @@ static void cf_check vmx_update_guest_cr * two subtly complicated cases. */ =20 - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { /* * On hardware lacking the Unrestricted Guest feature (or = with @@ -1824,7 +1824,7 @@ static void cf_check vmx_update_guest_cr * unconditionally trapping more CR4 bits, at which point the * performance benefit of doing this is quite dubious. */ - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { /* * Update CR4 host mask to only trap when the guest tries to s= et @@ -1860,7 +1860,7 @@ static void cf_check vmx_update_guest_cr break; =20 case 3: - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { if ( !hvm_paging_enabled(v) && !vmx_unrestricted_guest(v) ) v->arch.hvm.hw_cr[3] =3D @@ -4190,7 +4190,7 @@ void asmlinkage vmx_vmexit_handler(struc =20 hvm_sanitize_regs_fields(regs, !(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE= )); =20 - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) { /* * Xen allows the guest to modify some CR4 bits directly, update c= ached @@ -4977,7 +4977,7 @@ bool asmlinkage vmx_vmenter_helper(const if ( unlikely(need_flush) ) vpid_sync_all(); =20 - if ( paging_mode_hap(curr->domain) ) + if ( !paging_mode_shadow(curr->domain) ) { struct ept_data *ept =3D &p2m_get_hostp2m(currd)->ept; unsigned int cpu =3D smp_processor_id(); --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -2458,7 +2458,7 @@ int nvmx_n2_vmexit_handler(struct cpu_us */ if ( vector =3D=3D X86_EXC_PF ) { - if ( paging_mode_hap(v->domain) ) + if ( !paging_mode_shadow(v->domain) ) nvcpu->nv_vmexit_pending =3D 1; } else if ( (intr_info & valid_mask) =3D=3D valid_mask )