From nobody Sun May 5 17:15:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=arm.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1625584197801730.8612339338455; Tue, 6 Jul 2021 08:09:57 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.151438.279876 (Exim 4.92) (envelope-from ) id 1m0mhf-0002UZ-Mk; Tue, 06 Jul 2021 15:09:39 +0000 Received: by outflank-mailman (output) from mailman id 151438.279876; Tue, 06 Jul 2021 15:09:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1m0mhf-0002US-Jo; Tue, 06 Jul 2021 15:09:39 +0000 Received: by outflank-mailman (input) for mailman id 151438; Tue, 06 Jul 2021 15:09:38 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1m0mhe-0002UM-Ch for xen-devel@lists.xenproject.org; Tue, 06 Jul 2021 15:09:38 +0000 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-iad1.inumbo.com (Halon) with ESMTP id d947b234-7e35-45da-a3bd-c505a11bb348; Tue, 06 Jul 2021 15:09:36 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5505C106F; Tue, 6 Jul 2021 08:09:36 -0700 (PDT) Received: from e109506.cambridge.arm.com (e109506.cambridge.arm.com [10.1.199.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 337073F73B; Tue, 6 Jul 2021 08:09:35 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d947b234-7e35-45da-a3bd-c505a11bb348 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: jgrall@amazon.com, michal.orzel@arm.com, olaf@aepfle.de, Ian Jackson , Wei Liu , Juergen Gross , George Dunlap Subject: [PATCH] tools: Fix CPSR/SPSR print size Date: Tue, 6 Jul 2021 16:09:10 +0100 Message-Id: X-Mailer: git-send-email 2.17.1 X-ZM-MESSAGEID: 1625584204628100001 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" With the changes of register size introduced in 918b8842a852e0e7446286f546724b1c63c56c66, CPSR and SPSR are now stored as 64bit values. Fix the print size to use 64bit type. Signed-off-by: Bertrand Marquis Acked-by: Julien Grall --- tools/libs/guest/xg_dom_arm.c | 4 ++-- tools/xentrace/xenctx.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/tools/libs/guest/xg_dom_arm.c b/tools/libs/guest/xg_dom_arm.c index 01e85e0ea9..5e3b76355e 100644 --- a/tools/libs/guest/xg_dom_arm.c +++ b/tools/libs/guest/xg_dom_arm.c @@ -140,7 +140,7 @@ static int vcpu_arm32(struct xc_dom_image *dom) =20 ctxt->flags =3D VGCF_online; =20 - DOMPRINTF("Initial state CPSR %#"PRIx32" PC %#"PRIx32, + DOMPRINTF("Initial state CPSR %#"PRIx64" PC %#"PRIx32, ctxt->user_regs.cpsr, ctxt->user_regs.pc32); =20 rc =3D xc_vcpu_setcontext(dom->xch, dom->guest_domid, 0, &any_ctx); @@ -182,7 +182,7 @@ static int vcpu_arm64(struct xc_dom_image *dom) =20 ctxt->flags =3D VGCF_online; =20 - DOMPRINTF("Initial state CPSR %#"PRIx32" PC %#"PRIx64, + DOMPRINTF("Initial state CPSR %#"PRIx64" PC %#"PRIx64, ctxt->user_regs.cpsr, ctxt->user_regs.pc64); =20 rc =3D xc_vcpu_setcontext(dom->xch, dom->guest_domid, 0, &any_ctx); diff --git a/tools/xentrace/xenctx.c b/tools/xentrace/xenctx.c index 972f473dbf..85ba0c0fa6 100644 --- a/tools/xentrace/xenctx.c +++ b/tools/xentrace/xenctx.c @@ -556,7 +556,7 @@ static void print_ctx_32(vcpu_guest_context_t *ctx) printf("PC: %08"PRIx32, regs->pc32); print_symbol(regs->pc32, KERNEL_TEXT_ADDR); printf("\n"); - printf("CPSR: %08"PRIx32"\n", regs->cpsr); + printf("CPSR: %08"PRIx64"\n", regs->cpsr); printf("USR: SP:%08"PRIx32" LR:%08"PRIx32"\n", regs->sp_usr, regs->lr_usr); printf("SVC: SPSR:%08"PRIx32" SP:%08"PRIx32" LR:%08"PRIx32"\n", @@ -614,8 +614,8 @@ static void print_ctx_64(vcpu_guest_context_t *ctx) printf("LR: %016"PRIx64"\n", regs->x30); printf("ELR_EL1: %016"PRIx64"\n", regs->elr_el1); =20 - printf("CPSR: %08"PRIx32"\n", regs->cpsr); - printf("SPSR_EL1: %08"PRIx32"\n", regs->spsr_el1); + printf("CPSR: %08"PRIx64"\n", regs->cpsr); + printf("SPSR_EL1: %08"PRIx64"\n", regs->spsr_el1); =20 printf("SP_EL0: %016"PRIx64"\n", regs->sp_el0); printf("SP_EL1: %016"PRIx64"\n", regs->sp_el1); --=20 2.17.1