From nobody Mon Apr 29 19:30:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1658849362; cv=none; d=zohomail.com; s=zohoarc; b=gF/he/E/C2pbsuN+L/BBqbj4tJRRZGniggHsuTwOx7WUDT2lLUujF0bB8lK8TclHIze+ksT6lp26BD/mZ1HhteYM/DDU7jix50C1AsG9TamR1VZWsFfUD+4/BvSQ9Zm8UFWOZWbkD4YYzBrzhcnngpJBRBEEzGpB6IP05H4cnlw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1658849362; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=/gG98/+ZxRIPuvZda+NVN7NYtkPkGGhrUeqRVUiaYJc=; b=HHpO0uYWarNawIorgwqph7U9kCavi8oWmm0GM596SKz4F2wQCegyO/kJLkDAIi68V+5+fYetE78hm6lXfifpTAosVpL23eBW5ayJksEya89zVdGP7Bh+v+LobIe+JsA2F0t+iYTD2jqxTF1IKCLMH+0EuRFYi2vR21VcJNGpv8o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1658849362507469.61261356359455; Tue, 26 Jul 2022 08:29:22 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.375442.607824 (Exim 4.92) (envelope-from ) id 1oGMUW-0003bV-06; Tue, 26 Jul 2022 15:29:00 +0000 Received: by outflank-mailman (output) from mailman id 375442.607824; Tue, 26 Jul 2022 15:28:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oGMUV-0003bO-T9; Tue, 26 Jul 2022 15:28:59 +0000 Received: by outflank-mailman (input) for mailman id 375442; Tue, 26 Jul 2022 15:28:58 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1oGMUU-0003bI-6K for xen-devel@lists.xenproject.org; Tue, 26 Jul 2022 15:28:58 +0000 Received: from esa4.hc3370-68.iphmx.com (esa4.hc3370-68.iphmx.com [216.71.155.144]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a8a26139-0cf7-11ed-924f-1f966e50362f; Tue, 26 Jul 2022 17:28:56 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a8a26139-0cf7-11ed-924f-1f966e50362f DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1658849336; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=78DeRPXEX5Sq1wiXho6iKCVockOf/BEkWuFpqU82/Bk=; b=H6YE5uwaqnddfSZ7VRyvMPh3xTixL9aJi84HBx38cqheE1JneUHh3/6Q P7wdQGjxQhBYuTyOuiHd5C2DSZkC8wSTFx7z8NlLI/mYlGTLZEycwIRLR hMaZo9YfvFRRs0jS2VxC2BOzjYuF5ecyqz9atgqsVWvyRfTWFaDEC/JH+ g=; Authentication-Results: esa4.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none X-SBRS: 2.7 X-MesageID: 79229926 X-Ironport-Server: esa4.hc3370-68.iphmx.com X-Remote-IP: 162.221.156.83 X-Policy: $RELAYED IronPort-Data: A9a23:jFBzxKr9w2S3WdSi4vLPy9qSbDheBmIFZRIvgKrLsJaIsI4StFCzt garIBmDaf+LMDH1fth3a9yz8EpUvZbVy4BnGgY4rns9QXwQpJuZCYyVIHmrMnLJJKUvbq7GA +byyDXkBJppJpMJjk71atANlVEliefSAOKU5NfsYkhZXRVjRDoqlSVtkus4hp8AqdWiCkaGt MiaT/f3YTdJ4BYpdDNPg06/gEk35q6q52lF5gZWic1j5zcyqVFEVPrzGonpR5fIatE8NvK3Q e/F0Ia48gvxl/v6Ior4+lpTWhRiro/6ZWBiuFIPM0SRqkEqShgJ+rQ6LJIhhXJ/0F1lqTzTJ OJl7vRcQS9xVkHFdX90vxNwS0mSNoUekFPLzOTWXWV+ACQqflO1q8iCAn3aMqUop+VKBzF2y cUoIQEkRAqigKWQ8KOCH7wEasQLdKEHPasas3BkizrYEewnUdbIRKCiCd1whWlqwJoURLCHO pRfOWEHgBfoOnWjPn8aBIw/mqG0gWP4cBVTqU6PpLpx6G/WpOB0+Oe8aoCEK4bULSlTtkCVo yHE9Wj5OxAXEeSH7x6F7nClt/CayEsXX6pNTeblp5aGmma7xGYeFRkXXluTuuSihwi1XNc3A 1MQ0jojq+417kPDZtrwQRy+5mKFtxg0WtxMHul84waIooLE7gDcCmUaQzppbN09qNRwVTEsz kWOnd7iGXpoqrL9YXCA8PGSpDC7OykQJEcDYzMJSU0O5NyLnW0opkuRFJA5Svfz14CrX2Grq 9yXkMQgr4VOjvMNh52HxGDOshuGvLnOCSgF9zyCCwpJ8ThFiJ6Zi52AsAaGvaYYdNzCFzFtr 1BfxZHAsblm4YWl0XXUHb5TROzBC+OtamW0vLJ5I3U2G91BEVaHdJsY3jxxLVwB3i0sKW6wO x+7Ve+8CfZu0JqWgUxfOdvZ5zwCl/SIKDgcfqm8giBySpZwbhSb2ypleFSd2Wvg+GB1z/xvZ sjHKJb8UitEYUiC8NZRb75GuYLHOwhknT+DLXwF50/PPUWiiI69Fu5ebQrmghER56KYugTFm +ti2z+x40wGCIXWP3iImbP/2HhQchDX87iq9JEMHgNCSyI6cFwc5wj5mut7JdY6zvkEyY8lP BiVAydl9bY2vlWfQS3iV5ypQOm3NXqjhRrX5RARAGs= IronPort-HdrOrdr: A9a23:fxoSqKMUMPRQwsBcTs+jsMiBIKoaSvp037Eqv3oRdfUzSL3/qy nOpoV96faaskdzZJhNo7+90cq7MBfhHPxOkOss1N6ZNWGM0gbFEGgL1/qa/9SKIU3DH4Bmu5 uIC5IObeHNMQ== X-IronPort-AV: E=Sophos;i="5.93,193,1654574400"; d="scan'208";a="79229926" From: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= To: CC: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jun Nakajima , Kevin Tian , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu Subject: [PATCH v2] x86/msr: fix X2APIC_LAST Date: Tue, 26 Jul 2022 16:28:19 +0100 Message-ID: X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1658849363423100001 The latest Intel manual now says the X2APIC reserved range is only 0x800 to 0x8ff (NOT 0xbff). This changed between SDM 68 (Nov 2018) and SDM 69 (Jan 2019). The AMD manual documents 0x800-0x8ff too. There are non-X2APIC MSRs in the 0x900-0xbff range now: e.g. 0x981 is IA32_TME_CAPABILITY, an architectural MSR. The new MSR in this range appears to have been introduced in Icelake, so this commit should be backported to Xen versions supporting Icelake. Backport: 4.13+ Signed-off-by: Edwin T=C3=B6r=C3=B6k Reviewed-by: Jan Beulich --- Notes: Changed since v1: * include version of Intel SDM where the change occured * remove opencoded MSR_X2APIC_FIRST + 0xff xen/arch/x86/hvm/vmx/vmx.c | 4 ++-- xen/arch/x86/include/asm/msr-index.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 47554cc004..17e103188a 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -3397,7 +3397,7 @@ void vmx_vlapic_msr_changed(struct vcpu *v) if ( cpu_has_vmx_apic_reg_virt ) { for ( msr =3D MSR_X2APIC_FIRST; - msr <=3D MSR_X2APIC_FIRST + 0xff; msr++ ) + msr <=3D MSR_X2APIC_LAST; msr++ ) vmx_clear_msr_intercept(v, msr, VMX_MSR_R); =20 vmx_set_msr_intercept(v, MSR_X2APIC_PPR, VMX_MSR_R); @@ -3418,7 +3418,7 @@ void vmx_vlapic_msr_changed(struct vcpu *v) if ( !(v->arch.hvm.vmx.secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) ) for ( msr =3D MSR_X2APIC_FIRST; - msr <=3D MSR_X2APIC_FIRST + 0xff; msr++ ) + msr <=3D MSR_X2APIC_LAST; msr++ ) vmx_set_msr_intercept(v, msr, VMX_MSR_RW); =20 vmx_update_secondary_exec_control(v); diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/as= m/msr-index.h index 8cab8736d8..1a928ea6af 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -148,7 +148,7 @@ #define MSR_INTERRUPT_SSP_TABLE 0x000006a8 =20 #define MSR_X2APIC_FIRST 0x00000800 -#define MSR_X2APIC_LAST 0x00000bff +#define MSR_X2APIC_LAST 0x000008ff =20 #define MSR_X2APIC_TPR 0x00000808 #define MSR_X2APIC_PPR 0x0000080a --=20 2.34.1