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administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Xenia Ragiadakou , Gerd Hoffmann , xen-devel@lists.xenproject.org X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [SeaBIOS] [PATCH] paravirt: call pci_bios_init_devices() when runningOnXen() List-Id: SeaBIOS mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Xenia Ragiadakou via SeaBIOS Reply-To: Xenia Ragiadakou Content-Transfer-Encoding: quoted-printable X-Spamd-Bar: + X-Spam-Level: * Authentication-Results: coreboot.org; auth=pass smtp.auth=mailman@coreboot.org smtp.mailfrom=seabios-bounces@seabios.org X-ZohoMail-DKIM: pass (identity @seabios.org) X-ZM-MESSAGEID: 1689326971856100001 Content-Type: text/plain; charset="utf-8" The issue that this patch attempts to address is S3 related. Currently, suspending a XEN guest multiple times does not work. This happens because PIIX4 PM io space gets unmapped during S3 resume and any accesses performed to trigger subsequent suspends are not handled. So, the guest spins on the wake sts bit forever. Below follows a more detailed description of the issue. On S3 resume path, QEMU issues piix4_pm_reset() to bring PPIX4 PM controller to the state expected. More specifically, piix4_pm_reset() zeroes PMIOSE register, i.e pci_conf[0x80] =3D 0, and this results in unmapping PIIX4 PM io space, i.e. memory_region_set_enabled(&s->io, d->config[0x80] & 1) It is bios responsibility to reenable PIIX4 PM io space during S3 resume path. However, when running on XEN, the qemu platform initialization code does not call pci_bios_init_devices(), hence the PIIX4 PM controller init function is not called and PiixPmBDF is not set. The value of PiixPmBDF indicates the presence of PIIX4 PM controller. Thus, S3 resume code in pci_resume() considers that PIIX4 PM controller is not present and does not perform the relevant post-resume setup that restores PIIX4 PM io space. This is the reason why any subsequent guest access to those registers is not handled. This patch adds a call to pci_bios_init_devices() to the early xen platform setup code. Signed-off-by: Xenia Ragiadakou --- src/fw/paravirt.c | 1 + src/fw/pciinit.c | 2 +- src/util.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c index fba4e52..0c035eb 100644 --- a/src/fw/paravirt.c +++ b/src/fw/paravirt.c @@ -205,6 +205,7 @@ qemu_platform_setup(void) =20 if (runningOnXen()) { pci_probe_devices(); + pci_bios_init_devices(); xen_hypercall_setup(); xen_biostable_setup(); return; diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index badf13d..f955481 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -417,7 +417,7 @@ static void pci_bios_init_device(struct pci_device *pci) PCI_BRIDGE_CTL_SERR); } =20 -static void pci_bios_init_devices(void) +void pci_bios_init_devices(void) { struct pci_device *pci; foreachpci(pci) { diff --git a/src/util.h b/src/util.h index aff8e88..ebd863f 100644 --- a/src/util.h +++ b/src/util.h @@ -137,6 +137,7 @@ extern u64 pcimem64_start, pcimem64_end; extern const u8 pci_irqs[4]; void pci_setup(void); void pci_resume(void); +void pci_bios_init_devices(void); =20 // fw/pirtable.c void pirtable_setup(void); --=20 2.34.1 _______________________________________________ SeaBIOS mailing list -- seabios@seabios.org To unsubscribe send an email to seabios-leave@seabios.org