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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-485359bf807sm119619845e9.2.2026.03.10.10.09.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Mar 2026 10:09:26 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e57a1eca-1ca3-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773162567; x=1773767367; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RQUbsjGqpyJLaNssEnVD+AE4bLsCeyAg53aMfThr8Pc=; b=aJE7+K0BbJsUvk1B1xX1Istj/kPDTotAGS6MqmEnPDM6IyYxmrq/qCAcSFCpIZLU5V aeBci1Zrh92xcvw/OLEJeNnmM3vfcnhZ1JSC2Lux2tW9oFF/e0lgOvQzkRRZvdSGQ4u/ c+9PwLGbmYhYlhSAIsWUgir0fn3ElCUfZSimndynWdCAYyR00WQ1PxO49yo75zfxb5k6 H1rrtaJ5cyX+FC+jAPSlTrocRvfU8szxjqXptUzwd91yKBtUVfm+vG25ysFWl3GMoBYr hYqE/SLV30xgNlDyUSKZ4azsa8QwtdQSb0cAG1O8J3P05g2+QpbBcakLVmcLSfoswHOR 2HPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1773162567; x=1773767367; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=RQUbsjGqpyJLaNssEnVD+AE4bLsCeyAg53aMfThr8Pc=; b=ksmbL+54lHEsE0iM6G4Jb5laaA6XXFJXJGtyd2SqnfUoJJVG9dbjXqTX1zO8DxVpBh l7XGTLIGu4HWHV8NlyEGrv6w7xKxoBKkp8dFtl+sps4NL5vKHpDb0o9itohjT5vQ1bNv b9Jk89keU56BZkHzNwGVXfadzEzs/6XvP86RgJPlI/BT9i+mkHilMNv2RtGmDbTVdqRH boB4+zgdIE0DCtJHocN9rl1atWnFVfketcY5VDsbAZmvlxRqkX8BAcSRwnqXiXzvolXw 7xUsDZjTjKZ7YxKrpOzTeEbiJW00Wk2P+LR0yjoPQMBPk3ousICy967ycAGI1iwev18H 9nDw== X-Gm-Message-State: AOJu0YygSFzMmw78j0HpEomguvy+0rzSEAuo8T/lc35ecv/u2uopoKQM IjbCyPdGZqOvfs6TymaqbFUqJSSX1KQbhGG3OO2llIJ+dNF2vKUCjBvleYQdDLV8 X-Gm-Gg: ATEYQzxuCZ/WCOLt8P7p2vtxyZLhi5CXJw1750jTpnF742lxp8+ytoRopOhdIzk6ksZ fREDoxqLx2UCLYywB/PkNhyWEDyRZcxsBkE8TaejjYGnbsjXfVzudojOBwckoKO1i6DbQt3BTdV ej4E9+tMY6sxELwknHQFaZDwqG0R81Yo/F0+JCUsxpImtmuRff68pv7rlpjvDDolZoIVC7JCCmz KWfBwmMeDOuVzdzA87TENu/2zEeVp0yz3kOaqhlPmpWTXtjiBwMWxqmKjzNNpgKbUhuw8Snd0KH 1jZ7z2IUF3zQYNkLPZUpvxfvII2MiwOV13SAwGfGgQJwcVhZjU0FF4/cLFI7H4nH0Ajq32SvxDJ jC/yP4p3m3uiOhZvK+ez9e4POxktRkdvKdObkS43JvX8QW5UqZl/S6pv5PAfuZLVyrdvY/3pOuf 2FD73PPZiqAQ2b3upWgj5HboPBV/nPkR0y8Fp1f0vJd8rf47kg3/Zrt/SX8aMRqzG2sw== X-Received: by 2002:a05:600c:8b86:b0:485:3473:d4a1 with SMTP id 5b1f17b1804b1-4853473d6dcmr167697795e9.34.1773162567282; Tue, 10 Mar 2026 10:09:27 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 15/27] xen/riscv: add very early virtual APLIC (vAPLIC) initialization support Date: Tue, 10 Mar 2026 18:08:48 +0100 Message-ID: X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1773162619502158501 Content-Type: text/plain; charset="utf-8" At the current development stage, only domain vINTC init and deinit operations are required, so implement those first. Initialize vAPLIC's domaincfg to with the interrupt-enable bit set and MSI delivery mode selected as the current solution is exepcted to have always IMSIC, and initialize vintc->ops. Other operations such as emulate_load(), emulate_store(), and is_access() will be needed once guests are running and MMIO accesses to APLIC MMIO range must be handled. These will be introduced separately later. Introduce a structure to describe a virtual interrupt controller (vINTC) and a vintc_ops structure, which provides operations to emulate load and store accesses to interrupt controller MMIOs and to check whether a given address falls within the MMIO range of a specific virtual interrupt controller. The vAPLIC implementation of these operations will be provided later once guests can be run and these operations are actually needed. Introduce these structures here as they are required for the implementation of domain_vaplic_init() and domain_vaplic_alloc(). Also, introduce vcpu_vaplic_init() and init vintc_ops->vcpu_init() with it. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 11 ++--- xen/arch/riscv/include/asm/domain.h | 2 + xen/arch/riscv/include/asm/intc.h | 14 ++++++ xen/arch/riscv/include/asm/vaplic.h | 36 ++++++++++++++ xen/arch/riscv/intc.c | 1 + xen/arch/riscv/vaplic.c | 74 +++++++++++++++++++++++++++++ 7 files changed, 131 insertions(+), 8 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vaplic.h create mode 100644 xen/arch/riscv/vaplic.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index d772b42386c0..b9941a230e03 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -24,6 +24,7 @@ obj-y +=3D smpboot.o obj-y +=3D stubs.o obj-y +=3D time.o obj-y +=3D traps.o +obj-y +=3D vaplic.o obj-y +=3D vmid.o obj-y +=3D vm_event.o obj-y +=3D vsbi/ diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 515735b32e30..560b21b16ffb 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include =20 @@ -154,14 +155,8 @@ int arch_vcpu_create(struct vcpu *v) if ( (rc =3D vcpu_vtimer_init(v)) ) goto fail; =20 - /* - * As interrupt controller (IC) is not yet implemented, - * return an error. - * - * TODO: Drop this once IC is implemented. - */ - rc =3D -EOPNOTSUPP; - goto fail; + if ( (rc =3D v->domain->arch.vintc->ops->vcpu_init(v)) ) + goto fail; =20 return rc; =20 diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index bdb1ffd748c9..21a3e6876f36 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -98,6 +98,8 @@ struct arch_domain { struct paging_domain paging; #endif =20 + struct vintc *vintc; + /* Next unused device tree phandle number */ uint32_t next_phandle; }; diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 8300d71d472f..c5a869db8bc5 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -16,6 +16,7 @@ struct cpu_user_regs; struct dt_device_node; struct irq_desc; struct kernel_info; +struct vcpu; =20 struct intc_info { enum intc_version hw_version; @@ -47,6 +48,19 @@ struct intc_hw_operations { const struct dt_device_node *intc); }; =20 +struct vintc_ops { + /* Initialize some vINTC-related stuff for a vCPU */ + int (*vcpu_init)(struct vcpu *vcpu); + + /* Check if a register is virtual interrupt controller MMIO */ + int (*is_access)(const struct vcpu *vcpu, const unsigned long addr); +}; + +struct vintc { + const struct intc_info *info; + const struct vintc_ops *ops; +}; + void intc_preinit(void); =20 void register_intc_ops(const struct intc_hw_operations *ops); diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/a= sm/vaplic.h new file mode 100644 index 000000000000..7684f3490829 --- /dev/null +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + */ + +#ifndef ASM__RISCV__VAPLIC_H +#define ASM__RISCV__VAPLIC_H + +#include +#include + +#include + +struct domain; + +#define to_vaplic(v) container_of(v, struct vaplic, base) + +struct vaplic_regs { + uint32_t domaincfg; + uint32_t smsiaddrcfg; + uint32_t smsiaddrcfgh; +}; + +struct vaplic { + struct vintc base; + struct vaplic_regs regs; +}; + +int domain_vaplic_init(struct domain *d); +void domain_vaplic_deinit(struct domain *d); + +#endif /* ASM__RISCV__VAPLIC_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index c9f12651fda1..ff7a76accaca 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -6,6 +6,7 @@ #include #include #include +#include #include =20 #include diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c new file mode 100644 index 000000000000..9b105de7ed7d --- /dev/null +++ b/xen/arch/riscv/vaplic.c @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + * Copyright (c) Vates + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "aplic-priv.h" + +static int __init cf_check vcpu_vaplic_init(struct vcpu *v) +{ + int rc =3D 0; + + rc =3D vcpu_imsic_init(v); + if ( rc ) + return rc; + + imsic_set_guest_file_id(v, vgein_assign(v)); + + return rc; +} + +static const struct vintc_ops vaplic_ops =3D { + .vcpu_init =3D vcpu_vaplic_init, +}; + +static struct vintc * __init vaplic_alloc(void) +{ + struct vaplic *v =3D NULL; + + v =3D xvzalloc(struct vaplic); + if ( !v ) + return NULL; + + return &v->base; +} + +int __init domain_vaplic_init(struct domain *d) +{ + int ret =3D 0; + + d->arch.vintc =3D vaplic_alloc(); + if ( !d->arch.vintc ) + { + ret =3D -ENOMEM; + goto fail; + } + + d->arch.vintc->ops =3D &vaplic_ops; + to_vaplic(d->arch.vintc)->regs.domaincfg =3D + APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM; + + fail: + return ret; +} + +void __init domain_vaplic_deinit(struct domain *d) +{ + struct vaplic *vaplic =3D to_vaplic(d->arch.vintc); + + XVFREE(vaplic); +} --=20 2.53.0