From nobody Thu Oct 30 23:12:07 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=arm.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1753865177630235.29726288771246; Wed, 30 Jul 2025 01:46:17 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1063534.1429262 (Exim 4.92) (envelope-from ) id 1uh2Rk-000807-Pa; Wed, 30 Jul 2025 08:46:00 +0000 Received: by outflank-mailman (output) from mailman id 1063534.1429262; Wed, 30 Jul 2025 08:46:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1uh2Rk-0007zu-MP; Wed, 30 Jul 2025 08:46:00 +0000 Received: by outflank-mailman (input) for mailman id 1063534; Wed, 30 Jul 2025 08:46:00 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1uh2Rk-0007SQ-0M for xen-devel@lists.xenproject.org; Wed, 30 Jul 2025 08:46:00 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 9c55ff6a-6d21-11f0-b895-0df219b8e170; Wed, 30 Jul 2025 10:45:57 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 899F11515; Wed, 30 Jul 2025 01:45:49 -0700 (PDT) Received: from PWQ0QT7DJ1.arm.com (unknown [10.57.73.135]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2A5A23F66E; Wed, 30 Jul 2025 01:45:56 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9c55ff6a-6d21-11f0-b895-0df219b8e170 From: Hari Limaye To: xen-devel@lists.xenproject.org Cc: luca.fancellu@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH 3/5] arm/mpu: Implement transient mapping Date: Wed, 30 Jul 2025 09:45:32 +0100 Message-ID: X-Mailer: git-send-email 2.42.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1753865179347116600 Content-Type: text/plain; charset="utf-8" From: Luca Fancellu Add a scheme to distinguish transient MPU regions, to identify MPU regions which will be mapped for a short period of time. Signed-off-by: Luca Fancellu Signed-off-by: Hari Limaye Reviewed-by: Ayan Kumar Halder Tested-by: Ayan Kumar Halder --- xen/arch/arm/include/asm/arm32/mpu.h | 2 ++ xen/arch/arm/include/asm/arm64/mpu.h | 2 ++ xen/arch/arm/include/asm/mpu/mm.h | 14 +++++++++++++- xen/arch/arm/include/asm/mpu/regions.inc | 19 +++++++++++++++++-- xen/arch/arm/mpu/mm.c | 23 ++++++++++++++--------- 5 files changed, 48 insertions(+), 12 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/as= m/arm32/mpu.h index 0a6930b3a0..9906d98809 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -39,6 +39,8 @@ typedef union { typedef struct { prbar_t prbar; prlar_t prlar; + bool transient; + uint8_t pad[7]; /* Pad structure to 16 Bytes */ } pr_t; =20 #endif /* __ASSEMBLY__ */ diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/as= m/arm64/mpu.h index f0ce344e78..1d1843eda0 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -38,6 +38,8 @@ typedef union { typedef struct { prbar_t prbar; prlar_t prlar; + bool transient; + uint8_t pad[15]; /* Pad structure to 32 Bytes */ } pr_t; =20 #endif /* __ASSEMBLY__ */ diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/m= pu/mm.h index c32fac8905..56ca411af4 100644 --- a/xen/arch/arm/include/asm/mpu/mm.h +++ b/xen/arch/arm/include/asm/mpu/mm.h @@ -60,6 +60,16 @@ static inline void context_sync_mpu(void) isb(); } =20 +static inline bool region_is_transient(pr_t *pr) +{ + return pr->transient; +} + +static inline void region_set_transient(pr_t *pr, bool transient) +{ + pr->transient =3D transient; +} + /* * The following API requires context_sync_mpu() after being used to modif= y MPU * regions: @@ -80,9 +90,11 @@ void write_protection_region(const pr_t *pr_write, uint8= _t sel); * @param base Base address of the range to map (inclusive). * @param limit Limit address of the range to map (exclusive). * @param flags Flags for the memory range to map. + * @param transient True for a temporary mapping, otherwise False. * @return 0 on success, negative on error. */ -int xen_mpumap_update(paddr_t base, paddr_t limit, unsigned int flags); +int xen_mpumap_update(paddr_t base, paddr_t limit, unsigned int flags, + bool transient); =20 /* * Creates a pr_t structure describing a protection region. diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/includ= e/asm/mpu/regions.inc index 23fead3b21..f9892fe3d8 100644 --- a/xen/arch/arm/include/asm/mpu/regions.inc +++ b/xen/arch/arm/include/asm/mpu/regions.inc @@ -14,19 +14,31 @@ #define PRLAR_ELx_EN 0x1 =20 #ifdef CONFIG_ARM_64 -#define XEN_MPUMAP_ENTRY_SHIFT 0x4 /* 16 byte structure */ +#define XEN_MPUMAP_ENTRY_SHIFT 0x5 /* 32 byte structure */ +#define XEN_MPUMAP_ENTRY_ZERO_OFFSET 0x10 /* {PRBAR, PRLAR} is 16 bytes = */ =20 .macro store_pair reg1, reg2, dst stp \reg1, \reg2, [\dst] .endm =20 +.macro zero_pair dst, offset, tmp1, tmp2 + stp xzr, xzr, [\dst, \offset] +.endm + #else -#define XEN_MPUMAP_ENTRY_SHIFT 0x3 /* 8 byte structure */ +#define XEN_MPUMAP_ENTRY_SHIFT 0x4 /* 16 byte structure */ +#define XEN_MPUMAP_ENTRY_ZERO_OFFSET 0x8 /* {PRBAR, PRLAR} is 8 bytes = */ =20 .macro store_pair reg1, reg2, dst strd \reg1, \reg2, [\dst] .endm =20 +.macro zero_pair dst, offset, tmp1, tmp2 + mov \tmp1, #0 + mov \tmp2, #0 + strd \tmp1, \tmp2, [\dst, \offset] +.endm + #endif =20 /* @@ -97,6 +109,9 @@ =20 3: =20 + /* Clear the rest of the xen_mpumap entry. Clobbers prbar and prlar. */ + zero_pair \base, #XEN_MPUMAP_ENTRY_ZERO_OFFSET, \prbar, \prlar + add \sel, \sel, #1 =20 1: diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index 0b05103180..38474bcfa2 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -251,13 +251,14 @@ static void disable_mpu_region_from_index(uint8_t ind= ex) * Update the entry in the MPU memory region mapping table (xen_mpumap) fo= r the * given memory range and flags, creating one if none exists. * - * @param base Base address (inclusive). - * @param limit Limit address (exclusive). - * @param flags Region attributes (a combination of PAGE_HYPERVISOR_XXX) + * @param base Base address (inclusive). + * @param limit Limit address (exclusive). + * @param flags Region attributes (a combination of PAGE_HYPERVISOR_XX= X) + * @param transient True for a temporary mapping, otherwise False. * @return 0 on success, otherwise negative on error. */ static int xen_mpumap_update_entry(paddr_t base, paddr_t limit, - unsigned int flags) + unsigned int flags, bool transient) { bool flags_has_page_present; uint8_t idx; @@ -297,6 +298,7 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_= t limit, return -ENOENT; =20 xen_mpumap[idx] =3D pr_of_addr(base, limit, flags); + region_set_transient(&xen_mpumap[idx], transient); =20 write_protection_region(&xen_mpumap[idx], idx); } @@ -316,7 +318,8 @@ static int xen_mpumap_update_entry(paddr_t base, paddr_= t limit, return 0; } =20 -int xen_mpumap_update(paddr_t base, paddr_t limit, unsigned int flags) +int xen_mpumap_update(paddr_t base, paddr_t limit, unsigned int flags, + bool transient) { int rc; =20 @@ -342,7 +345,7 @@ int xen_mpumap_update(paddr_t base, paddr_t limit, unsi= gned int flags) =20 spin_lock(&xen_mpumap_lock); =20 - rc =3D xen_mpumap_update_entry(base, limit, flags); + rc =3D xen_mpumap_update_entry(base, limit, flags, transient); if ( !rc ) context_sync_mpu(); =20 @@ -357,14 +360,15 @@ int destroy_xen_mappings(unsigned long s, unsigned lo= ng e) ASSERT(IS_ALIGNED(e, PAGE_SIZE)); ASSERT(s < e); =20 - return xen_mpumap_update(s, e, 0); + return xen_mpumap_update(s, e, 0, false); } =20 int map_pages_to_xen(unsigned long virt, mfn_t mfn, unsigned long nr_mfns, unsigned int flags) { /* MPU systems have no translation, ma =3D=3D va, so pass virt directl= y */ - return xen_mpumap_update(virt, mfn_to_maddr(mfn_add(mfn, nr_mfns)), fl= ags); + return xen_mpumap_update(virt, mfn_to_maddr(mfn_add(mfn, nr_mfns)), fl= ags, + false); } =20 /* @@ -385,7 +389,8 @@ static void __init setup_staticheap_mappings(void) paddr_t bank_end =3D bank_start + bank_size; =20 /* Map static heap with one MPU protection region */ - if ( xen_mpumap_update(bank_start, bank_end, PAGE_HYPERVISOR) ) + if ( xen_mpumap_update(bank_start, bank_end, PAGE_HYPERVISOR, + false) ) panic("Failed to map static heap\n"); =20 break; --=20 2.34.1