From nobody Wed Nov 27 22:34:22 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=anastas.io ARC-Seal: i=1; a=rsa-sha256; t=1686667890; cv=none; d=zohomail.com; s=zohoarc; b=HalEGmeMecyhOBVhb9xPD+TO5qWi3SpcI/Yz3n5YKXfaiZXWUl8QfsqJVuXgpf55tKsksM2Sa5egW4+iNPXjxsfMjpwurTwYtJtGpXPstWv/AF5fVQ6ZWJZEkOapu+kws2sBODjoN1k4GAnEyBVgevxEGgf6bHZV7ZjPBl/7Hio= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686667890; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=IbU6EcWr7YZ4EdzPsOScGPB8Em+0HwiCpqXqfyfw5yk=; b=e+9h27J/NJfPY5ierAk5VnUYVQVfskKPnDb7wsPjvG1d4Y2q8j2hm04/w769YXwLp8VIZh6Vp3XP1AcfdcYh8vq+WduW8tmVtzvc8WBGwfPgQU+4PMsEtTLCD+Xbp7qZFIuwpQ55AQveiBX0BPGAMnb+ttbNrxJdSeF4qLtlRps= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 168666789043386.0926233517066; Tue, 13 Jun 2023 07:51:30 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.548195.856030 (Exim 4.92) (envelope-from ) id 1q95MH-0003dI-0e; Tue, 13 Jun 2023 14:50:57 +0000 Received: by outflank-mailman (output) from mailman id 548195.856030; Tue, 13 Jun 2023 14:50:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q95MG-0003cH-Sf; Tue, 13 Jun 2023 14:50:56 +0000 Received: by outflank-mailman (input) for mailman id 548195; Tue, 13 Jun 2023 14:50:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q95MG-0003AR-A8 for xen-devel@lists.xenproject.org; Tue, 13 Jun 2023 14:50:56 +0000 Received: from alpha.anastas.io (alpha.anastas.io [104.248.188.109]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b1d15f96-09f9-11ee-8611-37d641c3527e; Tue, 13 Jun 2023 16:50:54 +0200 (CEST) Received: from authenticated-user (alpha.anastas.io [104.248.188.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by alpha.anastas.io (Postfix) with ESMTPSA id A134243CEB; Tue, 13 Jun 2023 07:50:20 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b1d15f96-09f9-11ee-8611-37d641c3527e DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=anastas.io; s=mail; t=1686667821; bh=+YId0qIzGL2wP+hRUog7lPwPFLFjkvuez2Pylo5yEJY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kyeB2mqCmzovy0/spOOevso5IH2pi6Qkx/TDrABe44VaoFtL5uzQavbjWDkyq1KoI QHjZypy9l+fHf7Z5soxozTLa8I3LgT3lsNdJWZ1P6T0O/SNYNnesyy1M9fL2rW4chp PUd6vr5Sw8FtLjLsAjLzcyyXdfT9crI9YvSgRPhMFE28ZrRWlxPSHxtPczQZbpo43Q oya4rqRnwUwMDFSRYybmUy3Lv8Lf7E+8bN7qTeFUoUv7FHLhx8dLQu1TF3esnrl+Lj 6881cHQHtz9zyn5QUm3Wtq2xd6jSclx5WrO8HNEwq3JJvTmcvEGq11pttGfdSB5caV FDRoGyXlZMxyA== From: Shawn Anastasio To: xen-devel@lists.xenproject.org Cc: tpearson@raptorengineering.com, Shawn Anastasio , Andrew Cooper , George Dunlap , Jan Beulich , Julien Grall , Stefano Stabellini , Wei Liu , Shawn Anastasio Subject: [PATCH v3 2/4] xen: Add files needed for minimal ppc64le build Date: Tue, 13 Jun 2023 09:50:00 -0500 Message-Id: In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @anastas.io) X-ZM-MESSAGEID: 1686667891407100003 Content-Type: text/plain; charset="utf-8" Add the build system changes required to build for ppc64le (POWER8+). As of now the resulting image simply boots to an infinite loop. $ make XEN_TARGET_ARCH=3Dppc64 -C xen openpower_defconfig $ make XEN_TARGET_ARCH=3Dppc64 SUBSYSTEMS=3Dxen -C xen build This port targets POWER8+ CPUs running in Little Endian mode specifically, and does not boot on older machines. Additionally, this initial skeleton only implements the PaPR/pseries boot protocol which allows it to be booted in a standard QEMU virtual machine: $ qemu-system-ppc64 -M pseries-5.2 -m 256M -kernel xen/xen Signed-off-by: Shawn Anastasio --- config/ppc64.mk | 5 + xen/Makefile | 5 +- xen/arch/ppc/Kconfig | 42 ++++++ xen/arch/ppc/Kconfig.debug | 0 xen/arch/ppc/Makefile | 16 +++ xen/arch/ppc/Rules.mk | 0 xen/arch/ppc/arch.mk | 11 ++ xen/arch/ppc/configs/openpower_defconfig | 13 ++ xen/arch/ppc/include/asm/config.h | 63 +++++++++ xen/arch/ppc/include/asm/page-bits.h | 7 + xen/arch/ppc/ppc64/Makefile | 1 + xen/arch/ppc/ppc64/asm-offsets.c | 0 xen/arch/ppc/ppc64/head.S | 27 ++++ xen/arch/ppc/xen.lds.S | 173 +++++++++++++++++++++++ 14 files changed, 361 insertions(+), 2 deletions(-) create mode 100644 config/ppc64.mk create mode 100644 xen/arch/ppc/Kconfig create mode 100644 xen/arch/ppc/Kconfig.debug create mode 100644 xen/arch/ppc/Makefile create mode 100644 xen/arch/ppc/Rules.mk create mode 100644 xen/arch/ppc/arch.mk create mode 100644 xen/arch/ppc/configs/openpower_defconfig create mode 100644 xen/arch/ppc/include/asm/config.h create mode 100644 xen/arch/ppc/include/asm/page-bits.h create mode 100644 xen/arch/ppc/ppc64/Makefile create mode 100644 xen/arch/ppc/ppc64/asm-offsets.c create mode 100644 xen/arch/ppc/ppc64/head.S create mode 100644 xen/arch/ppc/xen.lds.S diff --git a/config/ppc64.mk b/config/ppc64.mk new file mode 100644 index 0000000000..597f0668c3 --- /dev/null +++ b/config/ppc64.mk @@ -0,0 +1,5 @@ +CONFIG_PPC :=3D y +CONFIG_PPC64 :=3D y +CONFIG_PPC_$(XEN_OS) :=3D y + +CONFIG_XEN_INSTALL_SUFFIX :=3D diff --git a/xen/Makefile b/xen/Makefile index e89fc461fc..db5454fb58 100644 --- a/xen/Makefile +++ b/xen/Makefile @@ -38,7 +38,7 @@ EFI_MOUNTPOINT ?=3D $(BOOT_DIR)/efi ARCH=3D$(XEN_TARGET_ARCH) SRCARCH=3D$(shell echo $(ARCH) | \ sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/g' \ - -e s'/riscv.*/riscv/g') + -e s'/riscv.*/riscv/g' -e s'/ppc.*/ppc/g') export ARCH SRCARCH =20 # Allow someone to change their config file @@ -244,7 +244,7 @@ include $(XEN_ROOT)/Config.mk export TARGET_SUBARCH :=3D $(XEN_TARGET_ARCH) export TARGET_ARCH :=3D $(shell echo $(XEN_TARGET_ARCH) | \ sed -e 's/x86.*/x86/' -e s'/arm\(32\|64\)/arm/= g' \ - -e s'/riscv.*/riscv/g') + -e s'/riscv.*/riscv/g' -e s'/ppc.*/ppc/g') =20 export CONFIG_SHELL :=3D $(SHELL) export CC CXX LD NM OBJCOPY OBJDUMP ADDR2LINE @@ -563,6 +563,7 @@ _clean: $(Q)$(MAKE) $(clean)=3Dxsm $(Q)$(MAKE) $(clean)=3Dcrypto $(Q)$(MAKE) $(clean)=3Darch/arm + $(Q)$(MAKE) $(clean)=3Darch/ppc $(Q)$(MAKE) $(clean)=3Darch/riscv $(Q)$(MAKE) $(clean)=3Darch/x86 $(Q)$(MAKE) $(clean)=3Dtest diff --git a/xen/arch/ppc/Kconfig b/xen/arch/ppc/Kconfig new file mode 100644 index 0000000000..a0a70adef4 --- /dev/null +++ b/xen/arch/ppc/Kconfig @@ -0,0 +1,42 @@ +config PPC + def_bool y + +config PPC64 + def_bool y + select 64BIT + +config ARCH_DEFCONFIG + string + default "arch/ppc/configs/openpower_defconfig" + +menu "Architecture Features" + +source "arch/Kconfig" + +endmenu + +menu "ISA Selection" + +choice + prompt "Base ISA" + default POWER_ISA_2_07B if PPC64 + help + This selects the base ISA version that Xen will target. + +config POWER_ISA_2_07B + bool "Power ISA 2.07B" + help + Target version 2.07B of the Power ISA (POWER8) + +config POWER_ISA_3_00 + bool "Power ISA 3.00" + help + Target version 3.00 of the Power ISA (POWER9) + +endchoice + +endmenu + +source "common/Kconfig" + +source "drivers/Kconfig" diff --git a/xen/arch/ppc/Kconfig.debug b/xen/arch/ppc/Kconfig.debug new file mode 100644 index 0000000000..e69de29bb2 diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile new file mode 100644 index 0000000000..10b101cf9c --- /dev/null +++ b/xen/arch/ppc/Makefile @@ -0,0 +1,16 @@ +obj-$(CONFIG_PPC64) +=3D ppc64/ + +$(TARGET): $(TARGET)-syms + cp -f $< $@ + +$(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) -o $@ + $(NM) -pa --format=3Dsysv $(@D)/$(@F) \ + | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ + >$(@D)/$(@F).map + +$(obj)/xen.lds: $(src)/xen.lds.S FORCE + $(call if_changed_dep,cpp_lds_S) + +.PHONY: include +include: diff --git a/xen/arch/ppc/Rules.mk b/xen/arch/ppc/Rules.mk new file mode 100644 index 0000000000..e69de29bb2 diff --git a/xen/arch/ppc/arch.mk b/xen/arch/ppc/arch.mk new file mode 100644 index 0000000000..c185a5028a --- /dev/null +++ b/xen/arch/ppc/arch.mk @@ -0,0 +1,11 @@ +######################################## +# Power-specific definitions + +ppc-march-$(CONFIG_POWER_ISA_2_07B) :=3D power8 +ppc-march-$(CONFIG_POWER_ISA_3_00) :=3D power9 + +CFLAGS +=3D -mcpu=3D$(ppc-march-y) -mstrict-align -mcmodel=3Dlarge -mabi= =3Delfv2 -mno-altivec -mno-vsx + +# TODO: Drop override when more of the build is working +override ALL_OBJS-y =3D arch/$(TARGET_ARCH)/built_in.o +override ALL_LIBS-y =3D diff --git a/xen/arch/ppc/configs/openpower_defconfig b/xen/arch/ppc/config= s/openpower_defconfig new file mode 100644 index 0000000000..8783eb3488 --- /dev/null +++ b/xen/arch/ppc/configs/openpower_defconfig @@ -0,0 +1,13 @@ +# CONFIG_SCHED_CREDIT is not set +# CONFIG_SCHED_RTDS is not set +# CONFIG_SCHED_NULL is not set +# CONFIG_SCHED_ARINC653 is not set +# CONFIG_TRACEBUFFER is not set +# CONFIG_HYPFS is not set +# CONFIG_GRANT_TABLE is not set +# CONFIG_SPECULATIVE_HARDEN_ARRAY is not set + +CONFIG_PPC64=3Dy +CONFIG_DEBUG=3Dy +CONFIG_DEBUG_INFO=3Dy +CONFIG_EXPERT=3Dy diff --git a/xen/arch/ppc/include/asm/config.h b/xen/arch/ppc/include/asm/c= onfig.h new file mode 100644 index 0000000000..7a2862ef7a --- /dev/null +++ b/xen/arch/ppc/include/asm/config.h @@ -0,0 +1,63 @@ +#ifndef __PPC_CONFIG_H__ +#define __PPC_CONFIG_H__ + +#include +#include + +#if defined(CONFIG_PPC64) +#define LONG_BYTEORDER 3 +#define ELFSIZE 64 +#define MAX_VIRT_CPUS 1024u +#else +#error "Unsupported PowerPC variant" +#endif + +#define BYTES_PER_LONG (1 << LONG_BYTEORDER) +#define BITS_PER_LONG (BYTES_PER_LONG << 3) +#define POINTER_ALIGN BYTES_PER_LONG + +#define BITS_PER_LLONG 64 + +/* xen_ulong_t is always 64 bits */ +#define BITS_PER_XEN_ULONG 64 + +#define CONFIG_PPC_L1_CACHE_SHIFT 7 +#define CONFIG_PAGEALLOC_MAX_ORDER 18 +#define CONFIG_DOMU_MAX_ORDER 9 +#define CONFIG_HWDOM_MAX_ORDER 10 + +#define OPT_CONSOLE_STR "dtuart" +#define INVALID_VCPU_ID MAX_VIRT_CPUS + +/* Linkage for PPC */ +#ifdef __ASSEMBLY__ +#define ALIGN .align 2 + +#define ENTRY(name) = \ + .globl name; = \ + ALIGN; = \ + name: +#endif + +#define XEN_VIRT_START _AT(UL, 0x400000) + +#define SMP_CACHE_BYTES (1 << 6) + +#define STACK_ORDER 2 +#define STACK_SIZE (PAGE_SIZE << STACK_ORDER) + +/* 288 bytes below the stack pointer must be preserved by interrupt handle= rs */ +#define STACK_VOLATILE_AREA 288 + +/* size of minimum stack frame; C code can write into the caller's stack */ +#define STACK_FRAME_OVERHEAD 32 + +#endif /* __PPC_CONFIG_H__ */ +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/ppc/include/asm/page-bits.h b/xen/arch/ppc/include/as= m/page-bits.h new file mode 100644 index 0000000000..4c01bf9716 --- /dev/null +++ b/xen/arch/ppc/include/asm/page-bits.h @@ -0,0 +1,7 @@ +#ifndef __PPC_PAGE_BITS_H__ +#define __PPC_PAGE_BITS_H__ + +#define PAGE_SHIFT 16 /* 64 KiB Pages */ +#define PADDR_BITS 48 + +#endif /* __PPC_PAGE_BITS_H__ */ diff --git a/xen/arch/ppc/ppc64/Makefile b/xen/arch/ppc/ppc64/Makefile new file mode 100644 index 0000000000..3340058c08 --- /dev/null +++ b/xen/arch/ppc/ppc64/Makefile @@ -0,0 +1 @@ +obj-y +=3D head.o diff --git a/xen/arch/ppc/ppc64/asm-offsets.c b/xen/arch/ppc/ppc64/asm-offs= ets.c new file mode 100644 index 0000000000..e69de29bb2 diff --git a/xen/arch/ppc/ppc64/head.S b/xen/arch/ppc/ppc64/head.S new file mode 100644 index 0000000000..e24331f95c --- /dev/null +++ b/xen/arch/ppc/ppc64/head.S @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +.section .text.header, "ax", %progbits + +ENTRY(start) + /* + * Depending on how we were booted, the CPU could be running in either + * Little Endian or Big Endian mode. The following trampoline from Lin= ux + * cleverly uses an instruction that encodes to a NOP if the CPU's + * endianness matches the assumption of the assembler (LE, in our case) + * or a branch to code that performs the endian switch in the other ca= se. + */ + tdi 0, 0, 0x48 /* Reverse endian of b . + 8 */ + b $ + 44 /* Skip trampoline if endian is good */ + .long 0xa600607d /* mfmsr r11 */ + .long 0x01006b69 /* xori r11,r11,1 */ + .long 0x00004039 /* li r10,0 */ + .long 0x6401417d /* mtmsrd r10,1 */ + .long 0x05009f42 /* bcl 20,31,$+4 */ + .long 0xa602487d /* mflr r10 */ + .long 0x14004a39 /* addi r10,r10,20 */ + .long 0xa6035a7d /* mtsrr0 r10 */ + .long 0xa6037b7d /* mtsrr1 r11 */ + .long 0x2400004c /* rfid */ + + /* Now that the endianness is confirmed, continue */ +1: b 1b diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S new file mode 100644 index 0000000000..89fcdc9c00 --- /dev/null +++ b/xen/arch/ppc/xen.lds.S @@ -0,0 +1,173 @@ +#include + +#undef ENTRY +#undef ALIGN + +OUTPUT_ARCH(powerpc:common64) +ENTRY(start) + +PHDRS +{ + text PT_LOAD ; +#if defined(BUILD_ID) + note PT_NOTE ; +#endif +} + +/** + * OF's base load address is 0x400000 (XEN_VIRT_START). + * By defining sections this way, we can keep our virtual address base at = 0x400000 + * while keeping the physical base at 0x0. + * + * Without this, OF incorrectly loads .text at 0x400000 + 0x400000 =3D 0x8= 00000. + * Taken from x86/xen.lds.S + */ +#ifdef CONFIG_LD_IS_GNU +# define DECL_SECTION(x) x : AT(ADDR(#x) - XEN_VIRT_START) +#else +# define DECL_SECTION(x) x : AT(ADDR(x) - XEN_VIRT_START) +#endif + +SECTIONS +{ + . =3D XEN_VIRT_START; + + DECL_SECTION(.text) { + _stext =3D .; /* Text section */ + *(.text.header) + + *(.text.cold) + *(.text.unlikely .text.*_unlikely .text.unlikely.*) + + *(.text) +#ifdef CONFIG_CC_SPLIT_SECTIONS + *(.text.*) +#endif + + *(.fixup) + *(.gnu.warning) + . =3D ALIGN(POINTER_ALIGN); + _etext =3D .; /* End of text section */ + } :text + + . =3D ALIGN(PAGE_SIZE); + DECL_SECTION(.rodata) { + _srodata =3D .; /* Read-only data */ + *(.rodata) + *(.rodata.*) + *(.data.rel.ro) + *(.data.rel.ro.*) + + VPCI_ARRAY + + . =3D ALIGN(POINTER_ALIGN); + _erodata =3D .; /* End of read-only data */ + } :text + + #if defined(BUILD_ID) + . =3D ALIGN(4); + DECL_SECTION(.note.gnu.build-id) { + __note_gnu_build_id_start =3D .; + *(.note.gnu.build-id) + __note_gnu_build_id_end =3D .; + } :note :text + #endif + _erodata =3D .; /* End of read-only data */ + + . =3D ALIGN(PAGE_SIZE); + DECL_SECTION(.data.ro_after_init) { + __ro_after_init_start =3D .; + *(.data.ro_after_init) + . =3D ALIGN(PAGE_SIZE); + __ro_after_init_end =3D .; + } : text + + DECL_SECTION(.data.read_mostly) { + *(.data.read_mostly) + } :text + + . =3D ALIGN(PAGE_SIZE); + DECL_SECTION(.data) { /* Data */ + *(.data.page_aligned) + . =3D ALIGN(8); + __start_schedulers_array =3D .; + *(.data.schedulers) + __end_schedulers_array =3D .; + + HYPFS_PARAM + + *(.data .data.*) + CONSTRUCTORS + } :text + + . =3D ALIGN(PAGE_SIZE); /* Init code and data */ + __init_begin =3D .; + DECL_SECTION(.init.text) { + _sinittext =3D .; + *(.init.text) + _einittext =3D .; + . =3D ALIGN(PAGE_SIZE); /* Avoid mapping alt insns executab= le */ + } :text + + . =3D ALIGN(PAGE_SIZE); + DECL_SECTION(.init.data) { + *(.init.rodata) + *(.init.rodata.*) + + . =3D ALIGN(POINTER_ALIGN); + __setup_start =3D .; + *(.init.setup) + __setup_end =3D .; + + __initcall_start =3D .; + *(.initcallpresmp.init) + __presmp_initcall_end =3D .; + *(.initcall1.init) + __initcall_end =3D .; + + LOCK_PROFILE_DATA + + *(.init.data) + *(.init.data.rel) + *(.init.data.rel.*) + + . =3D ALIGN(8); + __ctors_start =3D .; + *(.ctors) + *(.init_array) + *(SORT(.init_array.*)) + __ctors_end =3D .; + } :text + . =3D ALIGN(POINTER_ALIGN); + __init_end =3D .; + + DECL_SECTION(.bss) { /* BSS */ + __bss_start =3D .; + *(.bss.stack_aligned) + . =3D ALIGN(PAGE_SIZE); + *(.bss.page_aligned) + . =3D ALIGN(PAGE_SIZE); + __per_cpu_start =3D .; + *(.bss.percpu.page_aligned) + *(.bss.percpu) + . =3D ALIGN(SMP_CACHE_BYTES); + *(.bss.percpu.read_mostly) + . =3D ALIGN(SMP_CACHE_BYTES); + __per_cpu_data_end =3D .; + *(.bss .bss.*) + . =3D ALIGN(POINTER_ALIGN); + __bss_end =3D .; + } :text + _end =3D . ; + + /* Section for the device tree blob (if any). */ + DECL_SECTION(.dtb) { *(.dtb) } :text + + DWARF2_DEBUG_SECTIONS + + DISCARD_SECTIONS + + STABS_DEBUG_SECTIONS + + ELF_DETAILS_SECTIONS +} --=20 2.30.2