From nobody Mon Feb 9 20:36:05 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1606406015; cv=none; d=zohomail.com; s=zohoarc; b=dLMuHBi66j4zVR59psZBck7ZhZFJ7xH/zy+3xiJgSmAjW/swYujQPlRh1xH90YlsOr1o1bKuLGoVQndisr8zpv65D5SpW6Q1nFJvX03qa9vgIshAdMSKEYpufqeUuU+Tj9QctUZUgjpVonw8FX0v9HWktIUF78C55D3+BsgCd6s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1606406015; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=TyeLHi6VDkMTZJvogLcmAfg4/of2PvDULqi7e66NvS8=; b=GI3z6uoDrzWMaWBrcr7XhCEyg8gn6EHqqm24FzZQZBaibyh0Y3uBl/aYdaVM7Yha4eKBEpaYGKS9xW7r2QH0HFcRk8Qd0stkjRIhoXHRUo0Iia7sVpgsKNfGF7y5kuz+b2B+AasOHT0R3T7mavrL49UND8HbnWMmmoEIc8Pd+/A= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 160640601597879.46970267869108; Thu, 26 Nov 2020 07:53:35 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.38701.71503 (Exim 4.92) (envelope-from ) id 1kiJaC-0004Xl-Fo; Thu, 26 Nov 2020 15:53:20 +0000 Received: by outflank-mailman (output) from mailman id 38701.71503; Thu, 26 Nov 2020 15:53:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kiJaC-0004Xc-BN; Thu, 26 Nov 2020 15:53:20 +0000 Received: by outflank-mailman (input) for mailman id 38701; Thu, 26 Nov 2020 15:53:18 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kiJaA-0004Ch-IS for xen-devel@lists.xenproject.org; Thu, 26 Nov 2020 15:53:18 +0000 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id f5a14498-556f-4d9b-bcff-08e943744578; Thu, 26 Nov 2020 15:53:06 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1C7B331B; Thu, 26 Nov 2020 07:53:06 -0800 (PST) Received: from e109506-lin.cambridge.arm.com (e109506-lin.cambridge.arm.com [10.1.199.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6D6863F23F; Thu, 26 Nov 2020 07:53:05 -0800 (PST) Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1kiJaA-0004Ch-IS for xen-devel@lists.xenproject.org; Thu, 26 Nov 2020 15:53:18 +0000 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id f5a14498-556f-4d9b-bcff-08e943744578; Thu, 26 Nov 2020 15:53:06 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1C7B331B; Thu, 26 Nov 2020 07:53:06 -0800 (PST) Received: from e109506-lin.cambridge.arm.com (e109506-lin.cambridge.arm.com [10.1.199.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6D6863F23F; Thu, 26 Nov 2020 07:53:05 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f5a14498-556f-4d9b-bcff-08e943744578 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Volodymyr Babchuk Subject: [PATCH 5/7] xen/arm: Add handler for cp15 ID registers Date: Thu, 26 Nov 2020 15:51:07 +0000 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add support for emulation of cp15 based ID registers (on arm32 or when running a 32bit guest on arm64). The handlers are returning the values stored in the guest_cpuinfo structure. In the current status the MVFR registers are no supported. Signed-off-by: Bertrand Marquis --- xen/arch/arm/vcpreg.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/xen/arch/arm/vcpreg.c b/xen/arch/arm/vcpreg.c index cdc91cdf5b..d0c6406f34 100644 --- a/xen/arch/arm/vcpreg.c +++ b/xen/arch/arm/vcpreg.c @@ -155,6 +155,14 @@ TVM_REG32(CONTEXTIDR, CONTEXTIDR_EL1) break; \ } =20 +/* Macro to generate easily case for ID co-processor emulation */ +#define GENERATE_TID3_INFO(reg,field,offset) \ + case HSR_CPREG32(reg): \ + { \ + return handle_ro_read_val(regs, regidx, cp32.read, hsr, \ + 1, guest_cpuinfo.field.bits[offset]); \ + } + void do_cp15_32(struct cpu_user_regs *regs, const union hsr hsr) { const struct hsr_cp32 cp32 =3D hsr.cp32; @@ -286,6 +294,33 @@ void do_cp15_32(struct cpu_user_regs *regs, const unio= n hsr hsr) */ return handle_raz_wi(regs, regidx, cp32.read, hsr, 1); =20 + /* + * HCR_EL2.TID3 + * + * This is trapping most Identification registers used by a guest + * to identify the processor features + */ + GENERATE_TID3_INFO(ID_PFR0, pfr32, 0) + GENERATE_TID3_INFO(ID_PFR1, pfr32, 1) + GENERATE_TID3_INFO(ID_PFR2, pfr32, 2) + GENERATE_TID3_INFO(ID_DFR0, dbg32, 0) + GENERATE_TID3_INFO(ID_DFR1, dbg32, 1) + GENERATE_TID3_INFO(ID_AFR0, aux32, 0) + GENERATE_TID3_INFO(ID_MMFR0, mm32, 0) + GENERATE_TID3_INFO(ID_MMFR1, mm32, 1) + GENERATE_TID3_INFO(ID_MMFR2, mm32, 2) + GENERATE_TID3_INFO(ID_MMFR3, mm32, 3) + GENERATE_TID3_INFO(ID_MMFR4, mm32, 4) + GENERATE_TID3_INFO(ID_MMFR5, mm32, 5) + GENERATE_TID3_INFO(ID_ISAR0, isa32, 0) + GENERATE_TID3_INFO(ID_ISAR1, isa32, 1) + GENERATE_TID3_INFO(ID_ISAR2, isa32, 2) + GENERATE_TID3_INFO(ID_ISAR3, isa32, 3) + GENERATE_TID3_INFO(ID_ISAR4, isa32, 4) + GENERATE_TID3_INFO(ID_ISAR5, isa32, 5) + GENERATE_TID3_INFO(ID_ISAR6, isa32, 6) + /* MVFR registers are in cp10 no cp15 */ + /* * HCR_EL2.TIDCP * --=20 2.17.1