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([94.75.70.14]) by smtp.gmail.com with ESMTPSA id j7-20020a056512108700b0050e6df07728sm45983lfg.180.2023.12.22.07.13.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Dec 2023 07:13:51 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b73781d9-a0dc-11ee-98eb-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1703258031; x=1703862831; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n4dajvonh7p2dNVDQKVaYgfkmYnC6XrrNf5FliBDwEk=; b=ODjufzVW60is2uDmnbGJIqgytnGqAyaTeA2MHPATqdVd9R3MSDSX8jW3zCJWIDpR6b ug9gMs/ClY5ZxmyKq8hOzpZ3nbVa7paU0W8keKXD9JpfiUkJpfGgUbeTb12SpJzEANMS cxUKzTxPVu3X+lkAbNuTXxR3918iFRhNRXyCAgwRw5G53hJUO5sGBz8/O63qybI7Hz1u 08gr/Zv5ST716X4OVGE+9dZPPLt8XbmBYRA9AWrIiyReQUSLx27N2Frk6Se+ld7cCQ+U ujLQHc432mUUEi35cNv7FOFFKSgHtorAEszcStBWJUTuL54QzBqeP0GFkLSN6/kAL2HV qEBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703258031; x=1703862831; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n4dajvonh7p2dNVDQKVaYgfkmYnC6XrrNf5FliBDwEk=; b=ll1edS6cy/N17TI3CCag+JoP22wTXRbQ9FdskwE63xX5CvnH/xhIoSsmm7JzpTBuwX 7cF49cMHDO41mQZ44WXNC9A+Xb0RuM0/ubvPzVLjLYFnwgdtfNUppo/4nu3Jcv05Yu/W Ckm38z8p/Nr7ocFoGaqrI31lxRL34eqorCfTOkuTskVrMovmEqGTdFGD+se0tp7FTtoQ 1NU1ZR2yPQea3f3GPMkxug/GuJKZ+b18WZOjmo6fh+24scSW/WNLh3ko48igc18f0/XM 8OBSiVCMCVSy98303SssAIkHDIUUw2IoR9pkX+K9jlg7eVha2V9ONvpBES1ntm+/Bj/K atFA== X-Gm-Message-State: AOJu0YxkWpwMklX8HWueSx2DXX936r5rlZjRIWaFe7FwMm30tAqYQVj9 7xH40wvIjccGL5PjvnI3DWueq8jh1vs= X-Google-Smtp-Source: AGHT+IFep3VFmnA/8jd+wAqjCvmLQK9PUeHJroMGSpFKvtKvD1wPEOIRkMbFa3HiLiY5Jdz1I7H3Aw== X-Received: by 2002:a05:6512:144:b0:50e:3e3d:217c with SMTP id m4-20020a056512014400b0050e3e3d217cmr735545lfo.84.1703258031537; Fri, 22 Dec 2023 07:13:51 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , George Dunlap , Jan Beulich , Julien Grall , Stefano Stabellini , Wei Liu Subject: [PATCH v3 27/34] xen/riscv: define an address of frame table Date: Fri, 22 Dec 2023 17:13:11 +0200 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1703258387571100001 Content-Type: text/plain; charset="utf-8" Also, the patch adds some helpful macros that assist in avoiding the redefinition of memory layout for each MMU mode. Signed-off-by: Oleksii Kurochko --- Changes in V3: - drop OFFSET_BITS, and use PAGE_SHIFT instead. - code style fixes. - add comment how macros are useful. - move all memory related layout definitions close to comment with memory = layout description. - make memory layout description generic for any MMU mode. --- Changes in V2: - Nothing changed. Only rebase. --- xen/arch/riscv/include/asm/config.h | 85 +++++++++++++++++++---------- 1 file changed, 55 insertions(+), 30 deletions(-) diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/a= sm/config.h index f0544c6a20..fb9fc9daaa 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -6,6 +6,14 @@ #include #include =20 +#ifdef CONFIG_RISCV_64 +#define CONFIG_PAGING_LEVELS 3 +#define RV_STAGE1_MODE SATP_MODE_SV39 +#else +#define CONFIG_PAGING_LEVELS 2 +#define RV_STAGE1_MODE SATP_MODE_SV32 +#endif + /* * RISC-V64 Layout: * @@ -22,25 +30,56 @@ * * It means that: * top VA bits are simply ignored for the purpose of translating to PA. +#endif * - * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D - * Start addr | End addr | Size | Slot |area descri= ption - * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D - * FFFFFFFFC0800000 | FFFFFFFFFFFFFFFF |1016 MB | L2 511 | Unused - * FFFFFFFFC0600000 | FFFFFFFFC0800000 | 2 MB | L2 511 | Fixmap - * FFFFFFFFC0200000 | FFFFFFFFC0600000 | 4 MB | L2 511 | FDT - * FFFFFFFFC0000000 | FFFFFFFFC0200000 | 2 MB | L2 511 | Xen - * ... | 1 GB | L2 510 | Unused - * 0000003200000000 | 0000007F80000000 | 309 GB | L2 200-509 | Direct map - * ... | 1 GB | L2 199 | Unused - * 0000003100000000 | 00000031C0000000 | 3 GB | L2 196-198 | Frametable - * ... | 1 GB | L2 195 | Unused - * 0000003080000000 | 00000030C0000000 | 1 GB | L2 194 | VMAP - * ... | 194 GB | L2 0 - 193 | Unused - * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D + * SATP_MODE_SV32 | SATP_MODE_SV39 | SATP_MODE_SV48 | SATP_MOD= E_SV57 + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D|=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D|=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D|=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D + * BA0 | FFFFFFFFFFE00000 | FFFFFFFFC0000000 | FFFFFF8000000000 | FFFF0000= 00000000 + * BA1 | 0000000019000000 | 0000003200000000 | 0000640000000000 | 00C80000= 00000000 + * BA2 | 0000000018800000 | 0000003100000000 | 0000620000000000 | 00C40000= 00000000 + * BA3 | 0000000018400000 | 0000003080000000 | 0000610000000000 | 00C20000= 00000000 * -#endif + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D + * Start addr | End addr | Size | Root PT slot | Area des= cription + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D + * BA0 + 0x800000 | FFFFFFFFFFFFFFFF |1016 MB | 511 | Unused + * BA0 + 0x400000 | BA0 + 0x800000 | 2 MB | 511 | Fixmap + * BA0 + 0x200000 | BA0 + 0x400000 | 4 MB | 511 | FDT + * BA0 | BA0 + 0x200000 | 2 MB | 511 | Xen + * ... | 1 GB | 510 | Unused + * BA1 + 0x000000 | BA1 + 0x4D80000000 | 309 GB | 200-509 | Direct m= ap + * ... | 1 GB | 199 | Unused + * BA2 + 0x000000 | BA2 + 0xC0000000 | 3 GB | 196-198 | Frametab= le + * ... | 1 GB | 195 | Unused + * BA3 + 0x000000 | BA3 + 0x40000000 | 1 GB | 194 | VMAP + * ... | 194 GB | 0 - 193 | Unused + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D */ +#define VPN_BITS (9) + +#define HYP_PT_ROOT_LEVEL (CONFIG_PAGING_LEVELS - 1) + +#ifdef CONFIG_RISCV_64 + +#define SLOTN_ENTRY_BITS (HYP_PT_ROOT_LEVEL * VPN_BITS + PAGE_SHIFT) +#define SLOTN(slot) (_AT(vaddr_t, slot) << SLOTN_ENTRY_BITS) +#define SLOTN_ENTRY_SIZE SLOTN(1) + +#define XEN_VIRT_START 0xFFFFFFFFC0000000 /* (_AC(-1, UL) + 1 - GB(1)) */ + +#define FRAMETABLE_VIRT_START SLOTN(196) +#define FRAMETABLE_SIZE GB(3) +#define FRAMETABLE_NR (FRAMETABLE_SIZE / sizeof(*frame_table)) +#define FRAMETABLE_VIRT_END (FRAMETABLE_VIRT_START + FRAMETABLE_SIZE -= 1) + +#define VMAP_VIRT_START SLOTN(194) +#define VMAP_VIRT_SIZE GB(1) + +#else +#error "RV32 isn't supported" +#endif + +#define HYPERVISOR_VIRT_START XEN_VIRT_START =20 #if defined(CONFIG_RISCV_64) # define LONG_BYTEORDER 3 @@ -77,24 +116,10 @@ name: #endif =20 -#ifdef CONFIG_RISCV_64 -#define XEN_VIRT_START 0xFFFFFFFFC0000000 /* (_AC(-1, UL) + 1 - GB(1)) */ -#else -#error "RV32 isn't supported" -#endif - #define SMP_CACHE_BYTES (1 << 6) =20 #define STACK_SIZE PAGE_SIZE =20 -#ifdef CONFIG_RISCV_64 -#define CONFIG_PAGING_LEVELS 3 -#define RV_STAGE1_MODE SATP_MODE_SV39 -#else -#define CONFIG_PAGING_LEVELS 2 -#define RV_STAGE1_MODE SATP_MODE_SV32 -#endif - #define IDENT_AREA_SIZE 64 =20 #endif /* __RISCV_CONFIG_H__ */ --=20 2.43.0