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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:25 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843967; x=1788448767; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=MSA2XSuQON0U1rePCfP+E/HBswfjDsdSbSkNg0cOA2o=; b=gsViz1e/yMOUknwCO8JNqfXR6+P1FT5WlYtAWYP6ATIXAhUlwfIZbylEXfIhjQrN+Y I3ut/Zq6flJMbFtlhhbg2vevUveu8Aj4gweSqpBOFlMwFHovsw+Oa0IcrweIrYhpScoi QepUUbG+2UNlmq4QZCnto/7IRhmlxNjhO4gQ4qXrmkLYG90UutGsaut3KvmRppKCWM+G qY+uhZX+QF6D3fVvxGsjF+o6e4PWa77QzBUn8a3AwOluixhfFqov9excJbKms0NEyq2f QH458kZkSD7/yPg0ZcCUbf9z+4XAjBIbupstuLlpFIDLh3TyEVrOdvxS0oQBwrByjS6T 7udA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843967; x=1788448767; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=MSA2XSuQON0U1rePCfP+E/HBswfjDsdSbSkNg0cOA2o=; b=APRn8GD2O+WKDOdWG1uYyNF+Ql9xdSogra7PPSs8HdPjMmLL3wUGQTeNjlYcUSWRSv lSXubyrxg+Rl7Qfc1zfa/h7jQFacVq8NGaPmVdE0ZNCLf6Mwc/FOk5CJJBXC+xHGWzB8 894TweFson+eCdOMgWJyi6wpfTRMSCK4irmN+XBkqhbbIV/k+Nipx3H45hKK5rVlgHxF LHr2W+xFJRoFYN2EUGJK38fiEf6LLFEwiUNxLYzCCBQ12+5jfSVC8kmT0+ccfd3M1Yr4 Zn6HLtbX3pZbleSRmfvgFqvaKrDUFLn9NzvJ4ZsOHLl2/uNhK107yxwO7GaSdTpSINP2 fQ5Q== X-Gm-Message-State: AFuF++lwF2pawGFbkMkbf23zfEK616wJFF78xg4P8FeWb0UCydDyZbNf 7SX5KIISCW7va+0ZD3z8vQZZReYFp2gP3FOhmR4gxe2LFP/EAH+U4UjGdmvx4g== X-Gm-Gg: AR+sD12kYhSCFyRM1N5SWv0TQwV8MWnfnKdPnXA36UcWJ07eqDalBuW3SnP94GMzWQH R7S8gwieED0YfvMt9TC6uIt/BrRc6rLH8mjo58obqTWNz2B0Qg/eNinUXPOKqQVNfPPOSARRq8u /u0MR/Yo+Ji7WNUZp213QOEm4HaAaR6IiAczz4K4+Uwjs1TYIsfrrbG7NlnUoJu4wbffqPF9g9z ocQL5ffVxopwI5ZDKt3TqVfvbO+v6PI0BTu2WhXMIVyT0Zl31mL4YMWu4LQl5Xc+ZE06LiG3I1C yxUfK75Ti2pXgdf9AL/oqRgNn30breW4B6R64MeEe30xq3qKeNqIkzUljslP/PIGfhq462LSQwr zoDqfkxJh4yT+XxBVFLWpZNDGi8bIQqJ8PLoD42//Be8QgW/AHrvpeku7TBXvsBb/LiOMGEOORJ AkFVN7qX/sry38bwvp9s0zThFoWPMamAQGJ+hW+DFWcL7Gbb+CA7T+Yx0pxBAEcmyOr7gRo8jTH 0qOcxP0cOtv39kajEmzP0hfr/SYlcpcHw== X-Received: by 2002:a05:6000:1889:b0:482:f653:395c with SMTP id ffacd0b85a97d-482f6533a6amr944485f8f.16.1787843966521; Thu, 27 Aug 2026 08:19:26 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH v8 01/20] xen: introduce CONFIG_HAS_SHARED_INFO for archs without a shared page Date: Thu, 27 Aug 2026 17:18:54 +0200 Message-ID: <5241d1e3f1f1fcaf0c3655d37a5c2d3ec5594711.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1787843967-C2ECEB50-A727C7A4/10/73395122804 X-purgate-type: spam X-purgate-size: 19135 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844009501158500 Content-Type: text/plain; charset="utf-8" On architectures that run guests in dom0less mode without the PV ABI (currently RISC-V), no shared_info page is allocated and d->shared_info remains NULL throughout the domain lifetime. Several places in common code access d->shared_info through the shared_info() macro or directly, causing UBSAN null-pointer errors on such architectures. Rather than adding runtime NULL guards that are logically unreachable on x86 and Arm (where shared_info is always allocated), introduce a new Kconfig symbol CONFIG_HAS_SHARED_INFO selected by x86 and Arm. On !HAS_SHARED_INFO the shared_info() macro expands to a dereference of shared_info_absent, an extern pointer that is declared but intentionally never defined. Any use of shared_info() that is not dead-code-eliminated will therefore cause a link-time failure, making missed guards impossible to overlook. The 2L event-channel ops call shared_info() and must not be compiled on architectures without a shared_info page, so event_2l.o is gated on CONFIG_HAS_SHARED_INFO. On such architectures evtchn_init() installs the FIFO ops as a placeholder instead, so that a later guest opt-in to the FIFO ABI via EVTCHNOP_init_control has no special-casing to do; if FIFO support itself is also unavailable (!CONFIG_EVTCHN_FIFO), a dedicated no-op evtchn_port_ops_none table is installed instead, so that d->evtchn_port_ops is never NULL. evtchn_fifo_word_from_port() is guarded against uninitialised d->evtchn_fifo so the FIFO ops are safe before evtchn_fifo_init_control() is called by the guest. With CONFIG_HAS_SHARED_INFO=3Dn all vCPUs fall back to the global dummy_vcpu_info, so writes through vcpu_info() could leak data between vCPUs. Reviewing the write paths in common code: the write in map_guest_area() stores the constant ~0 so nothing serious would happen if it were leaked; the event_2l.c paths are not compiled on !HAS_SHARED_INFO, as event_2l.o is gated on CONFIG_HAS_SHARED_INFO; the write in vcpu_info_populate() targets the new mapping buffer, not dummy_vcpu_info. Outside common code, the remaining writes are x86 PV-specific, for which CONFIG_HAS_SHARED_INFO=3Dy. No code changes are needed. Finally, struct domain's shared_info field itself is gated on CONFIG_HAS_SHARED_INFO, as it would otherwise be a permanently NULL pointer: every user of it is either arch code for an architecture that selects HAS_SHARED_INFO, or common code already guarded by the same Kconfig symbol. Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- Changes in v8: - Introduce evtchn_preinit(). - Update some comments in the code. - Add Reviewed-by: Jan Beulich . --- Changes in v7: - domctl.c: use a plain #ifdef CONFIG_HAS_SHARED_INFO / #else instead of the IS_ENABLED() if/else in getdomaininfo(), and set info->shared_info_frame to ~0 in the !HAS_SHARED_INFO case. - sched.h: drop struct domain's shared_info field when !HAS_SHARED_INFO, rather than keeping a field that can only ever be NULL there. All of its users are either in arch code selecting HAS_SHARED_INFO or already guarded by CONFIG_HAS_SHARED_INFO, so no further changes are needed. Update the commit message accordingly. --- Changes in v6: - s/INVALID_GFN_RAW/gfn_x(INVALID_GFN) as INVALID_GFN_RAW was dropped. - event_channel.c: make evtchn_none_init() static, moving the evtchn_port_ops_none table and its definition above evtchn_reset(), their first caller; move the leftover prototype into the #else arm of the same #ifndef guard instead of leaving it as a free-standing non-static declaration. - event_channel.c: evtchn_reset() now follows the same IS_ENABLED(CONFIG_HAS_SHARED_INFO) / IS_ENABLED(CONFIG_EVTCHN_FIFO) / else cascade already used by evtchn_init(), rather than assuming the FIFO ABI is unconditionally available whenever d->evtchn_fifo was set. - event_channel.c: narrow the evtchn_port_ops_none / evtchn_none_init guard from !CONFIG_HAS_SHARED_INFO to !CONFIG_HAS_SHARED_INFO && !CONFIG_EVTCHN_FIFO, so the placeholder cf_check functions are only built for the one combination that actually needs them. - event_channel.c: fix the evtchn_port_ops_none comment, which claimed the ops were never reachable in practice; they are reached whenever an event is delivered to (or queried on) a !HAS_SHARED_INFO && !EVTCHN_FIFO domain, they just have no ABI to record it in and discard it. - event_channel.h / event_fifo.c: drop the static inline evtchn_fifo_init_ops() stub for !CONFIG_EVTCHN_FIFO; a plain declaration outside the #ifdef/#else is enough, matching the treatment already given to evtchn_2l_init() and evtchn_none_init(). Update the "only call site" comment in event_fifo.c to mention both evtchn_init() and evtchn_reset(). --- Changes in v5: - drop the static inline evtchn_2l_init() stub for !HAS_SHARED_INFO; a plain declaration is enough since the only call sites are guarded by IS_ENABLED(CONFIG_HAS_SHARED_INFO) and the dead call is eliminated before linking. - fix a NULL d->evtchn_port_ops dereference when CONFIG_HAS_SHARED_INFO=3Dn and CONFIG_EVTCHN_FIFO=3Dn: evtchn_init() was unconditionally calling evtchn_fifo_init_ops(), whose !EVTCHN_FIFO stub leaves d->evtchn_port_ops unset. Gate the FIFO branch on IS_ENABLED(CONFIG_EVTCHN_FIFO) and add a dedicated evtchn_port_ops_none table for the remaining case. Stubs are shared where signatures permit: evtchn_none_noop covers both clear_pending and unmask; evtchn_none_false covers both is_pending and is_masked. evtchn_none_init() is called only from event_channel.c, so its declaration is kept there rather than in event_channel.h. - gate evtchn_fifo_init_ops() on !CONFIG_HAS_SHARED_INFO; its only call site is in the IS_ENABLED(CONFIG_EVTCHN_FIFO) dead branch of evtchn_init(), which is never reached on HAS_SHARED_INFO=3Dy builds. --- Changes in v4: - event_channel.c: drop the redundant evtchn_fifo_init_ops() in the else branch of evtchn_reset(); evtchn_fifo_destroy() does not undo the ops installed by evtchn_init(), so only the switch back to 2-level ABI needs an explicit call. - shared.h: simplify the !HAS_SHARED_INFO shared_info() definition to use an undefined "extern struct shared_info *shared_info_absent" instead of shared_info_absent() with a typeof cast. - Extend the commit description to note that vcpu_info()/__vcpu_info() uses were also audited: on !HAS_SHARED_INFO vcpu_info_area.map points at dummy_vcpu_info, reads are harmless, and writes in common code do not open a cross-domain info-leak side channel, so no code changes are needed on that path. --- Changes in v3: - Introduce CONFIG_HAS_SHARED_INFO Kconfig symbol selected by x86 and Arm; RISC-V does not select it. - Gate shared_info() macro on CONFIG_HAS_SHARED_INFO; on !HAS_SHARED_INFO it calls shared_info_absent() (declared, never defined) so any unguarded use produces a link-time error. - Replace runtime if (!d->shared_info) guards with IS_ENABLED() at call sites so both branches type-check and dead code is eliminated. - Guard shared_info_frame assignment in domctl.c. - Gate event_2l.o on CONFIG_HAS_SHARED_INFO; use FIFO ops as placeholder on !HAS_SHARED_INFO archs instead of dedicated stub ops; guard evtchn_fifo_word_from_port() against uninitialised d->evtchn_fifo. - Add static inline stubs for evtchn_2l_init() (!HAS_SHARED_INFO) and evtchn_fifo_init_ops() (!EVTCHN_FIFO) so call sites can use IS_ENABLED() without #ifdef. - Drop inaccurate changelog entry about "only FIFO ABI" migration. - Update the commit message. - Drop R-by: Baptiste ... as some extra checks are added. --- Changes in v2: - Update commit message + subject. - Drop Fixes tag. --- xen/arch/arm/Kconfig | 1 + xen/arch/x86/Kconfig | 1 + xen/common/Kconfig | 3 +++ xen/common/Makefile | 2 +- xen/common/domain.c | 6 ++--- xen/common/domctl.c | 4 +++ xen/common/event_channel.c | 55 +++++++++++++++++++++++++++++++++++--- xen/common/event_channel.h | 6 +++++ xen/common/event_fifo.c | 18 ++++++++++++- xen/common/time.c | 2 ++ xen/include/xen/event.h | 2 +- xen/include/xen/sched.h | 2 ++ xen/include/xen/shared.h | 6 +++++ xen/include/xen/time.h | 5 ++++ 14 files changed, 104 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 843a43897e7b..d748404e82da 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -20,6 +20,7 @@ config ARM select HAS_DEVICE_TREE_DISCOVERY select HAS_DOM0LESS select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE + select HAS_SHARED_INFO select HAS_STACK_PROTECTOR select HAS_STATIC_MEMORY select HAS_UBSAN diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 3ce0774b8d76..e5535ac48467 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -29,6 +29,7 @@ config X86 select HAS_PCI_MSI select HAS_PIRQ select HAS_SCHED_GRANULARITY + select HAS_SHARED_INFO imply HAS_SOFT_RESET select HAS_UBSAN select HAS_VMAP diff --git a/xen/common/Kconfig b/xen/common/Kconfig index da80fdba8469..5b289e444fa5 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -158,6 +158,9 @@ config HAS_PMAP config HAS_SCHED_GRANULARITY bool =20 +config HAS_SHARED_INFO + bool + config HAS_STATIC_MEMORY bool =20 diff --git a/xen/common/Makefile b/xen/common/Makefile index 6018e256147f..f69d47d18934 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -12,7 +12,7 @@ obj-$(CONFIG_DEVICE_TREE_PARSE) +=3D device-tree/ obj-$(CONFIG_IOREQ_SERVER) +=3D dm.o obj-y +=3D domain.o obj-y +=3D domid.o -obj-y +=3D event_2l.o +obj-$(CONFIG_HAS_SHARED_INFO) +=3D event_2l.o obj-y +=3D event_channel.o obj-$(CONFIG_EVTCHN_FIFO) +=3D event_fifo.o obj-$(CONFIG_GRANT_TABLE) +=3D grant_table.o diff --git a/xen/common/domain.c b/xen/common/domain.c index e16f1ac38396..6b52713518da 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -316,9 +316,9 @@ void vcpu_info_reset(struct vcpu *v) struct domain *d =3D v->domain; =20 v->vcpu_info_area.map =3D - ((v->vcpu_id < XEN_LEGACY_MAX_VCPUS) - ? (vcpu_info_t *)&shared_info(d, vcpu_info[v->vcpu_id]) - : &dummy_vcpu_info); + IS_ENABLED(CONFIG_HAS_SHARED_INFO) && v->vcpu_id < XEN_LEGACY_MAX_= VCPUS + ? (vcpu_info_t *)&shared_info(d, vcpu_info[v->vcpu_id]) + : &dummy_vcpu_info; } =20 static struct domain *alloc_domain_struct(void) diff --git a/xen/common/domctl.c b/xen/common/domctl.c index a6210db4fb97..83405a766a54 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -102,9 +102,13 @@ void getdomaininfo(struct domain *d, struct xen_domctl= _getdomaininfo *info) #ifdef CONFIG_MEM_PAGING info->paged_pages =3D atomic_read(&d->paged_pages); #endif +#ifdef CONFIG_HAS_SHARED_INFO info->shared_info_frame =3D gfn_x(mfn_to_gfn(d, _mfn(virt_to_mfn(d->shared_info)))); BUG_ON(SHARED_M2P(info->shared_info_frame)); +#else + info->shared_info_frame =3D ~0; +#endif =20 info->cpupool =3D cpupool_get_id(d); =20 diff --git a/xen/common/event_channel.c b/xen/common/event_channel.c index a7f9cc5fe0ac..bd03e094d096 100644 --- a/xen/common/event_channel.c +++ b/xen/common/event_channel.c @@ -40,6 +40,54 @@ =20 #define consumer_is_xen(e) (!!(e)->xen_consumer) =20 +#if !defined(CONFIG_HAS_SHARED_INFO) && !defined(CONFIG_EVTCHN_FIFO) +/* + * Placeholder ops for domains with neither a shared_info page nor a FIFO + * control block. Such a domain has no ABI to record event state in, so th= ese + * are reachable whenever an event is delivered to (or queried on) one of = its + * ports; they just discard/no-op it. They exist to keep d->evtchn_port_ops + * non-NULL. + */ +static void cf_check evtchn_none_set_pending( + struct vcpu *v, struct evtchn *evtchn) {} +static void cf_check evtchn_none_noop( + struct domain *d, struct evtchn *evtchn) {} +static bool cf_check evtchn_none_false( + const struct domain *d, const struct evtchn *evtchn) { return false; } +static void cf_check evtchn_none_print_state( + struct domain *d, const struct evtchn *evtchn) {} + +static const struct evtchn_port_ops evtchn_port_ops_none =3D { + .set_pending =3D evtchn_none_set_pending, + .clear_pending =3D evtchn_none_noop, + .unmask =3D evtchn_none_noop, + .is_pending =3D evtchn_none_false, + .is_masked =3D evtchn_none_false, + .print_state =3D evtchn_none_print_state, +}; + +static void evtchn_none_init(struct domain *d) +{ + d->evtchn_port_ops =3D &evtchn_port_ops_none; +} +#else /* CONFIG_HAS_SHARED_INFO || CONFIG_EVTCHN_FIFO */ +/* + * Declaration only; the call in evtchn_preinit() is DCE'd unless both + * configs are off. + */ +void evtchn_none_init(struct domain *d); +#endif /* !CONFIG_HAS_SHARED_INFO && !CONFIG_EVTCHN_FIFO */ + +static void evtchn_preinit(struct domain *d) +{ + if ( IS_ENABLED(CONFIG_HAS_SHARED_INFO) ) + evtchn_2l_init(d); + else if ( IS_ENABLED(CONFIG_EVTCHN_FIFO) ) + evtchn_fifo_init_ops(d); + else + evtchn_none_init(d); +} + /* * Lock an event channel exclusively. This is allowed only when the channe= l is * free or unbound either when taking or when releasing the lock, as any @@ -1324,9 +1372,9 @@ int evtchn_reset(struct domain *d, bool resuming) rc =3D -EAGAIN; else if ( d->evtchn_fifo ) { - /* Switching back to 2-level ABI. */ + /* Switching back to the default ABI. */ evtchn_fifo_destroy(d); - evtchn_2l_init(d); + evtchn_preinit(d); } =20 write_unlock(&d->event_lock); @@ -1625,7 +1673,8 @@ void evtchn_check_pollers(struct domain *d, unsigned = int port) =20 int evtchn_init(struct domain *d, unsigned int max_port) { - evtchn_2l_init(d); + evtchn_preinit(d); + d->max_evtchn_port =3D min_t(unsigned int, max_port, INT_MAX); =20 d->evtchn =3D alloc_evtchn_bucket(d, 0); diff --git a/xen/common/event_channel.h b/xen/common/event_channel.h index dc94a43cc2dd..423c4ee77bd0 100644 --- a/xen/common/event_channel.h +++ b/xen/common/event_channel.h @@ -70,6 +70,12 @@ static inline void evtchn_fifo_destroy(struct domain *d) } #endif /* CONFIG_EVTCHN_FIFO */ =20 +/* + * Declaration only when !CONFIG_EVTCHN_FIFO; the call in evtchn_preinit()= is + * DCE'd in that case. + */ +void evtchn_fifo_init_ops(struct domain *d); + #endif /* EVENT_CHANNEL_H */ =20 /* diff --git a/xen/common/event_fifo.c b/xen/common/event_fifo.c index 611bf8a78801..e4225b1b668e 100644 --- a/xen/common/event_fifo.c +++ b/xen/common/event_fifo.c @@ -62,6 +62,9 @@ static inline event_word_t *evtchn_fifo_word_from_port(co= nst struct domain *d, */ smp_rmb(); =20 + if ( unlikely(!d->evtchn_fifo) ) + return NULL; + if ( unlikely(port >=3D d->evtchn_fifo->num_evtchns) ) return NULL; =20 @@ -419,6 +422,18 @@ static const struct evtchn_port_ops evtchn_port_ops_fi= fo =3D .print_state =3D evtchn_fifo_print_state, }; =20 +/* + * evtchn_fifo_init_ops()'s only call site is the + * IS_ENABLED(CONFIG_EVTCHN_FIFO) branch of evtchn_preinit(), which is nev= er + * reached on HAS_SHARED_INFO=3Dy builds because of DCE. + */ +#ifndef CONFIG_HAS_SHARED_INFO +void evtchn_fifo_init_ops(struct domain *d) +{ + d->evtchn_port_ops =3D &evtchn_port_ops_fifo; +} +#endif + static int map_guest_page(struct domain *d, uint64_t gfn, void **virt) { struct page_info *p; @@ -561,7 +576,8 @@ static void setup_ports(struct domain *d, unsigned int = prev_evtchns) =20 evtchn =3D evtchn_from_port(d, port); =20 - if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) ) + if ( IS_ENABLED(CONFIG_HAS_SHARED_INFO) && + guest_test_bit(d, port, &shared_info(d, evtchn_pending)) ) evtchn->pending =3D true; =20 evtchn_fifo_set_priority(d, evtchn, EVTCHN_FIFO_PRIORITY_DEFAULT); diff --git a/xen/common/time.c b/xen/common/time.c index 2b8c98e2de76..906fb7c71636 100644 --- a/xen/common/time.c +++ b/xen/common/time.c @@ -91,6 +91,7 @@ struct tm gmtime(unsigned long t) return tbuf; } =20 +#ifdef CONFIG_HAS_SHARED_INFO void update_domain_wallclock_time(struct domain *d) { uint32_t *wc_version; @@ -119,6 +120,7 @@ void update_domain_wallclock_time(struct domain *d) =20 spin_unlock(&wc_lock); } +#endif /* CONFIG_HAS_SHARED_INFO */ =20 /* Set clock to after 00:00:00 UTC, 1 January, 1970. */ void do_settime(u64 secs, unsigned int nsecs, u64 system_time_base) diff --git a/xen/include/xen/event.h b/xen/include/xen/event.h index 930190054cf0..595dedf0792c 100644 --- a/xen/include/xen/event.h +++ b/xen/include/xen/event.h @@ -211,7 +211,7 @@ static bool evtchn_usable(const struct evtchn *evtchn) =20 void evtchn_check_pollers(struct domain *d, unsigned int port); =20 -/* Close all event channels and reset to 2-level ABI. */ +/* Close all event channels and reset to the default ABI. */ int evtchn_reset(struct domain *d, bool resuming); =20 /* diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index e352e2b38e7d..73c54794ac02 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -404,7 +404,9 @@ struct domain =20 struct vcpu **vcpu; =20 +#ifdef CONFIG_HAS_SHARED_INFO shared_info_t *shared_info; /* shared data area */ +#endif =20 rcu_read_lock_t rcu_lock; =20 diff --git a/xen/include/xen/shared.h b/xen/include/xen/shared.h index 5b71342cab32..1589e8793f9d 100644 --- a/xen/include/xen/shared.h +++ b/xen/include/xen/shared.h @@ -43,7 +43,13 @@ typedef struct vcpu_info vcpu_info_t; =20 extern vcpu_info_t dummy_vcpu_info; =20 +#ifdef CONFIG_HAS_SHARED_INFO #define shared_info(d, field) __shared_info(d, (d)->shared_info, fiel= d) +#else +extern struct shared_info *shared_info_absent; +#define shared_info(d, field) (((void)(d), shared_info_absent)->field) +#endif /* CONFIG_HAS_SHARED_INFO */ + #define vcpu_info(v, field) \ __vcpu_info(v, (vcpu_info_t *)(v)->vcpu_info_area.map, field) =20 diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index 4db24617a97c..09da150c2a40 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -72,7 +72,12 @@ extern bool NOW_good; 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This duplicated the same declaration across all arches and placed a purely dom0less concept in arch setup headers. Now that the dom0less build code lives in common (xen/common/ device-tree/dom0less-build.c sets max_init_domid, and the console serial-input switcher reads it), there is no reason for the symbol to be per-arch. Provide a single declaration in , with the !CONFIG_DOM0LESS_BOOT stub kept there as well, so there is one source of truth and the arch headers no longer need to mention it. Update console.c to include for the declaration instead of relying on asm/setup.h. Place the definition in xen/common/domid.c rather than in dom0less- build.c. The latter is built as dom0less-build.init.o, i.e. the whole object is relocated into the .init.* sections and freed after boot, whereas max_init_domid must outlive boot because it is read at runtime by the console serial-input switcher. domid.c is always linked (obj-y) and resides in regular (non-init) sections, so it is a correct home for the variable. It is marked __ro_after_init since it is only updated while creating boot-time domains and read-only afterwards, and guarded by CONFIG_DOM0LESS_BOOT as domid.c itself is unconditional. Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Reviewed-by: Michal Orzel --- Changes in v6-8: - Nothing changed. Only rebase. --- Changes in v5: - Add Reviewed-by: Jan Beulich --- Changes in v4: - New patch. --- --- xen/arch/arm/include/asm/setup.h | 2 -- xen/arch/arm/setup.c | 2 -- xen/arch/ppc/include/asm/setup.h | 2 -- xen/arch/riscv/include/asm/setup.h | 2 -- xen/arch/x86/include/asm/setup.h | 2 -- xen/common/domid.c | 5 +++++ xen/drivers/char/console.c | 1 + xen/include/xen/dom0less-build.h | 7 +++++++ 8 files changed, 13 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/se= tup.h index 0adfa4993a8f..2af780512540 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -25,8 +25,6 @@ struct map_range_data struct rangeset *irq_ranges; }; =20 -extern domid_t max_init_domid; - void copy_from_paddr(void *dst, paddr_t paddr, unsigned long len); =20 size_t estimate_efi_size(unsigned int mem_nr_banks); diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 6310a47d68b6..86532d0a35b6 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -62,8 +62,6 @@ struct cpuinfo_arm __read_mostly system_cpuinfo; bool __read_mostly acpi_disabled; #endif =20 -domid_t __read_mostly max_init_domid; - static __used void noreturn init_done(void) { /* Must be done past setting system_state. */ diff --git a/xen/arch/ppc/include/asm/setup.h b/xen/arch/ppc/include/asm/se= tup.h index e4f64879b68c..956fa6985adb 100644 --- a/xen/arch/ppc/include/asm/setup.h +++ b/xen/arch/ppc/include/asm/setup.h @@ -1,6 +1,4 @@ #ifndef __ASM_PPC_SETUP_H__ #define __ASM_PPC_SETUP_H__ =20 -#define max_init_domid (0) - #endif /* __ASM_PPC_SETUP_H__ */ diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/as= m/setup.h index 2215894cfbb1..73ce2f293348 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,8 +5,6 @@ =20 #include =20 -#define max_init_domid (0) - void setup_mm(void); =20 void copy_from_paddr(void *dst, paddr_t paddr, unsigned long len); diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/se= tup.h index b01e83a8ed9f..5925c5f39cff 100644 --- a/xen/arch/x86/include/asm/setup.h +++ b/xen/arch/x86/include/asm/setup.h @@ -68,6 +68,4 @@ extern bool opt_dom0_verbose; extern bool opt_dom0_cpuid_faulting; extern bool opt_dom0_msr_relaxed; =20 -#define max_init_domid (0) - #endif diff --git a/xen/common/domid.c b/xen/common/domid.c index b0258e477c1a..cd46cf952be6 100644 --- a/xen/common/domid.c +++ b/xen/common/domid.c @@ -9,6 +9,11 @@ */ =20 #include +#include + +#ifdef CONFIG_DOM0LESS_BOOT +domid_t __ro_after_init max_init_domid; +#endif =20 static DEFINE_SPINLOCK(domid_lock); static DECLARE_BITMAP(domid_bitmap, DOMID_FIRST_RESERVED); diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index fcacf37c52f0..61e92491e40a 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include =20 diff --git a/xen/include/xen/dom0less-build.h b/xen/include/xen/dom0less-bu= ild.h index 4118dec76c0a..8d4da16d1f0a 100644 --- a/xen/include/xen/dom0less-build.h +++ b/xen/include/xen/dom0less-build.h @@ -5,6 +5,8 @@ =20 #include =20 +#include + struct domain; =20 #ifdef CONFIG_DOM0LESS_BOOT @@ -13,6 +15,9 @@ struct boot_domain; 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It also creates additional vCPUs up to max_vcpus and assigns the device tree address and boot cpuid in registers. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5-v8: - Only rebase. Nothing changed. --- Changes in v4: - Drop the blank before v%u in the printk() failure message so the output matches that of %pv. - Restore Acked-by that was lost in v3. --- Changes in v3: - s/%d/%u for printing vCPU index in the failure message. - Drop dprintk() for successful vCPU creation. --- Changes in v2: - Rework construct_domain() to print that vCPU1...n are created using %pv. - Use true instead of 1 for initialization of v->is_initialised. - Drop unnessary BUG_ON() in construct_domain(). - Add TODO comment above *_load() functions. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain-build.c | 50 +++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) create mode 100644 xen/arch/riscv/domain-build.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 4fcdcf9e24de..2d24670dfc74 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y +=3D aplic.o obj-y +=3D cpufeature.o obj-y +=3D domain.o +obj-y +=3D domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) +=3D dom0less-build.init.o obj-$(CONFIG_EARLY_PRINTK) +=3D early_printk.o obj-y +=3D entry.o diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c new file mode 100644 index 000000000000..5f6f4b6248a5 --- /dev/null +++ b/xen/arch/riscv/domain-build.c @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include + +#include +#include + +int __init construct_domain(struct domain *d, struct kernel_info *kinfo) +{ + struct vcpu *v =3D d->vcpu[0]; + struct cpu_user_regs *regs =3D vcpu_guest_cpu_user_regs(v); + + BUG_ON(v->is_initialised); + + /* + * At the moment *_load() don't return value and will just panic() + * inside. + * TODO: it will be good to change that. + */ + kernel_load(kinfo); + initrd_load(kinfo, copy_to_guest_phys); + dtb_load(kinfo, copy_to_guest_phys); + + regs->sepc =3D kinfo->entry; + + /* Guest boot cpuid =3D 0 */ + regs->a0 =3D 0; + regs->a1 =3D kinfo->dtb_paddr; + + for ( unsigned int i =3D 1; i < d->max_vcpus; i++ ) + { + const struct vcpu *tmp_v =3D vcpu_create(d, i); + + if ( !tmp_v ) + { + printk("Failed to allocate %pdv%u\n", d, i); + break; + } + } + + domain_update_node_affinity(d); + + v->is_initialised =3D true; + clear_bit(_VPF_down, &v->pause_flags); + + return 0; +} --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:31 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843971; x=1788448771; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=5FTZ/zgLxaDF0xhm1MbqyrNw+Htw5MQMnzKgTC6ue3Y=; b=Zsygbn9FWAId3yuh+IRD0TlI7CnIqpHJaNG1UiVrovfxJrbQjtwO1/vrcWv0CrqIhR 0DGlLe+0ZUB7G9bucR+G/U6PZlHYRIHGc58eqSeFjrxzQmdSaY6WtIat9BEGqjiIX5oC neuETQLIkOvswDx7LDSRdxZs6bVEP/GYQ7GFWkU1ac0mdiQG9laSoG+Bxk2xPonbCUX/ QkGQ8gLaEBDDfcJN4zug0pEZm7I6usO/oV/30fo0eSqxiPZcoNYUTgEUwy23bRiJr+xx 8WNLpttTnBv8jBu7TWhNduGKcHHbNsrZwSR5oLYxzOQ5PIRYFD7l9zGILq2aaq5nFzod BiFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843971; x=1788448771; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=5FTZ/zgLxaDF0xhm1MbqyrNw+Htw5MQMnzKgTC6ue3Y=; b=Ql26JcE7ofq/N6GdHNjnzFyDVkE+wgaCqGyImJYHybEZ315h1sNIATJW8BVro08IU0 2EdgG5optTKL2hNJCAGZn7KbMdf6GAt4CjDePT4T7HoV7uHOxkKL22J67OOqDTgLDsxA dhq2IkpD1aSvxxoGksfOE4oh0HNu4USQJO47p0bAP1L2Pjkkaae4n6O3GtVXnft2uQEU 4grs4vQWWpCNQIawfMpGlNGRCeknN34DyIN4Og844tmPw0/EdfJ6a97e6h21tQB3yFiG UAwBSVep3j4PnqaDFwSMd9+ZojdKrZxrRpzfmfcFaEwjpiWlkHTep0DOkOo1Kh8S96Ir otRw== X-Gm-Message-State: AFuF++lnQ7N6nXtWlsr/2UA7sSdqvrDrlBNj34apt8JT/AUgtGi8npjr W4oLsl7x96Vg66hckUuTs9KRd+p8xLhlTvOG+NoI5gXOfP6N4s0v8oRasIASlg== X-Gm-Gg: AR+sD13xrpUAsLSIDM2OImf+x+BHhUibL1Oddi7p7+SGjoZaDETMRr9b1kC089Dw/Nk lXbo0oK2rbt0gwjWwKslvk1C10LOM/tFLjFFXMRggmE8TobG6zXiw3Zu/t7YiJjJxluWELtA1R9 xjk9u07AuhHEklAeymVCtXYH17YLLF0xo0bvxcS3aKWuUJIN5GmeNTNMV2eH9NnSUJaH3Tr00Js /ZxfP81i9NT6RBqO8hXA3Qd4cyZ6eBTkFAtNWBj4ydCYk/MLv6EHz1VqOVEjCGXntDWu80QKDwr J3VSGp+sjDzg1rR/hIxYwBTAVFpDm/MUT9BnRQ6uVkF6ywy6DE/jm90RHembFA5TZZuFoFmTBxA JVMS3+UHRegbWo7ACZr2FCFjFIoQ0MIUZCBaBAWn6Kq2J6nNfs6+FU+F507u9Rq3rA+ELz2WcwJ rCsuoshfV58nqdWTU0fy05WgEU4ayrwn/EHZfkoLMy410VxX83kSoRGqZq4hzuFspqN3Bwo8xMD 0LrpcdmqX6zkrPGm9hMSdruD9aVG9HU X-Received: by 2002:a05:6000:22c2:b0:482:e658:bb7f with SMTP id ffacd0b85a97d-482e658bdafmr14865213f8f.15.1787843971337; Thu, 27 Aug 2026 08:19:31 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 04/20] xen/riscv: introduce guest riscv,isa string Date: Thu, 27 Aug 2026 17:18:57 +0200 Message-ID: <2eb660bd05c6bf5946a7eae09406266db0c5108f.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1787843972-F7ABF2A1-64796977/10/73395122804 X-purgate-type: spam X-purgate-size: 16987 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844005452158500 Content-Type: text/plain; charset="utf-8" Introduce build_guest_isa_str() to generate the riscv,isa string to be passed to the guest via the Device Tree riscv,isa property. Introduce the per-domain guest ISA bitmap, populated during domain creation by calling init_guest_isa(). Introduce struct riscv_isa_ext_entry with a new guest_flags field to filter out ISA extensions that should not be exposed to guests: - f/d/q/v: FPU and vector context save/restore are not yet implemented for guests. - Z*inx are not exposed either: they aren't in riscv_isa_ext[], so they can never be set in riscv_isa and thus never reach a guest, and no current hardware/guest-OS advertises or expects them. Supporting them would be cheaper than F/D/Q (FP values stay in integer registers Xen already context-switches), but is left as future work. - h: Nested virtualisation is not supported. - sstc: Xen owns the supervisor timer; guests must use SBI. - svade: Xen manages hardware A/D bit updates in stage-2 page tables. - svpbmt: Page-based memory types are not yet wired up in stage-2 code. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v8: - Replace struct riscv_isa_ext_entry's bool guest_supported with an unsigned int guest_flags bitmask (RISCV_ISA_EXT_GUEST_{NONE,RV32,RV64,ANY= }), so an extension can be withheld from guests of one XLEN only; select the bit matching the guest's width with RISCV_ISA_EXT_GUEST_XLEN in compute_guest_isa(). Guests are currently of the same width as Xen, so RISCV_ISA_EXT_GUEST_XLEN is derived from CONFIG_RISCV_{32,64} for now. - Add some spaces between # and "error" in build_guest_isa_str(). --- Changes in v7: - build_guest_isa_str(): drop the struct domain argument and work directly = on the guest_isa bitmap; make the function static as it has no external users anymore. - build the guest "riscv,isa" string only once, in compute_guest_isa(), and store it in an __ro_after_init pointer, instead of rebuilding it for every domain: all domains are currently given the same guest ISA, so apply here the same reasoning as for the guest_isa bitmap. - panic() on length calculation, allocation or formatting failure, in line with the rest of riscv_fill_hwcap() initialization. - introduce get_guest_isa_str() accessor and expose it in asm/cpufeature.h instead of build_guest_isa_str(). --- Changes in v6: - build_guest_isa_str() now takes a `const struct domain *d` instead of a raw `const unsigned long *isa_bitmap`, to leave room for using more than just the bitmap in the future. - Compute the guest-visible ISA bitmap once at boot, into a new __ro_after_init `guest_isa` bitmap (compute_guest_isa(), called at the end of riscv_fill_hwcap()), instead of re-deriving it from riscv_isa_ext[] on every domain creation in init_guest_isa(). All guests currently get the same extension set, so this avoids repeating identical work per domain; will need revisiting if/when per-domain ISA policy is introduced. - struct arch_domain's `isa` field is now `const unsigned long *isa` instead of an embedded bitmap; init_guest_isa() just points it at the shared `guest_isa` bitmap rather than copying bits into a per-domain array. - Mark riscv_isa_ext[] __initconstrel, since its entries hold name pointers and the need for relocations requires that the compiler emit the data to a writable section. - Make build_guest_isa_str() __init as it is called during make_cpus_node() which is used only (at least, for now) in build time of domain. --- Changes in v5: - Introduce struct riscv_isa_ext_entry with a guest_supported field and RISCV_ISA_EXT_ENTRY(name, guest_supp) macro for riscv_isa_ext[], replacing the ad-hoc guest_unsupp bitmap and init_guest_unsupp(). Every entry now carries an explicit true/false decision, enforced at compile time. - init_guest_isa() builds d->arch.isa by iterating riscv_isa_ext[] directly instead of using bitmap_andnot() against guest_unsupp. - init_guest_isa() changed to void as it can no longer fail. - Drop isa_str from struct arch_domain; the ISA string does not need to persist over the domain lifetime. build_guest_isa_str() is made non-static and declared in cpufeature.h for use when building the guest device tree. - Updated the fix of underflow in build_guest_isa_str(). - Drop unnecessary empty line in cpufeature.h before enum riscv_isa_ext_id. --- Changes in v4: - Add an explicit overflow guard in build_guest_isa_str(): return -ENOSPC when buf is non-NULL and total >=3D size, to avoid the size - total underflow being passed to snprintf(). - Expand the commit message to explain why Zfinx/Zdinx/Zqinx are not added to guest_unsupp (not in riscv_isa_ext[], so never set in riscv_isa nor exposed to a guest; left as future work) --- Changes in v3: - s/set_bit/__set_bit in init_guest_unsupp() as atomicity isn't needed at init time. - Drop RISCV_GUEST_ISA_STR_MAX; allocate isa_str dynamically with xvmalloc_array(). - Drop "guest" prefix from d->arch.guest_isa and d->arch.guest_isa_str. - Introduce build_guest_isa_str() using snprintf(NULL, 0, ...) to determine the needed buffer size; init_guest_isa() calls it once for sizing and on= ce to fill, keeping both in a single function so they can't go out of sync. - Scope ret inside the loop; initialize total directly from the prefix snprintf(). - Merge "_" separator and extension name into a single snprintf() with "%s%s". - Replace ASSERT with an explicit error check: if the fill call returns a different length, free isa_str and return -EINVAL. --- Changes in v2: - s/guest_unsupp_bmp/guest_unsupp. - Drop guest_isa_str. - Provide init_guest_isa() instead of polluting match_isa_ext(). - Drop xlen. - Add the comment about guest_unsupp. - Update the way how guest_unsupp is init-ed. - Drop __initconst for riscv_isa_ext[] as it is used in init_guest_isa() which isn't marked as __init as it could be used after init stage. --- --- xen/arch/riscv/cpufeature.c | 200 +++++++++++++++++++++--- xen/arch/riscv/domain.c | 2 + xen/arch/riscv/include/asm/cpufeature.h | 5 + xen/arch/riscv/include/asm/domain.h | 3 + 4 files changed, 186 insertions(+), 24 deletions(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index 92235fdfd5ab..4bcbf56cb694 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -14,7 +14,9 @@ #include #include #include +#include #include +#include =20 #include #include @@ -34,9 +36,64 @@ struct riscv_isa_ext_data { .name =3D #ext_name, \ } =20 +/* + * Which guests an extension may be handed out to, by guest XLEN. + * + * These flags express Xen's policy, not the ISA's rules: extensions which + * are architecturally tied to one XLEN (Zilsd on RV32, say) need no speci= al + * treatment here, as they can only ever appear in the "riscv,isa" of a ho= st + * of that XLEN, and guest_isa is masked against the host ISA bitmap anywa= y. + * They are only of use for extensions Xen chooses not to expose to guests= of + * a given width despite the hardware implementing them. + */ +#define RISCV_ISA_EXT_GUEST_NONE 0 +#define RISCV_ISA_EXT_GUEST_RV32 (1U << 0) +#define RISCV_ISA_EXT_GUEST_RV64 (1U << 1) +#define RISCV_ISA_EXT_GUEST_ANY (RISCV_ISA_EXT_GUEST_RV32 | \ + RISCV_ISA_EXT_GUEST_RV64) + +/* + * Guests are of the same width as Xen itself for the time being; once gue= st + * XLEN can differ from host XLEN (hstatus.VSXL), this becomes a per-domain + * property, just as guest_isa below does. + */ +#if defined(CONFIG_RISCV_32) +#define RISCV_ISA_EXT_GUEST_XLEN RISCV_ISA_EXT_GUEST_RV32 +#elif defined(CONFIG_RISCV_64) +#define RISCV_ISA_EXT_GUEST_XLEN RISCV_ISA_EXT_GUEST_RV64 +#else +# error "Unsupported RISC-V bitness" +#endif + +struct riscv_isa_ext_entry { + unsigned int id; + const char *name; + unsigned int guest_flags; +}; + +#define RISCV_ISA_EXT_ENTRY(ext_name, guest_flgs) \ +{ \ + .id =3D RISCV_ISA_EXT_ ## ext_name, \ + .name =3D #ext_name, \ + .guest_flags =3D guest_flgs, \ +} + /* Host ISA bitmap */ static __ro_after_init DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX); =20 +/* + * ISA bitmap handed out to every guest. + * + * All guests are given the same extensions for the time being, so this is + * computed once out of riscv_isa_ext[] and riscv_isa, rather than redoing + * the walk for every domain created. Should per-domain ISA policy ever be + * introduced, this will need to become per-domain again. + */ +static __ro_after_init DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); + +/* "riscv,isa" string corresponding to guest_isa, shared by all domains. */ +static char *__ro_after_init guest_isa_str; + static int __init dt_get_cpuid_from_node(const struct dt_device_node *cpu, unsigned long *dt_cpuid) { @@ -120,29 +177,30 @@ static int __init dt_get_cpuid_from_node(const struct= dt_device_node *cpu, * and strncmp() is used in match_isa_ext() to compare extension names ins= tead * of strncasecmp(). */ -const struct riscv_isa_ext_data __initconst riscv_isa_ext[] =3D { - RISCV_ISA_EXT_DATA(i), - RISCV_ISA_EXT_DATA(m), - RISCV_ISA_EXT_DATA(a), - RISCV_ISA_EXT_DATA(f), - RISCV_ISA_EXT_DATA(d), - RISCV_ISA_EXT_DATA(q), - RISCV_ISA_EXT_DATA(c), - RISCV_ISA_EXT_DATA(h), - RISCV_ISA_EXT_DATA(zicntr), - RISCV_ISA_EXT_DATA(zicsr), - RISCV_ISA_EXT_DATA(zifencei), - RISCV_ISA_EXT_DATA(zihintpause), - RISCV_ISA_EXT_DATA(zihpm), - RISCV_ISA_EXT_DATA(zba), - RISCV_ISA_EXT_DATA(zbb), - RISCV_ISA_EXT_DATA(zbs), - RISCV_ISA_EXT_DATA(smaia), - RISCV_ISA_EXT_DATA(smstateen), - RISCV_ISA_EXT_DATA(ssaia), - RISCV_ISA_EXT_DATA(sstc), - RISCV_ISA_EXT_DATA(svade), - RISCV_ISA_EXT_DATA(svpbmt), +static const struct riscv_isa_ext_entry __initconstrel riscv_isa_ext[] =3D= { + RISCV_ISA_EXT_ENTRY(i, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(m, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(a, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(f, RISCV_ISA_EXT_GUEST_NONE), + RISCV_ISA_EXT_ENTRY(d, RISCV_ISA_EXT_GUEST_NONE), + RISCV_ISA_EXT_ENTRY(q, RISCV_ISA_EXT_GUEST_NONE), + RISCV_ISA_EXT_ENTRY(c, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(v, RISCV_ISA_EXT_GUEST_NONE), + RISCV_ISA_EXT_ENTRY(h, RISCV_ISA_EXT_GUEST_NONE), + RISCV_ISA_EXT_ENTRY(zicntr, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(zicsr, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(zifencei, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(zihintpause, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(zihpm, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(zba, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(zbb, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(zbs, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(smaia, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(smstateen, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(ssaia, RISCV_ISA_EXT_GUEST_ANY), + RISCV_ISA_EXT_ENTRY(sstc, RISCV_ISA_EXT_GUEST_NONE), + RISCV_ISA_EXT_ENTRY(svade, RISCV_ISA_EXT_GUEST_NONE), + RISCV_ISA_EXT_ENTRY(svpbmt, RISCV_ISA_EXT_GUEST_NONE), }; =20 static const struct riscv_isa_ext_data __initconst required_extensions[] = =3D { @@ -181,7 +239,7 @@ static void __init match_isa_ext(const char *name, cons= t char *name_end, =20 for ( unsigned int i =3D 0; i < riscv_isa_ext_count; i++ ) { - const struct riscv_isa_ext_data *ext =3D &riscv_isa_ext[i]; + const struct riscv_isa_ext_entry *ext =3D &riscv_isa_ext[i]; =20 /* * `ext->name` (according to initialization of riscv_isa_ext[] @@ -480,6 +538,98 @@ bool riscv_isa_extension_available(const unsigned long= *isa_bitmap, return test_bit(id, isa_bitmap); } =20 +static int __init build_guest_isa_str(char *buf, size_t size) +{ + char *p =3D buf; + size_t left =3D size; + int total; + +#if defined(CONFIG_RISCV_32) + total =3D snprintf(p, left, "rv32"); +#elif defined(CONFIG_RISCV_64) + total =3D snprintf(p, left, "rv64"); +#else +# error "Unsupported RISC-V bitness" +#endif + + if ( total < 0 ) + return total; + + if ( buf ) + { + if ( (size_t)total >=3D left ) + return -ENOSPC; + + p +=3D total; + left -=3D total; + } + + for ( unsigned int i =3D 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) + { + const struct riscv_isa_ext_entry *ext =3D &riscv_isa_ext[i]; + int ret; + + if ( !riscv_isa_extension_available(guest_isa, ext->id) ) + continue; + + ret =3D snprintf(p, left, "%s%s", + ext->id >=3D RISCV_ISA_EXT_BASE ? "_" : "", + ext->name); + if ( ret < 0 ) + return ret; + + total +=3D ret; + + if ( buf ) + { + if ( (size_t)ret >=3D left ) + return -ENOSPC; + + p +=3D ret; + left -=3D ret; + } + } + + return total; +} + +static void __init compute_guest_isa(void) +{ + int len; + + for ( unsigned int i =3D 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) + { + const struct riscv_isa_ext_entry *ext =3D &riscv_isa_ext[i]; + + if ( (ext->guest_flags & RISCV_ISA_EXT_GUEST_XLEN) && + riscv_isa_extension_available(NULL, ext->id) ) + __set_bit(ext->id, guest_isa); + } + + /* + * All domains are given the same guest ISA, so the "riscv,isa" string + * is built only once here and then shared by all of them. + */ + if ( (len =3D build_guest_isa_str(NULL, 0)) < 0 ) + panic("Failed to calculate guest \"riscv,isa\" length: %d\n", len); + + if ( !(guest_isa_str =3D xvmalloc_array(char, len + 1)) ) + panic("Failed to allocate guest \"riscv,isa\" string\n"); + + if ( build_guest_isa_str(guest_isa_str, len + 1) !=3D len ) + panic("Failed to build guest \"riscv,isa\" string\n"); +} + +void init_guest_isa(struct domain *d) +{ + d->arch.isa =3D guest_isa; +} + +const char *get_guest_isa_str(void) +{ + return guest_isa_str; +} + void __init riscv_fill_hwcap(void) { unsigned int i; @@ -527,4 +677,6 @@ void __init riscv_fill_hwcap(void) if ( !all_extns_available ) panic("Look why the extensions above are needed in " "https://xenbits.xenproject.org/docs/unstable/misc/riscv/boo= ting.txt\n"); + + compute_guest_isa(); } diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 2819ff4e7c92..c9933147595e 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -308,6 +308,8 @@ int arch_domain_create(struct domain *d, if ( is_idle_domain(d) ) return 0; =20 + init_guest_isa(d); + if ( (rc =3D p2m_init(d, config)) !=3D 0) goto fail; =20 diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/inclu= de/asm/cpufeature.h index 0c48d57a03bb..2973eb13a513 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -5,6 +5,7 @@ #ifndef __ASSEMBLER__ =20 #include +#include =20 /* * These macros represent the logical IDs of each multi-letter RISC-V ISA @@ -44,7 +45,11 @@ enum riscv_isa_ext_id { RISCV_ISA_EXT_MAX }; =20 +struct domain; + void riscv_fill_hwcap(void); +void init_guest_isa(struct domain *d); +const char *get_guest_isa_str(void); =20 bool riscv_isa_extension_available(const unsigned long *isa_bitmap, enum riscv_isa_ext_id id); diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index 6044ce0feee0..8ae01a5e4dcc 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -7,6 +7,7 @@ #include #include =20 +#include #include #include #include @@ -94,6 +95,8 @@ struct arch_domain { struct p2m_domain p2m; =20 struct paging_domain paging; + + const unsigned long *isa; }; =20 #include --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:32 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843973; x=1788448773; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=7xQsUVTTJIfUyEn5waDQw6z9DwE5RwUDFgt9SnUa9c8=; b=j8lukQxuS/NO9x/TTrEJNMWAV3bS8kNaez5NAmJ4QQ96xvicFQ5qGGJQtxoEaHiOBk BtTLzcjzkT3gJtGc0R8ZYXxmq62EGSXgi5mpXp2gaktiISn/4bVJiQg+w36dBwv7/Vmd LJGxnsBsNhQbFUB9GufKU4yM/PnZ0rnXbypxFC0O/1eDOW3EZcIPbE9L9yPhYwSvdb2v V/TDOdYK8Kq8+Z7AO8aikI6KQAWUftmSvczdS+6baIqYAolTRtiGs51186Liz8sPrQcl h8ssAo1HtOxc5OqTmGrSlzjWfn1F1pxSIckUnF6ZDBn/JVk1Mese+oI8/JbRS4Z73FR6 FRxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843973; x=1788448773; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=7xQsUVTTJIfUyEn5waDQw6z9DwE5RwUDFgt9SnUa9c8=; b=Fia9Cj7sK0+k8g5XZ7cQwzNCvynw+GVCDMoXDwYz+lIEIpBImtHiYA3CG2+vhdfDuZ CGFB5zQONFjvResTujJ2LgzAXrJIVUEdWYo34CpZDJ5mGpiUvmR1mvbKuAVgEtsqKiSW HJkiAjkJEe9uHMUAwDV8YwNLbz0+xt5UgSsu64Om+taBlN69nqmRtDvVK5qkuZh+K064 UtWxpFCgQ7qHPb4/TcZ0lBFJcB0g7nDj1bBFl0WvINzv7tQXrj1hpd9+KUeKLzyPR3gt M747gXeyp2u4tQgp3cH1SX6GmpTmWzqWzw6p8xu0CTY5+XhEuFD16xUomAzaEhWEpO6w kuQg== X-Gm-Message-State: AFuF++l9nXudgzsxfn95fLfyBsbys/eMLStEuyTOCo2Z4DYYktq2+uxi 7/o/H6BkuiUn2Q9X/1qoE34WvCAYxntEp2wi2ZB9ZUiXuyiFE9TPZN6q5hEKUg== X-Gm-Gg: AR+sD13gx1y9QxPKYgj8grEww2L1z8US3Vtknz4JzvPoD7+IQThUHIEJgLAZ6wodVUW G+O+yK0RquaeqxbcI8tZfMdljA9e7TYFs83p0zyaOodTgNCY4ziMZDfBikYxvtf8Af5b5bSlNV2 itGsqG4eJSi2t5QaajYtIsfv525K112S2Hk0A2QtyJAPPTDiDv5stSfXc7OM55xlQqHeCMTzdKu jpw1jzroDlP/7k/Nz2+z4VBcgn5BzLV1rB/6o20JxLDwkFoSdwFIuHSm/1Z5I5uRhm5y+kW71Dd Lu5cMDI0Emuuh3jBlLSEINn/u/dEWZUQg7It5TK5cFyKOeK9ZeTnQ453i6LRygFK4fomOF+Xq6p kgEDMyn8pwzCr4uUjvmT6nioITofVP8oTskZfKhTGYkholAY2E8fkJAFaAuUWYqPajDNXFNKGDQ v+Yq/tD1yEyw+ZkqbPu1CWo/MUVxeCO5uA+pVYbODVfGsECvnNBUov7bWf3dSfOPp3U/oZsbDua Hb0ycxl2MntiGvEYnMzjqLg3iaKUMakAeV0TCF2v7o= X-Received: by 2002:a5d:6f09:0:b0:47f:d0fb:ea40 with SMTP id ffacd0b85a97d-482e271392emr23378946f8f.21.1787843972623; Thu, 27 Aug 2026 08:19:32 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 05/20] xen/riscv: implement make_cpus_node() Date: Thu, 27 Aug 2026 17:18:58 +0200 Message-ID: <05b604b2cb8449c538f64fe56dbfff985dd003dd.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1787843973-CC57487B-196DC0FF/10/73395122804 X-purgate-type: spam X-purgate-size: 6164 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844013657158500 Content-Type: text/plain; charset="utf-8" Implement make_cpus_node() to create cpus node for a guest domain. This function is going to be use by common dom0less code during construction domain. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v8: - Add Acked-by: Jan Beulich . --- Changes in v7: - use get_guest_isa_str() for the "riscv,isa" property instead of building the string per domain. - as a consequence, drop the isa_str/len local variables, the xvmalloc_array()/xvfree() pair and the inclusion; with no resource left to release, the error paths now return res directly and the "out" label is gone. - s/sizeof/ARRAY_SIZE for snprintf's argument. - Drop Acked-by: Jan B. as some changes were done so it would be nice if Jan B. will review them again. --- Changes in v6: - Update the two build_guest_isa_str() call sites for its new `const struct domain *d` signature. - Drop build/tools/fixdep from the patch. - Add Acked-by: Jan Beulich . --- Changes in v5: - Drop Acked-by: Jan Beulich as extra changes were done because of the changed in prev. patch. - Move isa_str allocation and construction out of arch_domain_create() and into make_cpus_node() as a local variable, since the string is only needed during FDT generation. Use a two-call build_guest_isa_str() pattern (size probe, then fill) with xvmalloc_array, and convert all post-allocation error returns to goto out so xvfree() runs on every path. --- Changes in v4: - Update the comment in make_cpus_node() to match code style. - Add Acked-by: Jan Beulich . --- Changes in v3: - Add blank line above make_cpus_node() function definition. - Move 'unsigned int cpu' from function-level declarations into the for lo= op. - Drop 'uint32_t reg =3D cpu_to_fdt32(cpu)'; use fdt_property_cell(fdt, "r= eg", cpu) instead of fdt_property(fdt, "reg", ®, sizeof(reg)) so byte-order adj= ustment is handled internally. - Add matching /* interrupt-controller */ start comment; fix end comment to /* end interrupt-controller */. - Update d->arch.guest_isa_str to ->isa_str in make_cpus_node() function. --- Changes in v2: - s/u32/uint32_t for timebase_frequency local variable. - Drop +1 from BUILD_BUG_ON(). - return fdt_end_node(fdt); instead of res at the end of the function. --- --- xen/arch/riscv/domain-build.c | 106 ++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 5f6f4b6248a5..1af4c48fb30c 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,8 +3,10 @@ #include #include #include +#include #include =20 +#include #include #include =20 @@ -48,3 +50,107 @@ int __init construct_domain(struct domain *d, struct ke= rnel_info *kinfo) =20 return 0; } + +int __init make_cpus_node(const struct domain *d, struct kernel_info *kinf= o) +{ + int res; + const struct dt_device_node *cpus =3D dt_find_node_by_path("/cpus"); + uint32_t timebase_frequency; + bool frequency_valid; + void *fdt =3D kinfo->fdt; + + dt_dprintk("Create cpus node\n"); + + if ( !cpus ) + { + dprintk(XENLOG_ERR, "Missing /cpus node in the device tree?\n"); + return -ENOENT; + } + + frequency_valid =3D dt_property_read_u32(cpus, "timebase-frequency", + &timebase_frequency); + + res =3D fdt_begin_node(fdt, "cpus"); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#address-cells", 1); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#size-cells", 0); + if ( res ) + return res; + + if ( frequency_valid ) + res =3D fdt_property_cell(fdt, "timebase-frequency", timebase_freq= uency); + + for ( unsigned int cpu =3D 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + + snprintf(buf, ARRAY_SIZE(buf), "cpu@%u", cpu); + res =3D fdt_begin_node(fdt, buf); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "reg", cpu); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "status", "okay"); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", "riscv"); + if ( res ) + return res; + + BUILD_BUG_ON((sizeof("riscv,") + + sizeof_field(struct gstage_mode_desc, name)) >=3D si= zeof(buf)); + snprintf(buf, ARRAY_SIZE(buf), "riscv,%s", max_gstage_mode->name); + res =3D fdt_property_string(fdt, "mmu-type", buf); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "riscv,isa", get_guest_isa_str()); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "device_type", "cpu"); + if ( res ) + return res; + + /* Start of interrupt-controller */ + res =3D fdt_begin_node(fdt, "interrupt-controller"); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", "riscv,cpu-intc"); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#interrupt-cells", 1); + if ( res ) + return res; + + res =3D fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "phandle", alloc_phandle(kinfo)); + if ( res ) + return res; + + /* End of interrupt-controller */ + res =3D fdt_end_node(fdt); + if ( res ) + return res; + + res =3D fdt_end_node(fdt); + if ( res ) + return res; + } + + return fdt_end_node(fdt); +} --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844001; cv=none; d=zohomail.com; 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:33 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843974; x=1788448774; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=STFNHra9/gv/dSpsPbk0M64rMisoQ8mC24edm4rMW7I=; b=fwav/Q4jSfKLP5I8ww1qwdgUhPD0MtMfFWu+OKBM3hE31wwCtkmh6CPcGXQK2Z+gn9 rXYpNwUWFGVFk/23HI3/c5U8uHFjY+n6k5rY9rYCKp507j9uH8V2u+uoSphO5KNQUGaL hMGeDX9ErQIlnBqKt/bb+080NNRvEfefYV7nx/S5/5CPR0Xr83mw/E5duSXnIWiF1wn8 suMg1vbBGvKwRePYEzKX+v8GMY858fPV423IYIxecERi6MoM+fdqqSPLNgq/kaJSW0Vq 6TH2YvN8kBRMZA7mNeMCANkngGWGofbR/PlCIVM6Wzy2AS3+7BEyMVmZEDPucbu7LwE+ wi/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843974; x=1788448774; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=STFNHra9/gv/dSpsPbk0M64rMisoQ8mC24edm4rMW7I=; b=FWRcNK9/6xfvhKmhIcYMzhI1au1P+9v3xDkFACXtaEXldqE0aD28UnWK1hC9bfKDhc LilmBW7GjLj0+b5ECVp+uAFPzgxxh271XXT7ft7jcpX55+sseAbteSg9uYz4BmBkgerw tGlvz3z+XirATRCszwx8MMSPzq63YTI0YFy/S8lLPzMp/1hSsR8y7kM3eYY9IrcgS3oL D2ZrapH1bNRT5moH4jZO5dlT/Te1Kkgoq6ftL1jdSueIvuqwIpowblIcjewR/qo5Ygtq 4bHcTKRL3chWmcSnR8j1Gr+C5IS6uJgbM024uC6ryk0QmHRnfGmnRJ4x1gwUk/xUapjG EU/g== X-Gm-Message-State: AFuF++lYhGqaMSXwKOPKFu9QH3tF32MipkxolfVCNzr/7GOw53n5ka4V qg5N6r0OYB2bjYJKh4g7jn5aZYnrlEraOcoWRqm3j17DHZT62E+K2CNj7AhJ2A== X-Gm-Gg: AR+sD13k0eg4RZOf+osTnTSq7/5LixbTtq9w8NxZFmo7dN7mFyHmz6XVYDX65KI1QqQ ofWTercjaXdlg8VQnKcqxTcvcOGxd0MlWDdUFZKR1BqMu06A7kE1r3cQaS2ZRMYnk9Pcs/xArGT rKM3ksbbmXBdXHXINcIXFaMh2v9dv5DSyTXxPvzWeS6hbwmgns2bhTEC1jzpUsyAOhoSnIWb3S2 hdwYXCvlIACbsz0o+l0h8yUqE2QWUfVpAUkzT94KlPYsp2G9ph9pmTeQ2QiPNO3sn9MXHOhsr3c S5yojlIo9wlKBUYX4vbAafwDFchqXSuJpmdKw5Z4AsJt2pFjepHGKmX2dwD76BV4REgIOzIPTxM wLOu3pPhk97Vs0kZIPPY69WKHb0a089nMa3JOe5XcNM4sc8UM6p3aJkRb7bPzaMpSj/pAd0Ba5B kOofQlWq/AqvuDnq9j0BHv5IKt8newibnsaoUhw30lrcSCA06f4ZCO+W7VceFaMZKPNh9Crv9Pj lwh0idB04axLgw+0UtrY4AIVJHOrWSm X-Received: by 2002:a05:600c:46cc:b0:49b:909e:922e with SMTP id 5b1f17b1804b1-49b909e92aamr34144205e9.10.1787843974248; Thu, 27 Aug 2026 08:19:34 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 06/20] xen/riscv: implement make_timer_node() Date: Thu, 27 Aug 2026 17:18:59 +0200 Message-ID: X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1787843975-510DDB50-74627B63/10/73395122804 X-purgate-type: spam X-purgate-size: 1618 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844003357158501 Content-Type: text/plain; charset="utf-8" Generally, in DT for RISC-V there is a document which describes a timer node (riscv,timer.yaml or sifive,clint.yaml), but the Linux timer driver is declared with TIMER_OF_DECLARE(riscv_timer, "riscv", ...). It matches the CPU node (compatible "riscv"), not the timer node itself. It then calls of_find_compatible_node(NULL, NULL, "riscv,timer") only to read the optional riscv,timer-cannot-wake-cpu property. Since Xen does not care about that property for now, make_timer_node() is implemented to return 0, as no timer node needs to be created for RISC-V guests. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3-8: - Nothing changed. Only rebase. --- Changes in v2: - Acked-by: Jan Beulich - Update the commit message. --- --- xen/arch/riscv/domain-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 1af4c48fb30c..d7613721db95 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include =20 @@ -154,3 +155,10 @@ int __init make_cpus_node(const struct domain *d, stru= ct kernel_info *kinfo) =20 return fdt_end_node(fdt); } + +int __init make_timer_node(const struct kernel_info *kinfo) +{ + /* There is no need for timer node for RISC-V. */ + + return 0; +} --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844006; cv=none; d=zohomail.com; s=zohoarc; b=NXCYD1U5iy2siMByV19HdINGLbJZEjsHnLftNhR0dl/Z+wBgm4zkhG6rvFb2rdpqGLr1ILhxMLGqnpnkDlU76HVX3dXi2CfFB/gs4Xr3WrmKS+Q0PkmgLSv2DVKWnZ6CMV3m+g8ZgjAVK6rJmQpxsuHFqespzure3p0rMU7ql/s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787844006; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=UQu/lqi3OofaW9Ww27GFTZkZC+QKN3wGxz75zQOuGZs=; b=ZTkNNHzcAhVG8SOtYfVPSWL4QT/MjiVPvdap4VmUw8t93JDmLwjL60M61WzVeMFHJwtusjuoUaGtCR1535lWp7oUkNCdUgmwF0SJXXoQZ+NwDJUeS+HR8oRJZUddxUzTQrucUF4DAx4MIX0PV2qempHdAWIccCoAc71GC1kilaU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1787844006468290.34991943749014; Thu, 27 Aug 2026 08:20:06 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1400816.1636412 (Exim 4.92) (envelope-from ) id 1wzbtC-0004bR-Et; Thu, 27 Aug 2026 15:19:38 +0000 Received: by outflank-mailman (output) from mailman id 1400816.1636412; Thu, 27 Aug 2026 15:19:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wzbtC-0004bK-BP; Thu, 27 Aug 2026 15:19:38 +0000 Received: by outflank-mailman (input) for mailman id 1400816; Thu, 27 Aug 2026 15:19:36 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wzbtA-0004IV-RZ for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 15:19:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wzbtA-00Fhjf-8V for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 17:19:36 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a905587-e002-0a2a0a5209dd-0a2a4504a04c-2 for ; Thu, 27 Aug 2026 17:19:36 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a905588-b57f-0a2a45040019-d155dd35d48b-3 for ; Thu, 27 Aug 2026 17:19:36 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-47f93b2fe4cso1288964f8f.0 for ; Thu, 27 Aug 2026 08:19:36 -0700 (PDT) Received: from fedora (user-109-243-144-234.play-internet.pl. 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It is placed in dom0less-build.c as make_arch_nodes() is only used in the dom0less code path. In the future, it will be extended to create an emulated UART node. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v6-v8: - Nothing changed. Only rebase. --- Changes in v5: - Drop "Add" before Acked-by above the footer. --- Change in v4: - Add lost Acked-by. --- Changes in v3: - Add Acked-by: Jan Beulich . --- Changes in v2: - Update the commit message. --- --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index a683972e9235..4cc00012aa8d 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -2,10 +2,18 @@ =20 #include #include +#include #include =20 #include =20 +int __init make_arch_nodes(struct kernel_info *kinfo) +{ + /* No RISC-V specific nodes need to be made, at the moment. */ + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844007; cv=none; d=zohomail.com; s=zohoarc; b=il/vhYBrtpbD70Ip4NixL7CoNZ4eYYqLfJGznScP4GZ5TNddYmID6vCfLTPLLUWIywgrKAo6F4aRFalHSYnMNdboQfx5uQ4kVk7JWUTdiLp4HYo1aKw/xTNInHwIwHJkEN4DWewlYikywkOiYNfSLbkqFdYK/OcpJr00JcIyfV4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787844007; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=2rqqgtz0m8ycDrWJfyzyeS5VceMq0RnmIpD0J8gdZ2Y=; b=VSN6tK2bsx5ZN0yocduVk7ZAG5CbbPCdeDFgGjF+QNbfO79LZ5d/jNKL+Y0LFjDRwvv6cdJvC5mgvcO3MBW/5QJELqaIXIhsEr0g7juaurUHBiubuYX7JgDNK7ECbd8SQtma3MFTT+97BQLc5eMo+bk1C/mRebLQXXfmxNV4jOU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1787844007469592.4999973210199; Thu, 27 Aug 2026 08:20:07 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1400817.1636422 (Exim 4.92) (envelope-from ) id 1wzbtD-0004rw-QR; Thu, 27 Aug 2026 15:19:39 +0000 Received: by outflank-mailman (output) from mailman id 1400817.1636422; Thu, 27 Aug 2026 15:19:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wzbtD-0004qs-Lj; Thu, 27 Aug 2026 15:19:39 +0000 Received: by outflank-mailman (input) for mailman id 1400817; Thu, 27 Aug 2026 15:19:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wzbtC-0004XF-6W for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 15:19:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wzbtB-00C6ki-Jo for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 17:19:37 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a905589-2eae-0a2a0a5409dd-0a2a4502d400-2 for ; Thu, 27 Aug 2026 17:19:37 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a905589-6ca4-0a2a45020019-d155dd34b1c0-3 for ; Thu, 27 Aug 2026 17:19:37 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-47fd66a094eso761505f8f.3 for ; Thu, 27 Aug 2026 08:19:37 -0700 (PDT) Received: from fedora (user-109-243-144-234.play-internet.pl. [109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:36 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843977; x=1788448777; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=2rqqgtz0m8ycDrWJfyzyeS5VceMq0RnmIpD0J8gdZ2Y=; b=FRfjztLMxlgh4cCv5ujKMNq3pZi9G6EjYVsj0dPLaKFlUbhc+xGoLgQ8uHpnAmNSgj MfXfL9acJ9Pdr+JEZl3OpZqex5EGntJgt0vkWCPKgqm+OjxVAfTshnQz/KbagC/w3WlJ 3fuk+UaNxtADu90rLSTw0PsYHp3BESizecerrnebZanCxr/1a32aZEgm7wBLs4POeCaF T9OMtrK9mFuVlLNOncKpsyBwEa1izH11SqjZpT8v4s9EbVCmFZXPnKo18HB2AOmQXiWu /U2uTSHdkALlrl4TpLByrwwNKcv8d78085oZDGXyZV3az8e0kAdmX/nT7kG9AF6nWI28 aWzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843977; x=1788448777; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=2rqqgtz0m8ycDrWJfyzyeS5VceMq0RnmIpD0J8gdZ2Y=; b=RZXY2yP+qz+t5iP7RqcayGQ+icQ1tgKAxdcIC+9gY3hURwRoDK76ZMYMpiHl02RhDO yfez4tu1ZT546Z41Jz4s2+8Wy7Gb/N4NWouN8MGYokMlOAL0tGD2Gd9tzt18n50Yg70Q a8qinSBvoDv3aUbsoYsqAbnA+Fasfy9U1sJYdA6h+nzyC5d6uvz/5pWbtDfwN7f0Qgxj H+POOFtgc985+XGAcmj5ttqAcIt+nILnapOroe5VKSbiOaQy3Gs8iSmveH9DZZxQMgiM M49lvBPi3jk/3j6zg0I1U5Nw4SOx3gDRF8JKzEl2gxXPRTRgfiDHd6rZhtrRU81SzUmi Gg8g== X-Gm-Message-State: AFuF++n285LOEDuIfF2QV2/6d5Zy0iciwPR8aRdHBu4q4pMz5FVV/1Br otLk5cPVK4hpRSyfgWbLJ5b/dZo1Wd/LlfwcTq0yWKk+cs4CI8PXeG0IWD6MAw== X-Gm-Gg: AR+sD13JV27QCpxQ5caVLGvZQgKpA12nm0mOam5BdcS7WyrXmG1vN0TBxj1u9B0loEI 9Vp/2irdvPb9KyHDu5GkmizZW4ePLwZWR5C2+6JooeOywgYSpB9epZjuNOIfmd9qebl+FsIYuTr QL2pyOLSo3TZ4rix1za7FGPvDj2c7XEWfAmS+Ktmtq4N8SlcN8B8k0A4qtNEE4Af4+7fM9N9UzX be6imu11HBIZOOvWVMbwqg6yMS2NPpo22zY8LIPDWQ498FfgqvyvhF+7ZSmkKV27K0RUrKdrF3R 8Atb/jlBz6gFAVplS5NPNYHAS3s0ImdarflraONIfR5gGqmJxUgSU2+Ugl9Fx1L7fI8ni5ovEs5 UuIves4YC0sagfsxhTpFJS80fBdJYy0jebB/lWl02tjmHO865eh/Vm+B7X02YLz6FmtMo5lJpSH 3V40qziL0pgGNOqalnWtC1a88A/lF+KIXGfodqxKSaLFzdv85BD1dI9QRsUwZvujmgHZO3/Bfo6 Db0jDC+lLZRNSE5cCEiTaulKncLwb49 X-Received: by 2002:a05:6000:71a:b0:482:e4bc:51a7 with SMTP id ffacd0b85a97d-482e4bc5337mr20087141f8f.11.1787843976925; Thu, 27 Aug 2026 08:19:36 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 08/20] xen/riscv: introduce init interrupt controller operations Date: Thu, 27 Aug 2026 17:19:01 +0200 Message-ID: <7eba48417bb5f5329a054e4bcccabc5139e13dd0.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1787843977-F36BF2AC-35DFB46B/10/73395122804 X-purgate-type: spam X-purgate-size: 4032 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844009427158500 Content-Type: text/plain; charset="utf-8" Introduce intc_hw_init_ops structure to avoid risky mix of init function and non-init function. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5-8: - Nothin changed. Only rebase. --- Changes in v4: - Use __initconstrel instead of __initconst for aplic_init_ops as both initialized fields incur a relocation. - Add Acked-by: ... . --- Changes in v3: - Use __initconst instead of __initdata for const intc_hw_init_ops. - Embed const struct intc_hw_operations *ops into intc_hw_init_ops so register_intc_ops() takes a single pointer argument. --- Changes in v2: - New patch. --- --- xen/arch/riscv/aplic.c | 8 ++++++-- xen/arch/riscv/include/asm/intc.h | 10 +++++++--- xen/arch/riscv/intc.c | 11 ++++++++--- 3 files changed, 21 insertions(+), 8 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 9f023db5d525..d08401db46b3 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -325,12 +325,16 @@ static const hw_irq_controller aplic_xen_irq_type =3D= { =20 static const struct intc_hw_operations aplic_ops =3D { .info =3D &aplic_info, - .init =3D aplic_init, .host_irq_type =3D &aplic_xen_irq_type, .handle_interrupt =3D aplic_handle_interrupt, .set_irq_type =3D aplic_set_irq_type, }; =20 +static const struct intc_hw_init_ops __initconstrel aplic_init_ops =3D { + .ops =3D &aplic_ops, + .init =3D aplic_init, +}; + static int cf_check aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize, unsigned int *out_hwirq, @@ -366,7 +370,7 @@ static int __init aplic_preinit(struct dt_device_node *= node, const void *dat) =20 dt_irq_xlate =3D aplic_irq_xlate; =20 - register_intc_ops(&aplic_ops); + register_intc_ops(&aplic_init_ops); =20 /* Enable supervisor external interrupt */ csr_set(CSR_SIE, BIT(IRQ_S_EXT, UL)); diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 675f703ec97f..d7b34fc15ad1 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -28,8 +28,6 @@ struct intc_info { struct intc_hw_operations { /* Hold intc hw information */ const struct intc_info *info; - /* Initialize the intc and the boot CPU */ - int (*init)(void); =20 /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; @@ -43,9 +41,15 @@ struct intc_hw_operations { void (*handle_interrupt)(struct cpu_user_regs *regs); }; =20 +struct intc_hw_init_ops { + const struct intc_hw_operations *ops; + /* Initialize the intc and the boot CPU */ + int (*init)(void); +}; + void intc_preinit(void); =20 -void register_intc_ops(const struct intc_hw_operations *ops); +void register_intc_ops(const struct intc_hw_init_ops *init_ops); =20 void intc_init(void); =20 diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index ea317aea5ad8..3600d23bdb5b 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -12,9 +12,12 @@ =20 static const struct intc_hw_operations *__ro_after_init intc_hw_ops; =20 -void __init register_intc_ops(const struct intc_hw_operations *ops) +static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; + +void __init register_intc_ops(const struct intc_hw_init_ops *init_ops) { - intc_hw_ops =3D ops; + intc_hw_ops =3D init_ops->ops; + intc_hw_init_ops =3D init_ops; } =20 void __init intc_preinit(void) @@ -27,7 +30,9 @@ void __init intc_preinit(void) =20 void __init intc_init(void) { - if ( intc_hw_ops->init() ) + ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); + + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); } =20 --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844026; cv=none; d=zohomail.com; s=zohoarc; b=ZFdpOLinlp1JtLp5XC848V04FIMjmjJqa2moIGKa5I7RCB2NW1wgpZfZCMTl2t24SqWOljx8BKaQdSvjNTUP6jglx3d1Ou6sa11z27+z2QJ2yWK4jm9WtapV6+3I+J0nPPnfZHrdFBnImBE3xLpmJvXquWW+M6RG3oZ4dNL7myM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:37 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843978; x=1788448778; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=0M3EgygiTwyj1BTDY//NIuuLWaR+oYVriRuH7zUtriM=; b=HmQfarzbUsV9Eqo6dzQ8Bt0jTde2bfSbrXU4KMUiysvKDVeAzkyrZrdClqR1frpubu xv1GNo2Cpomwt9zGBi9NbhKbvgp/6mZGXffDdW3avLRg3i0e8jaSdY2c0riu1iv1TkrH NbIevmGCkMTsvVZiFWzMVCb9VnnNXOJzB4Bh2HjUptHwRsHdi84UK7PTVgc34HyCvEDS 304yqBZcDMj5k/s0w6ROkQSJDDhgHEXkXuYTfUsqXFL1XLVqhY86yFkG88S1pfgd3QiN O54we6KEE1VzjCWa/KdRIoGuSmgXcqUHVe+Dr+ohwt+c3uI/VID0OFl+SmnM5TyFAX4b O7OA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843978; x=1788448778; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=0M3EgygiTwyj1BTDY//NIuuLWaR+oYVriRuH7zUtriM=; b=oM95EtiKDjb4EDcsLMbjuAtzmdChWgwJqU8weFiTDEAbO3sTcoUjDkIqwROs9WZeQL Wn3gpGt76giUtsV/9Jtw0FWwnW12Uyo34dVjd6D9NTrHtTUyVBDVUKvCK8acsXEb2uXB FfxZq7paghM4tWHbyKkWyb0Qq2O/xC2fvs43QlTRZ6poNe5XdQukYSHgab/TRvp4I1qi K++04HZr2yrTgrhX/CTBONQoa76N8Ia3QRbw9hYtzwQ9IZ4ellL1TpH9NUPcLt8YhzTk y0V513pEL6tRufK3NqMoGdOgM8qQDqXodWxz8ulTPnQ3b7nZUA2DA4FwzlM6i1N2XlKo yaqQ== X-Gm-Message-State: AFuF++me78mUyAxe/d2X+o4tQ34K69kO/AOo6WJEb3SW/eg8LqgNz5WP CpDqamkNqNXrPdAeo79f4Fc0ia+7JftApJv6NW93bkP7cIBfbr5LrLrrkZHQbg== X-Gm-Gg: AR+sD10nKLrfwxatEqClmC7HCj4zkv/AirBXJATJQ/aMR05qd7FniQZTJD/IYxODn+A /8OlHC4JiSksirZA7x6+nZSrddh9PDOBD92Md8zXqzNsJAnalqBISxsY7Ix1AafP1zFn+wnvGdy gXH7XmWZsyMvO18bX0Pz5NVqneyv/M2h1fToxztKxENVdJw5E6aqvR7epaaCgvKaRmz3jtJCn1O +etmAX/XBW8RqSKIN6zoJhcU/by4kvHxeyasgw4EhJ0GYTL3yzznnzYn8Nw6Te5GAWBBjmEtjV7 BCBhFgXOtwNi68heKPfud2bBg1JyM1LB1RYA8b/EJYKoAkLKPOXQ3RHcjB/ELpl2YQbZF7xHc7V PaWF+HDSekoxmRjEzuSOdmGB4nL7CqoWTvsFHFbGfzdZP6D8OTN2c6V970GFipdvy0teWbDGuu2 Cnlodf2VitGktmgZ7jkAJHce9lsbr2vOVacEEYYTUV6glslsTBUv11Qr6OwbvuaPO+1pox+0qDX UGK2pDTKB4CjW5Fkhs3FIpntkmLWi0Tew== X-Received: by 2002:a05:6000:2008:b0:482:c72e:6af4 with SMTP id ffacd0b85a97d-482e2628158mr21154717f8f.0.1787843978226; Thu, 27 Aug 2026 08:19:38 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 09/20] xen/riscv: implement make_intc_domU_node() Date: Thu, 27 Aug 2026 17:19:02 +0200 Message-ID: X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1787843978-307C22AC-55D4A302/10/73395122804 X-purgate-type: spam X-purgate-size: 3439 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844027488158500 Content-Type: text/plain; charset="utf-8" Introduce a RISC-V specific function to create an interrupt controller Device Tree node for DomU domains during dom0less build. Add make_intc_domU_node() to the dom0less build path and wire it to a new generic helper, intc_make_domu_dt_node(), which delegates DT node creation to the active interrupt controller implementation via vintc_init_ops. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5-8: - Nothing changed. Onlye rebase. --- Change in v4: - Made local variable vintc pointer-to-const. - Add Acked-by: Jan Beulich --- Changes in v3: - Use const struct vintc_init_ops *init_ops in struct vintc. - Drop redundant intc_hw_ops check in make_intc_domU_node(). - Drop NULL pointer checks in make_intc_domU_node() as we can't start domU without properly created interrupt contoller node. --- Changes in v2: - s/intc_make_domu_dt_node/make_intc_domU_node. - introduce separate intc_hw_init_ops structure for init operations. - Return -EOPNOTSUPP instead of -ENOSYS. - Drop const for kinfo argument as it could be changed by interrupt controller node creation code. - Refactor make_domu_dt_node(). - Make make_domu_dt_node part of vintc structure as it looks more logical = to be there. --- --- xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/intc.h | 10 ++++++++++ xen/arch/riscv/intc.c | 8 ++++++++ 3 files changed, 20 insertions(+) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index 8ae01a5e4dcc..bd43ed08c22c 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -97,6 +97,8 @@ struct arch_domain { struct paging_domain paging; =20 const unsigned long *isa; + + struct vintc *vintc; }; =20 #include diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index d7b34fc15ad1..a4e678fad90b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -16,6 +16,7 @@ enum intc_variant { =20 struct cpu_user_regs; struct irq_desc; +struct kernel_info; =20 struct intc_info { enum intc_variant hw_variant; @@ -47,6 +48,15 @@ struct intc_hw_init_ops { int (*init)(void); }; =20 +struct vintc_init_ops { + /* Create interrupt controller node for domain */ + int (*make_domu_dt_node)(struct kernel_info *kinfo); +}; + +struct vintc { + const struct vintc_init_ops *init_ops; +}; + void intc_preinit(void); =20 void register_intc_ops(const struct intc_hw_init_ops *init_ops); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 3600d23bdb5b..e63da5e22efc 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -72,3 +73,10 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsign= ed int priority) intc_set_irq_type(desc, desc->arch.type); intc_set_irq_priority(desc, priority); } + +int __init make_intc_domU_node(struct kernel_info *kinfo) +{ + const struct vintc *vintc =3D kinfo->bd.d->arch.vintc; + + return vintc->init_ops->make_domu_dt_node(kinfo); +} --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844002; cv=none; d=zohomail.com; s=zohoarc; b=n6miN1MKf00mvlf0krTbJ4+PlCmLGqS/Tpl20mENCulyRQc2cdm6wUsV9mJerSPC9Lqbdo+vGj3v9z5SfdvScSOtY3PKcf0aAbpXcmhLKtzt5iv9ZpGL/B0hwMx3ERFxuIqnD1vGx8cOm1FO8jnH7clrrQ2yvkD1SiGeLty6h50= ARC-Message-Signature: i=1; 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At the moment, it only checks whether the SSAIA extension is available, and if so, sets is_aia_usable (which indicates more than just the availability of the extension) to true; it also signifies that the necessary components (to be introduced in follow-up patches) have been initialized. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v6-8: - Nothing changed. Only rebase. --- Changes in v5: - Update the guards in asm/aia.h according to CODING_STYLE: s/ASM__RISCV__AIA_H/RISCV_AIA_H. --- Changes in v4: - Add Acked-by: Jan Beulich --- Changes in v3: - s/is_aia_usable/_aia_usable to drop the is_ prefix while avoiding conflict with the aia_usable() function name. --- Changes in v2: - s/is_aia_available/is_aia_usable. - Drop return value for aia_init(). - s/aia_available()/aia_usable(). --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aia.c | 23 +++++++++++++++++++++++ xen/arch/riscv/include/asm/aia.h | 10 ++++++++++ xen/arch/riscv/intc.c | 3 +++ 4 files changed, 37 insertions(+) create mode 100644 xen/arch/riscv/aia.c create mode 100644 xen/arch/riscv/include/asm/aia.h diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 2d24670dfc74..8e7a6370eee2 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,3 +1,4 @@ +obj-y +=3D aia.o obj-y +=3D aplic.o obj-y +=3D cpufeature.o obj-y +=3D domain.o diff --git a/xen/arch/riscv/aia.c b/xen/arch/riscv/aia.c new file mode 100644 index 000000000000..e31c9c2d24b6 --- /dev/null +++ b/xen/arch/riscv/aia.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +static bool __ro_after_init _aia_usable; + +bool aia_usable(void) +{ + return _aia_usable; +} + +void __init aia_init(void) +{ + if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + return; + + _aia_usable =3D true; +} diff --git a/xen/arch/riscv/include/asm/aia.h b/xen/arch/riscv/include/asm/= aia.h new file mode 100644 index 000000000000..aaa4bf91fc75 --- /dev/null +++ b/xen/arch/riscv/include/asm/aia.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef RISCV_AIA_H +#define RISCV_AIA_H + +bool aia_usable(void); + +void aia_init(void); + +#endif /* RISCV_AIA_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index e63da5e22efc..2864a896b677 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -9,6 +9,7 @@ #include #include =20 +#include #include =20 static const struct intc_hw_operations *__ro_after_init intc_hw_ops; @@ -33,6 +34,8 @@ void __init intc_init(void) { ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); =20 + aia_init(); + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:40 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843981; x=1788448781; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=nZD3gU2yZzrDhjPBJtPeKT6B+BREExRn7A4TAumGyiM=; b=mwQagBHRFzWDLIqCxzK9x1b2qb1zAkRX6/hU2hxPcaQPy9gHfW3gVLjV45ITp10aQJ /TJ2mphdxA5id6ELmya9G8k1uRRyq2tqnoHZh4HjcwP8O2wGFaT31ryaKSW5IQfliNtn kzCLGu1LXrc4gORNRNIug1kl9AV0LsUh4kKVDSUttNFs1IntdZODlI4TfcealRwm19f9 g6PgxykaliGiQt1MBAeTyYLBvesk7IA2eVdjEYa6nkfy19VEniWThBAVGpt9QmjMgvUA +nhh7Ik2jEW6lJAFie38pNIfEMo/NtUe9QAKeTRGV75YNAwmKSaXC7JkFNQA6vOMEAbz o3UA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843981; x=1788448781; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=nZD3gU2yZzrDhjPBJtPeKT6B+BREExRn7A4TAumGyiM=; b=qOdDk1KD+lJmQMwu4UtkXJ+QlMFKN/qcUPl4g2yNmtnY5mStxgIC7C41wt9a+lEG/w muaHZAmyj7+gpA8DK0488rUzXiSIsbmFe2cykq60LenO3JpxE9KvLxteC1FGflGR6lHe smkE4ncnYUQYyrE07dmiHPn+6LMwi3/ara038MhLu4F1djn1304Eh9G4wbVoK1ebB3z2 pEUfrmJSdhyzBtN8Y4xbDUWLF3ZP416WWCAdyxJzCVyBpw45DPf0LtP1P/9mzutyWRwo ZftKc2YhAnMfIPBoN0FLlfKpGkbi6Pd/OESmavF4+3xpWLZKgWqouFa/T26ay0YctztX s3HA== X-Gm-Message-State: AFuF++ny+StXoL/a3KFf7rjbrKteYaORtMpQK4qLXJsN5LQsiJ2fuA5D W0METcRLyZin9WcVPFyB7JnGGwnjmHc7kvBm3C0h2XWEoTM9Epwqkid/iAtkFA== X-Gm-Gg: AR+sD12tssgsK/MOpUUFG98/TTPjqPIXANMo630tb1p7MLVOH+SKqvxZc0vDOBYaWOD 9XoVwIS0oGzQI8jRIf/j/YJP9O6c29Ea50LyIUgvqnxZB151AMwxeSiWZSI9GR/IUZsELLrEKPG ZKF0Ury9PSpnjAgTrQZ+9ICmwCm9o87gF1Z82Ml5jXXyk37k3mQI7AVy2thniVd4KXmXC0gMOe4 r1AjhEwF167S7hh7JDWaNT1oaDJAd0rn7wcirCfGBGWOMADAmKTJB+lwEJLqpwnc3z8/tI0HP8S Ful7eBMYkJaLlOYVaK+PnynnQ4+dDKE3RChBfsHFKDjiYnU6q48LOJEXuUDwqIfAJxotaW7lekn 0VD/2pOLP4wl9CkoTuPB5HlJG1ZkbIq/aoZPaQ5RephR6blWbVPZ4H0pAo3PzzhM4Nj1Fa+oy9W M1ePZv33hZYMFrkZVZxkCVo8ivMvPvkDC+x6cf0y2ehWgnUrcOf+IegYxk3EBv8OsnFT22UHM4S /2X3GFZ2+q8A/Y9BOw7iZxYbvcZDUhIiTk7xtvkRa2R X-Received: by 2002:a05:600c:6287:b0:499:db27:7b1 with SMTP id 5b1f17b1804b1-499dc8311b7mr198446165e9.15.1787843980654; Thu, 27 Aug 2026 08:19:40 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 11/20] xen/riscv: introduce per-vCPU IMSIC state Date: Thu, 27 Aug 2026 17:19:04 +0200 Message-ID: <86fd78c21e77834c0fb51f0c4e8c410360ea3d64.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1787843981-FE47377B-FD561B1A/10/73395122804 X-purgate-type: spam X-purgate-size: 6596 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844013656158500 Content-Type: text/plain; charset="utf-8" Each vCPU interacting with the IMSIC requires state to track the associated guest interrupt file and its backing context. Introduce a per-vCPU structure to hold IMSIC-related state, including the guest interrupt file identifier and the CPU providing the backing VS-file. Access to the guest file identifier is protected by a lock. Initialize this structure during vCPU setup and store it in arch_vcpu. The initial state marks the VS-file as software-backed until it becomes associated with a physical CPU. Add helper to retrieve the guest interrupt file identifier: - vcpu_guest_file_id() is going to be used during update of APLIC's target register with the pair of information (to have MSI delivery mode work properly) when guest is trying to access vAPLIC's target register. It will be used in the follow up patches. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Change in v8: - Rename imsic_state->vsfile_pcpu to ->*_cpu to reflect better its sentinel NR_CPUS. --- Changes in v6-7: - Nothing changed. Only rebase. --- Changes in v5: - Move v->arch.vimsic_state =3D imsic_state; after full initialization of the struct, so the pointer only becomes globally visible once all fields are set up. - Add Acked-by: Jan Beulich . --- Changes in v4: - s/w vs h/w IMSIC VS-file commentary for struct vimsic_state: - fix the vsfile_pcpu h/w condition: "vsfile_pcpu >=3D 0" -> "vsfile_pcpu < NR_CPUS" (the old wording conflicted with the s/w "=3D=3D NR_CPUS" case). - reorder both comment blocks to the "s/w ... / h/w ..." form for readab= ility. - drop IMPOSSIBLE_GUEST_FILE_ID: the s/w IMSIC VS-file is always available and corresponds to guest_file_id =3D=3D 0, which xvzalloc() already prov= ides, so the explicit initializer in vcpu_imsic_init() and the macro itself are unneeded. --- Changes in v3: - Drop const from imsic_set_guest_file_id() and vcpu_imsic_deinit() as it only works due to vimsic_state being a pointer member. - Use XVFREE() in vcpu_imsic_deinit() to make it idempotent. - Fix SW-file typo in struct vimsic_state comments; should be VS-file. - Drop imsic_set_guest_file_id() here, it will be added later when it will be nessary to initialise guest file id as the correspondendt code in this patch series was reworked and there is no need to use this function in arch_vcpu_create(). - Introduce IMPOSSIBLE_GUEST_FILE_ID and init with it ->guest_file_id. --- Changes in v2: - Rename imsic_state to vimsic_state. - Use 'unsigned int' for vsfile_pcpu. - Drop initialzation of ->guest_file_id as it will be by default zero. - Add the comment about ->guest_file_id field. - Drop __init for vcpu_imsic_init() as it could be used during post-boot vCPU creation. - Update the commit message. - Drop locks around ->guest_file_id() in vcpu_guest_file_id() and imsic_s= et_guest_file_id(). --- --- xen/arch/riscv/imsic.c | 35 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/imsic.h | 22 ++++++++++++++++++ 3 files changed, 59 insertions(+) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index f7b70a8da09e..a916def07380 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -56,6 +57,11 @@ do { \ csr_clear(CSR_SIREG, v); \ } while (0) =20 +unsigned int vcpu_guest_file_id(const struct vcpu *v) +{ + return ACCESS_ONCE(v->arch.vimsic_state->guest_file_id); +} + void __init imsic_ids_local_delivery(bool enable) { if ( enable ) @@ -312,6 +318,35 @@ static int imsic_parse_node(const struct dt_device_nod= e *node, return 0; } =20 +int vcpu_imsic_init(struct vcpu *v) +{ + struct vimsic_state *imsic_state; + + /* Allocate IMSIC context */ + imsic_state =3D xvzalloc(struct vimsic_state); + if ( !imsic_state ) + return -ENOMEM; + + /* Setup IMSIC context */ + rwlock_init(&imsic_state->vsfile_lock); + + /* + * xvzalloc() already cleared the context, so guest_file_id =3D=3D 0, = i.e. the + * always-available s/w IMSIC VS-file. Only vsfile_cpu needs an explic= it + * initializer as its s/w VS-file value is NR_CPUS rather than 0. + */ + imsic_state->vsfile_cpu =3D NR_CPUS; + + v->arch.vimsic_state =3D imsic_state; + + return 0; +} + +void vcpu_imsic_deinit(struct vcpu *v) +{ + XVFREE(v->arch.vimsic_state); +} + /* * Initialize the imsic_cfg structure based on the IMSIC DT node. * diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index bd43ed08c22c..e035b33ddfdc 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,6 +54,8 @@ struct arch_vcpu { =20 struct vtimer vtimer; =20 + struct vimsic_state *vimsic_state; + register_t hcounteren; register_t hedeleg; register_t hideleg; diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/as= m/imsic.h index c6c59215df20..5ee954bbf3ef 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -11,6 +11,7 @@ #ifndef ASM_RISCV_IMSIC_H #define ASM_RISCV_IMSIC_H =20 +#include #include #include #include @@ -61,7 +62,24 @@ struct imsic_config { spinlock_t lock; }; =20 +struct vimsic_state { + /* IMSIC VS-file */ + rwlock_t vsfile_lock; + /* + * s/w IMSIC VS-file -> guest_file_id =3D=3D 0 + * h/w IMSIC VS-file -> guest_file_id > 0 + */ + unsigned int guest_file_id; + /* + * s/w IMSIC VS-file -> vsfile_cpu =3D=3D NR_CPUS + * h/w IMSIC VS-file -> vsfile_cpu < NR_CPUS + */ + unsigned int vsfile_cpu; +}; + struct dt_device_node; +struct vcpu; + int imsic_init(const struct dt_device_node *node); =20 const struct imsic_config *imsic_get_config(void); @@ -71,4 +89,8 @@ void imsic_irq_disable(unsigned int hwirq); =20 void imsic_ids_local_delivery(bool enable); =20 +int vcpu_imsic_init(struct vcpu *v); +void vcpu_imsic_deinit(struct vcpu *v); +unsigned int vcpu_guest_file_id(const struct vcpu *v); + #endif /* ASM_RISCV_IMSIC_H */ --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:41 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843982; x=1788448782; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=W+cjjAmAdrDUJbwRcaPwXKgv9wbIDWWM3qq0kbN6Frc=; b=msN/HimpUNp+PMyESWKUWdql6c57y3RcgPaTAawpsniFSySevQaCLc5ugxXMA6rb3i aT3WqnJvavCNx266UZ5kPvnfMue7paq+aviR4yvKPVJoEyNmRG6JvrIfynFWw7D2tVWu sxWs8SGId1PdmYmkGAYIque9m5O0bfYEcTr0i31HuqPSH6aTaUCSgIzBORH1p/0z4Bvt u/gMaNlIx0/g9bqijaJc56AR0JuAj0n6pe563qQl1GcqHkIDItxw6zpVYaRjOg7yr033 +5FXlI7J06SIQ3DBAkrAC0zHVHxBlQdQddfJ66JOUBHh4KIR9ufSMml3AB0GRsSwsETq zoFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843982; x=1788448782; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=W+cjjAmAdrDUJbwRcaPwXKgv9wbIDWWM3qq0kbN6Frc=; b=pZ3m+ldethAwdftTVIfuzd/7fT3um4wFBYSglVV0YG+9e8YHE8+13SSg0PHPEhMVjG quQglXm9ix4A7a+cJ1fTsSz2qNTNeur/56/QTEmncpVWT/TDsjasrec9vrtE5m/Ihyqh 3AMr5Vzd4sSBEj0gqTAeteeE9airD3imtdqD/Ki/5txej6nngk2zZ7oDdcodkByurc5F 0IOSzaDvbSDtqSOUaE10bvgGbEPHA2DNEnnMyXg/0dHjYK/OXW5IvcAguCCYbyCp1lRd cl8xmCQ3q02OyRq7rs+1PND1A+zwrg60jbwuAmp0ylgqJEeFG7jFoUQGOgW9/zIeV9dF j86g== X-Gm-Message-State: AFuF++kji0lgegnYHDQRvVUzGzrTP4ijku28pT4WKAXBfLIcVd3wuCEa QGPC9i/RfprmGg33BNyJvoJf3y/fs7spWUI8t4CM4LVDtWUztNHpquk+7i4MXg== X-Gm-Gg: AR+sD10XUbdNMLzpPoYLZunQcEeLtOOVPV+aUhGUA1j+D5hapES+oq44F/KF1H5vBht DxyPvBEl6IbIedmhYswUHEz35PVl0+fYfFOgkCVB3xM8armhOdVSTmQAa/JMRN2cZZNoUZGPc7/ 6RvjK+9UJbFeZSdj7pmrz0YTENdoWiWhFFcgAKrJW8UxzVzE4aWCd6qu5PSHv+V28ORHC7kYi8J PyZ84sMQaiOogoBydmbUFnudjC6GlCCpK6SjO0en/odXSBok4co06uQuEYzsc3JDVH0DhH7VLZP RdcP9JQslwWHfQV3bbHG6uM9YU5/AmoTe8nstdaawZttZ/MB5jc1rAmJ1O73ZZzwE7kGIBxAI9s f2avDTCTAsxkIhSRIUNSSh37qU7onIveH6Sx4i5OtC1pDRObTfViwGTkHr4Qk+g2eY/wWaq5d1Y SQUb538VW9XnHx8Ze++y6GlaBJpQtof+nXrrDYljKHP+9nuqBdpHdFdOpVxtPf5XDtqDSFXAZLi 99vevlU+cytnckkIaPfYqRGnInFu0NN X-Received: by 2002:a05:600c:8b4c:b0:499:a5fc:207e with SMTP id 5b1f17b1804b1-499dc7044c5mr203989825e9.8.1787843981972; Thu, 27 Aug 2026 08:19:41 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 12/20] xen/riscv: introduce minimal virtual APLIC (vAPLIC) infrastructure Date: Thu, 27 Aug 2026 17:19:05 +0200 Message-ID: <872d8b9e35d68d0b6ad02ae28e37f37dc931a4d8.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1787843982-77CC34E9-26F8A57D/10/73395122804 X-purgate-type: spam X-purgate-size: 10379 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844007456158500 Content-Type: text/plain; charset="utf-8" At the current development stage, only domain vINTC init and deinit operations are required, so implement those first. Initialize vAPLIC's domaincfg to with the interrupt-enable bit set and MSI delivery mode selected as the current solution is exepcted to have always IMSIC, and initialize vintc->ops. Other operations such as emulate_load(), emulate_store(), and is_access() will be needed once guests are running and MMIO accesses to APLIC MMIO range must be handled. These will be introduced separately later. Introduce a structure to describe a virtual interrupt controller (vINTC) and a vintc_ops structure, which provides operations to emulate load and store accesses to interrupt controller MMIOs and to check whether a given address falls within the MMIO range of a specific virtual interrupt controller. Note that already existed init_ops field in struct vintc will be init-ed for APLIC in the follow up patch. The vAPLIC implementation of these operations will be provided later once guests can be run and these operations are actually needed. Introduce these structures here as they are required for the implementation of domain_vaplic_init() and domain_vaplic_alloc(). Also, introduce vaplic_init() and init vintc_ops->vcpu_init() with it. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v8: - Drop vaplic_init() and vcpu_aplic_deinit() as they are just calling IMSIC related files as we are expecting to work only MSI mode. - And add cf_check for vcpu_imsic_(de)init as they are directly used now for vintc_ops->vcpu_(de)init. --- Changes in v7: - Add Acked-by: Jan Beulich . - Update the comment above init_ops member of vintc structure. --- Changes in v6: - Nothing changed. Only rebase. --- Changes in v5: - Add explanational comments for fields in struct vintc. - Drop unnessary empty line in asm/aplic.h. - Update the commit message to tell that init_ops will be init-ed later in follow up patch. - Init. .domaincfg with only APLIC_DOMAINCFG_RO. - Update the comment above APLIC_DOMAINCFG_RO. - Add defintion for APLIC_DOMAINCFG_BE. --- Changes in v4: - Change subject of the commit. - s/APLIC_DOMAINCFG_RO80/APLIC_DOMAINCFG_RO + added a comment above defini= tion. - Drop unnessary blank lines. --- Changes in v3: - Drop ASSERT() before vintc->ops->vcpu_init() in arch_vcpu_create(); a NULL deref already produces a sufficient backtrace. - Parenthesize macro argument in to_vaplic(). - Drop __init from domain_vaplic_init() and domain_vaplic_deinit() since the caller domain_vintc_init() (follow-up patch) is not __init. - Remove pointless zero-initializer for rc in vcpu_vaplic_init(). - Fix domain_vaplic_deinit() to null d->arch.vintc before freeing, making the function idempotent. - Drop intc_irq_nums(), (*nr_irqs)(void) hook from intc_hw_operations, aplic_nr_irqs(), and vintc->nr_irqs field entirely. - Rename vcpu_vaplic_init() to vaplic_init() and drop vgein_assign() and imsic_set_guest_file_id() calls; those will be introduced/called later, where for sure we will know on which pCPU vCPU as it is required for proper h/w IMSIC interrupt file calculation, to have this initialization in one place. - Introduce vaplic_deinit(). --- Changes in v2: - s/vcpu/v for function arguments in struct vintc_ops(). - Update the comment above is_access() and drop const for addr argument. - Update to_vaplic() to work with 'struct domain *'. - Drop smsiaddrcfg{h} from vaplic_regs struct as they aren't used for now. - Drop inclusion of xen/schec.h from intc.c. - use result of xvzalloc() as initializer in vpalic_alloc(). - Drop goto in domain_vaplic_init(). - s/XVFREE/xvfree. - s/aplic/vintc. - Drop __init for vcpu_vaplic_init() as it could be called for secondary C= PU bring up. - Drop vaplic_alloc(). - Drop vintc_ops struct, embed callbacks iniside struct vintc. - Introduce and init vintc irqs for vAPLIC. - Introduce intc_irq_nums() to properly initialize number of vAPLIC's irqs. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 11 ++---- xen/arch/riscv/imsic.c | 4 +-- xen/arch/riscv/include/asm/aplic.h | 7 ++++ xen/arch/riscv/include/asm/intc.h | 12 +++++++ xen/arch/riscv/include/asm/vaplic.h | 34 +++++++++++++++++++ xen/arch/riscv/vaplic.c | 52 +++++++++++++++++++++++++++++ 7 files changed, 111 insertions(+), 10 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vaplic.h create mode 100644 xen/arch/riscv/vaplic.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 8e7a6370eee2..fcd73c7a2dd5 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -25,6 +25,7 @@ obj-y +=3D smpboot.o obj-y +=3D stubs.o obj-y +=3D time.o obj-y +=3D traps.o +obj-y +=3D vaplic.o obj-y +=3D vmid.o obj-y +=3D vm_event.o obj-y +=3D vsbi/ diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index c9933147595e..45712d305975 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include =20 @@ -155,14 +156,8 @@ int arch_vcpu_create(struct vcpu *v) if ( (rc =3D vcpu_vtimer_init(v)) ) goto fail; =20 - /* - * As interrupt controller (IC) is not yet implemented, - * return an error. - * - * TODO: Drop this once IC is implemented. - */ - rc =3D -EOPNOTSUPP; - goto fail; + if ( (rc =3D v->domain->arch.vintc->ops->vcpu_init(v)) ) + goto fail; =20 return rc; =20 diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index a916def07380..1e285a68fc4c 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -318,7 +318,7 @@ static int imsic_parse_node(const struct dt_device_node= *node, return 0; } =20 -int vcpu_imsic_init(struct vcpu *v) +int cf_check vcpu_imsic_init(struct vcpu *v) { struct vimsic_state *imsic_state; =20 @@ -342,7 +342,7 @@ int vcpu_imsic_init(struct vcpu *v) return 0; } =20 -void vcpu_imsic_deinit(struct vcpu *v) +void cf_check vcpu_imsic_deinit(struct vcpu *v) { XVFREE(v->arch.vimsic_state); } diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/as= m/aplic.h index b0724fe6f360..5a7fcb6ec4f1 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,8 +15,15 @@ =20 #include =20 +/* + * domaincfg read-only fields (AIA spec): + * - bits [31:24] -> read-only 0x80 + * - bit 7 -> read-only 0 + */ +#define APLIC_DOMAINCFG_RO (0x80U << 24) #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) +#define APLIC_DOMAINCFG_BE BIT(0, U) =20 #define APLIC_SOURCECFG_SM_INACTIVE 0x0 #define APLIC_SOURCECFG_SM_DETACH 0x1 diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index a4e678fad90b..875728885292 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -17,6 +17,7 @@ enum intc_variant { struct cpu_user_regs; struct irq_desc; struct kernel_info; +struct vcpu; =20 struct intc_info { enum intc_variant hw_variant; @@ -53,8 +54,19 @@ struct vintc_init_ops { int (*make_domu_dt_node)(struct kernel_info *kinfo); }; =20 +struct vintc_ops { + /* Initialize some vINTC-related stuff for a vCPU */ + int (*vcpu_init)(struct vcpu *v); + + /* Deinitialize some vINTC-related stuff for a vCPU */ + void (*vcpu_deinit)(struct vcpu *v); +}; + struct vintc { + /* Callbacks invoked during domain construction only. */ const struct vintc_init_ops *init_ops; + /* Runtime callbacks used for the lifetime of the guest. */ + const struct vintc_ops *ops; }; =20 void intc_preinit(void); diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/a= sm/vaplic.h new file mode 100644 index 000000000000..96080bfbc23b --- /dev/null +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + */ + +#ifndef ASM__RISCV__VAPLIC_H +#define ASM__RISCV__VAPLIC_H + +#include +#include + +#include + +struct domain; + +#define to_vaplic(d) container_of((d)->arch.vintc, struct vaplic, vintc) + +struct vaplic_regs { + uint32_t domaincfg; +}; + +struct vaplic { + struct vintc vintc; + struct vaplic_regs regs; +}; + +int domain_vaplic_init(struct domain *d); +void domain_vaplic_deinit(struct domain *d); + +#endif /* ASM__RISCV__VAPLIC_H */ diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c new file mode 100644 index 000000000000..c9f188b989a3 --- /dev/null +++ b/xen/arch/riscv/vaplic.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + * Copyright (c) Vates + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "aplic-priv.h" + +static const struct vintc_ops vintc_ops =3D { + .vcpu_init =3D vcpu_imsic_init, + .vcpu_deinit =3D vcpu_imsic_deinit, +}; + +int domain_vaplic_init(struct domain *d) +{ + struct vaplic *vaplic =3D xvzalloc(struct vaplic); + + if ( !vaplic ) + return -ENOMEM; + + d->arch.vintc =3D &vaplic->vintc; + d->arch.vintc->ops =3D &vintc_ops; + + vaplic->regs.domaincfg =3D APLIC_DOMAINCFG_RO; + + return 0; +} + +void domain_vaplic_deinit(struct domain *d) +{ + struct vaplic *vaplic; + + if ( !d->arch.vintc ) + return; + + vaplic =3D to_vaplic(d); + d->arch.vintc =3D NULL; + xvfree(vaplic); +} --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844021; cv=none; d=zohomail.com; s=zohoarc; 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Signed-off-by: Oleksii Kurochko --- Changes in v8: - Add call of domain_vintc_deinit() to arch_domain_destroy(). - Update printk message. - Drop Acked-by. --- Changes in v6-7: - Nothing changed. Only rebase. --- Changes in v5: - s/printk/printk_once(). - Add Acked-by: Jan Beulich . --- Changes in v4: - Drop the comment from domain_vintc_init() about guests receiving a virtual interrupt controller that mirrors the host hardware as there can (and eventually should) be alternatives. - Finish renaming intc_version to intc_variant in domain_vintc_(de)init() (enum intc_variant, info->hw_variant, local variable) started in the prev patch. --- Changes in v3: - Drop redundant printk() from domain_vintc_deinit()'s default case to avoid duplicate messages when init fails. - Add a comment to domain_vintc_init() clarifying that guests currently receive a virtual interrupt controller that mirrors the host hardware. --- Changes in v2: - Drop __init for domain_vintc_(de)init(). - Update the commit message. --- --- xen/arch/riscv/domain.c | 7 ++++++- xen/arch/riscv/include/asm/intc.h | 3 +++ xen/arch/riscv/intc.c | 35 +++++++++++++++++++++++++++++++ 3 files changed, 44 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 45712d305975..d94652809e36 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -291,7 +291,9 @@ int arch_sanitise_domain_config(struct xen_domctl_creat= edomain *config) =20 void arch_domain_destroy(struct domain *d) { - printk(XENLOG_WARNING "%s: unimplemented\n", __func__); + printk(XENLOG_WARNING "%s: not fully implemented\n", __func__); + + domain_vintc_deinit(d); } =20 int arch_domain_create(struct domain *d, @@ -308,6 +310,9 @@ int arch_domain_create(struct domain *d, if ( (rc =3D p2m_init(d, config)) !=3D 0) goto fail; =20 + if ( (rc =3D domain_vintc_init(d)) ) + goto fail; + return rc; =20 fail: diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 875728885292..6fc0e620e937 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -79,4 +79,7 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigne= d int priority); =20 void intc_handle_external_irqs(struct cpu_user_regs *regs); =20 +int domain_vintc_init(struct domain *d); +void domain_vintc_deinit(struct domain *d); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 2864a896b677..f5c8af6ddea4 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -11,6 +11,7 @@ =20 #include #include +#include =20 static const struct intc_hw_operations *__ro_after_init intc_hw_ops; =20 @@ -83,3 +84,37 @@ int __init make_intc_domU_node(struct kernel_info *kinfo) =20 return vintc->init_ops->make_domu_dt_node(kinfo); } + +int domain_vintc_init(struct domain *d) +{ + int ret =3D -EOPNOTSUPP; + const enum intc_variant variant =3D intc_hw_ops->info->hw_variant; + + switch ( variant ) + { + case INTC_APLIC: + ret =3D domain_vaplic_init(d); + break; + + default: + printk_once("vintc (variant:%d) isn't implemented\n", variant); + break; + } + + return ret; +} + +void domain_vintc_deinit(struct domain *d) +{ + const enum intc_variant variant =3D intc_hw_ops->info->hw_variant; + + switch ( variant ) + { + case INTC_APLIC: + domain_vaplic_deinit(d); + break; + + default: + break; + } +} --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:44 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843985; x=1788448785; darn=lists.xenproject.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=9qwEd9f+ju7hZ/8uC6ij6YLmcv1QVKWDiXLVpDUqbt0=; b=MZJOISWzi1LAq+vX8ht4aOs1JAacPN8R2d+ocD/onaF3aOrHAYaHG30ZYuD5plX8YF TOFBI5Fl2Yow2ZDO3QxrJregtm2N8UFsIl2N3CBUyFAZr4bjtMd8M+5gpURKjFoxswyQ ci6hVbmh+KIMNrvc2ivosW6ZpVxf1W3y1tyTedu7yBkovyb+YnsJTdihKlq1awn2mNBL M3z41lDdNBc8LvGhju7lKuzr52wVNqDY2qfMGnHyVXY+339ZQc9r1kRIy/Mymvm65wTH cM9ebLvmPYXglNycxeU0NSdSKxyL+U2NoucfqFfGMbq91dsIiBAUbjECcdHkDur6RjCa tWTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843985; x=1788448785; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=9qwEd9f+ju7hZ/8uC6ij6YLmcv1QVKWDiXLVpDUqbt0=; b=LNNvSmWU8l0sze6/NZF0gNlxohUZ6jMPKTlk9lDxhWPPuTLxB9Ux/1Xw+Ch8fUoC6W axdugWjKOQdkq7oZf7DGVYsCZfpOYZlZ7QyKBGNKfYRDoPECTVZGySQB0otsngvPfNbJ gAdsRr/vfjrkqCBKLme0KefUFY1W2lZGMRJSml1JlKl8ji72JqyWa9Ee8qyoH7le2CD1 WUhzXVK6lfvuwRBGk/mfAvMJGwPqcEuNJdbNFsoNm/tom2FOo72No8AH3V791GQDSXEJ sQxWBqHTAR1ifFCzmWyIZ/Tyqg5l0yh5imhPvRtBOIgLK4ZF8ZBRh6keJstk01iCXTym Vwfw== X-Gm-Message-State: AFuF++kMMljTeQ2Hnpmulr9+qkQCCOxY2GBzzFI0xMajh+qANqNQDhT/ 6t/ug+jox3mjqLuZO+9/99Qqafk3PKo2ISfc1pRxuTjjcGYwuuWAcCRKb6KOAg== X-Gm-Gg: AR+sD12Qr7QAT2z0rOOslSKCWrtAzMUnK+4Eb2F2mLgHi2B17uQOljDQwCiMHuw2aFm yjPab90NU0peOA1sKfbx2k8jfSyo2KNNv23qTFrCd+0KCEKCZ2udokMsPlvlI9c78gH8gHUSmqA AY2grYmEc2Q225yn6ZxcMb9V7q0/91QjIho06xpn8eal/4Py94ZL7spodRjo5TZ+U/OSN3vE4WU /IGex04tZfgJxzleOn0iXqB3Z+NH/L/VVuROTbhUPVNCIowuaQdQf7Vm1jJClWfC5xJPeul+Nwt iO67R4Sq9aRTnRHIOo8RXIf9dI+X8g6M9XnDTNnOQCPlsrNJ4U7MjhFqzlS0pFW0CthxyA6komw V0Ws3KDeUKXlg8d2RscnofiaBadmnqRDeK+nsLkmzepc2KavtWYhRKzidHRLlkCZZOroTZ5AXee /sssu3iRNZSxtnIGnnd23zfZ8hNZja5gDoqs0mWHPoy9piIVQIgeCOzJtYJtl/glXTZNtoYqnJm 0xue1vD33/99e9n5oVTDk5lryHkoC2b X-Received: by 2002:a05:600c:1382:b0:493:f140:c3fb with SMTP id 5b1f17b1804b1-499dc70b76dmr175117265e9.7.1787843984684; Thu, 27 Aug 2026 08:19:44 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 14/20] xen/riscv: generate IMSIC DT node for guest domains Date: Thu, 27 Aug 2026 17:19:07 +0200 Message-ID: <6ab7ba5a0e47bba5f77c919ace4834a775f5a3b0.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1787843985-F687577B-888D0FA5/10/73395122804 X-purgate-type: spam X-purgate-size: 10787 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844009481158500 Guests using the IMSIC interrupt controller require a corresponding Device Tree description. Add support for generating an IMSIC node when building the guest DT. This allows guests to discover and use the IMSIC interrupt controller. The value choosen for GUEST_IMSIC_S_BASE is an address which is typically used for IMSIC and QEMU. DT-building functions are marked __init because domain creation happens at boot time, before the init sections are freed. In a typical deployment libxl creates the interrupt controller node in userspace and hands the complete FDT to Xen, so these functions are only called during early domain construction. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v8: - Nothing changed. Only rebase. --- Changes in v7: - Add Acked-by: Jan Beulich . --- Changes in v6: - Simplify initialization of guest_num_msis. - s/sizeof(vimsic_name)/ARRAY_SIZE(...). - Add empty line between declaration(s) and statement(s) in make_domu_dt_n= ode(). - define GUEST_IMSIC_MAX_MSIS as 255U to avoid '+0U' when min(...) is used. --- Changes in v5: - s/GUEST_IMSIC_NUM_MSIS/GUEST_IMSIC_MAX_MSIS throughout. - Changed __read_mostly =E2=86=92 __ro_after_init on guest_num_msis, since= the value is set once during __init and never again. - Made imsic_parse_node() __init. - Moved the min(GUEST_IMSIC_MAX_MSIS, ...) cap into imsic_parse_node() rig= ht after guest_num_msis is assigned, so the bound is applied once at init time rather than on every DT node construction call. - Removed the now-unnecessary num_msis local variable from vimsic_make_domu_dt_node(); guest_num_msis is used directly. - s/snprintf(buf, sizeof(buf), ...)/snprintf(buf, ARRAY_SIZE(buf), ...) in guest_imsic_set_interrupt_extended_prop(). - Added decl. of vimsic_make_domu_dt_node() in this patch instead of next. --- Changes in v4: - Add a comment for guest_num_msis explaining that it is host-dependent and therefore identical for every domain, which is why a single global is used instead of a per-domain value. - Reduce vimsic_name[] from 128 to 32 bytes, which is enough to hold "/soc/imsic@" plus a 64-bit hex address. - Add a comment before GUEST_IMSIC_S_BASE noting that the value is the address typically used for IMSIC by QEMU. - s/__ULL/_UL for defintion of GUEST_IMSIC_S_BASE. --- Changes in v3: - s/__ro_after_init/__read_mostly for guest_num_msis. - Use IMSIC_MAX_ID as default for guest_num_msis instead of imsic_cfg.nr_i= ds. - Drop base_addr local variable in guest_imsic_make_reg_property(); use GUEST_IMSIC_S_BASE directly and introduce size to avoid spelling IMSIC_MMIO_PAGE_SZ * d->max_vcpus twice. - Change irq_ext type from uint32_t * to __be32 * in guest_imsic_set_interrupt_extended_prop(). - Move phandle declaration into the loop body. - Extend commit message to explain why __init is used for DT-building functions: libxl creates the interrupt controller node before handing the FDT to Xen, so these functions are only invoked during boot-time domain construction. - Re-order patch before APLIC DT node creation patch. - Update commit message. --- Changes in v2: - s/imsic_make_reg_property/guest_imsic_make_reg_property. - s/imsic_set_interrupt_extended_prop/guest_imsic_set_interrupt_extended_p= rop. - Use initalizer for regs[] array in imsic_make_reg_property(). - Move buf[] insde the for() loop. - Correct check of returned phandle. - Drop local variable len. - /s/XVFREE/xvfree in imsic_set_interrupt_extended_prop(). - Drop initializer for local variable data. - s/uint32_t/unsinged int for pos and cpu in imsic_set_interrupt_extended_= prop(). - Drop next_phandle as it is now in common code. - Introduce vcpu_imsic_deinit. - Refactor vimsic_make_domu_dt_node() to avoid usage of host IMSIC dt node. --- --- xen/arch/riscv/imsic.c | 143 +++++++++++++++++++++- xen/arch/riscv/include/asm/guest-layout.h | 6 + xen/arch/riscv/include/asm/imsic.h | 3 + 3 files changed, 151 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index 1e285a68fc4c..ad0a220edac2 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -13,8 +13,12 @@ #include #include #include +#include #include +#include +#include #include +#include #include #include #include @@ -34,6 +38,21 @@ static struct imsic_config imsic_cfg =3D { .lock =3D SPIN_LOCK_UNLOCKED, }; =20 +/* + * Number of MSIs available to a guest. Determined by the host interrupt + * controller, so it is identical for every domain -- hence a single global + * rather than a per-domain value. + */ +static unsigned int __ro_after_init guest_num_msis; + +#define GUEST_IMSIC_COMPATIBLE "riscv,imsics" + +/* + * Value is inspired by what QEMU is using for riscv,num-ids property for = IMSIC + * node. + */ +#define GUEST_IMSIC_MAX_MSIS 255U + #define IMSIC_DISABLE_EIDELIVERY 0 #define IMSIC_ENABLE_EIDELIVERY 1 #define IMSIC_DISABLE_EITHRESHOLD 1 @@ -182,7 +201,7 @@ static int __init imsic_get_parent_hartid(const struct = dt_device_node *node, * or IRQ_M_EXT if the IMSIC node corresponds to a machine-mode IMSIC, * which should be ignored by the hypervisor. */ -static int imsic_parse_node(const struct dt_device_node *node, +static int __init imsic_parse_node(const struct dt_device_node *node, unsigned int *nr_parent_irqs, unsigned int *nr_mmios) { @@ -285,6 +304,11 @@ static int imsic_parse_node(const struct dt_device_nod= e *node, return -ENOENT; } =20 + if ( dt_property_read_u32(node, "riscv,num-guest-ids", &tmp) ) + guest_num_msis =3D min(GUEST_IMSIC_MAX_MSIS, tmp); + else + guest_num_msis =3D GUEST_IMSIC_MAX_MSIS; + if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) || (imsic_cfg.nr_ids > IMSIC_MAX_ID) ) { @@ -522,3 +546,120 @@ int __init imsic_init(const struct dt_device_node *no= de) =20 return rc; } + +static int __init guest_imsic_make_reg_property(struct domain *d, void *fd= t) +{ + paddr_t size =3D IMSIC_MMIO_PAGE_SZ * d->max_vcpus; + __be32 regs[4] =3D { + cpu_to_be32(GUEST_IMSIC_S_BASE >> 32), + cpu_to_be32(GUEST_IMSIC_S_BASE), + cpu_to_be32(size >> 32), + cpu_to_be32(size), + }; + + return fdt_property(fdt, "reg", regs, sizeof(regs)); +} + +static int __init guest_imsic_set_interrupt_extended_prop(struct domain *d, + void *fdt) +{ + unsigned int cpu, pos =3D 0; + __be32 *irq_ext; + int res; + + irq_ext =3D xvzalloc_array(__be32, d->max_vcpus * 2); + if ( !irq_ext ) + return -ENOMEM; + + for ( cpu =3D 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + uint32_t phandle; + + snprintf(buf, ARRAY_SIZE(buf), "/cpus/cpu@%u/interrupt-controller"= , cpu); + phandle =3D fdt_get_phandle(fdt, fdt_path_offset(fdt, buf)); + + if ( !phandle ) + { + res =3D -ENODEV; + goto out; + } + + irq_ext[pos++] =3D cpu_to_be32(phandle); + irq_ext[pos++] =3D cpu_to_be32(IRQ_S_EXT); + } + + res =3D fdt_property(fdt, "interrupts-extended", irq_ext, + d->max_vcpus * 2 * sizeof(*irq_ext)); + + out: + xvfree(irq_ext); + + return res; +} + +int __init vimsic_make_domu_dt_node(struct kernel_info *kinfo, + unsigned int *phandle) +{ + int res; + void *fdt =3D kinfo->fdt; + char vimsic_name[32]; + unsigned int vimsic_phandle; + + res =3D snprintf(vimsic_name, ARRAY_SIZE(vimsic_name), "/soc/imsic@%lx= ", + GUEST_IMSIC_S_BASE); + if ( res >=3D ARRAY_SIZE(vimsic_name) ) + { + dprintk(XENLOG_DEBUG, "vimsic name is truncated\n"); + return -ENOBUFS; + } + + res =3D fdt_begin_node(fdt, vimsic_name); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", GUEST_IMSIC_COMPATIBLE); + if ( res ) + return res; + + res =3D guest_imsic_make_reg_property(kinfo->bd.d, fdt); + if ( res ) + return res; + + res =3D guest_imsic_set_interrupt_extended_prop(kinfo->bd.d, fdt); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "riscv,num-ids", guest_num_msis); + if ( res ) + return res; + + res =3D fdt_property(fdt, "msi-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "#msi-cells", 0); + if ( res ) + return res; + + res =3D fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "#interrupt-cells", 0); + if ( res ) + return res; + + vimsic_phandle =3D alloc_phandle(kinfo); + if ( !vimsic_phandle ) + return -EOVERFLOW; + + res =3D fdt_property_cell(fdt, "phandle", vimsic_phandle); + if ( res ) + return res; + + if ( phandle ) + *phandle =3D vimsic_phandle; + + return fdt_end_node(fdt); +} diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/inc= lude/asm/guest-layout.h index 68d95a09394c..5e566450bdfa 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -3,6 +3,12 @@ =20 #include =20 +/* + * Base address of the guest's supervisor-mode IMSIC. The value is the add= ress + * typically used for IMSIC by QEMU. + */ +#define GUEST_IMSIC_S_BASE _UL(0x28000000) + #define GUEST_RAM_BANKS 2 =20 /* diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/as= m/imsic.h index 5ee954bbf3ef..2425430ed116 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -78,6 +78,7 @@ struct vimsic_state { }; =20 struct dt_device_node; +struct kernel_info; struct vcpu; =20 int imsic_init(const struct dt_device_node *node); @@ -93,4 +94,6 @@ int vcpu_imsic_init(struct vcpu *v); void vcpu_imsic_deinit(struct vcpu *v); unsigned int vcpu_guest_file_id(const struct vcpu *v); =20 +int vimsic_make_domu_dt_node(struct kernel_info *kinfo, unsigned int *phan= dle); + #endif /* ASM_RISCV_IMSIC_H */ --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844012; cv=none; d=zohomail.com; s=zohoarc; b=LNejc4urK/DFps/JuvBoq11umgUhnkSTqmpuX2Aitdj6lpX7Ql0c5uLCrjG6wnDVqe48uAB0yySDxCtw8ixJHxBvFRxlx3GSeNRIKHndPZ/Nz8BDRpncp23cXsaOto5RVkGM4IqdQJXsn9orQ86HKOMRNIXdIbjEjUr6yzSEZQM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787844012; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=wn2L+RUC5jn8gwgXM/vtHAfcrUXMAm9q6Hgp6yBPabs=; b=mTWARZYrO7dk6Ko2ZlD/gpzExwlfZYKb1vJs106tLFJs63dQUYV7GpVBS0yASYIEtHnQjMA3aqYlCBvQjxNJpOux1C3ajivxirtw49zVw3+5HDY1e35DRQEZRDpraftPhAKUu3KCLob0XmtZ8KwjF6Dn1g1IeHKDF7rfPufnUlM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1787844012309148.29642044849527; Thu, 27 Aug 2026 08:20:12 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1400830.1636482 (Exim 4.92) (envelope-from ) id 1wzbtN-0006jQ-HG; Thu, 27 Aug 2026 15:19:49 +0000 Received: by outflank-mailman (output) from mailman id 1400830.1636482; Thu, 27 Aug 2026 15:19:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wzbtN-0006iF-7L; Thu, 27 Aug 2026 15:19:49 +0000 Received: by outflank-mailman (input) for mailman id 1400830; Thu, 27 Aug 2026 15:19:47 +0000 Received: from mx.expurgate.net ([195.190.135.20]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wzbtL-0006I3-EN for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 15:19:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wzbtK-00BpK6-RL for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 17:19:46 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a90557e-8faa-0a2a0a5109dd-0a2a4503bb3a-36 for ; Thu, 27 Aug 2026 17:19:46 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a905592-fae8-0a2a45030019-d155dd2dbc60-3 for ; Thu, 27 Aug 2026 17:19:46 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-47f96c5b722so506199f8f.0 for ; Thu, 27 Aug 2026 08:19:46 -0700 (PDT) Received: from fedora (user-109-243-144-234.play-internet.pl. [109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:45 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843986; x=1788448786; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=wn2L+RUC5jn8gwgXM/vtHAfcrUXMAm9q6Hgp6yBPabs=; b=Il2ESVAoHegQQMqFqNGDY5nf6sQx9PMgyY0IfWhcqEoNhBzhCp/0IcKbGj9TWCR+WA XexjLk2iX0ZT/m58lvHw2V1aOw2ZE2Nrv9no9B+SXzh/4fiZ10HHmZ7wSfn0cCeDXPIC JyuQXweHJ0lXWYpqvy0f7PcQtS60dxbLoXIePa6FClM1rodsWJkdqW/WxnpBJy1KnIvr nG6pvJ4VlomQDgJmbHSoyOFA/Epf0hWtI8381QoM2BDzzIUhg+2nzcKkS0NYfZxIn5AW LTuJ/iPnHme7zf+cIiAgI4iDRYyTvC2VA+Aqi99YJAtVuiBGRwt6jKshY5yh81viSmlp hWOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843986; x=1788448786; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=wn2L+RUC5jn8gwgXM/vtHAfcrUXMAm9q6Hgp6yBPabs=; b=GcDEJWo/yOTnTQCHOw///VOhxNcrh0dbxqRAxxQYtcRqGlloBltqdKWhNgsHTkAUK+ p0bjrYnfdipJESu0tKs7llIUTCsATjmNTA+4qCLt/aLvGdCaw25TCn0tZY84qNIpCxN2 E6oKYXfbuMjvwTx+PRp9eUX1AogkUBHjtLEpWt6nO5zw7cuTCraibQB8wrhrVEdkSAb6 Q7+QATKRP4qjG+Sio8+ujeAGsWzdjaL3J98Euu3Gn4wRMTKafPACcrXSD5mbUnVioeyQ a3wz2j5UNS6ELXWlV6xJC9Qefy1pGNYzI6AHMr5yau9j3A7jYl+YOmR0RdIQQQ3J/0B3 kRyA== X-Gm-Message-State: AFuF++nbyKSTVgxMhUvuDjuvC8T7NMlfKNYEjvhgCUjLhhASoyl3ZJna PhV2idXtwuLCHHdhj6ubt+hMhQ4RY/cxA5Be9M3xannyn1y747NkIwsCkchXBA== X-Gm-Gg: AR+sD103NAhNOVCKjQRET95eBCeW7c+wD4eT+1SvBuQizUGSJJlcxRxmlPRAsE4cxmf jYBA2M450rpajdlvz9PX+/Ol1d63XSfAnKWiCSIcvuSD5auIP6MCR07BVwMMxGqnIYbZEiOaZkp UZbi52S+A53u8BgemEemNxL0RmLkRBt3YJ1dTEMLmkeaMFJwoE2BrKQKp2TILjOch3senckr8W1 LX6r/MfRHMOMHMwU9CJDVcagZnsN2nyJ+Cesjutulww1M2ZY3vKgYuuh7yojXRejHFBcFSz3xhn 9hjt9X6eKMXPQSY+AUSTNbdyH4SG+VKeCRyeL7UzcHhuGTYn7BbbbMu18K/MlwOZCvZgRejz3Dq GahT3ESp+9ACkT35ij4Q/ETUvPi7Ios/phO9WjqXBFc7qU9BJrrAuJWoIMBj0XcvD3oCUQ8oOr5 ekgndn1lG8tu5Enb/gsug+7o4HBjqx3+itpm78wPmTAbiso3KyoMxs7DX0PznfF5klsvAQHy//M e7aG42n5KTgemsnLGVEXd/f38RVuHeA X-Received: by 2002:a5d:5f84:0:b0:482:f2f0:ca3d with SMTP id ffacd0b85a97d-482f2f0cb3bmr8879609f8f.14.1787843986154; Thu, 27 Aug 2026 08:19:46 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 15/20] xen/riscv: create APLIC DT node for guest domains Date: Thu, 27 Aug 2026 17:19:08 +0200 Message-ID: <52158e389059bc11e4f5c88ad3f075ebba98526d.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1787843986-772F54E9-56592673/10/73395122804 X-purgate-type: spam X-purgate-size: 8883 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844013681158500 Content-Type: text/plain; charset="utf-8" Guests require a Device Tree description of the interrupt controller topology. Add support for creating an APLIC node when building the guest DT. Provide stub for imsic_make_dt_node() it will be introduced properly in follow-up patch. The value chosen for GUEST_APLIC_S_BASE is based on QEMU one. DT-building functions are marked __init because domain creation happens at boot time, before the init sections are freed. In a typical deployment libxl creates the interrupt controller node in userspace and hands the complete FDT to Xen, so these functions are only called during early domain construction. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- changes in v8: - Nothing changed. Only rebase. --- Changes in v7: - Update the comment for guest_aplic_num_sources: drop "wired" to be less confusing, and mention that it is identical for every domain only for now. - Use ARRAY_SIZE() instead of sizeof() for the size argument of snprintf() in vaplic_make_domu_dt_node(). - Add Acked-by: Jan Beulich --- Changes in v6: - Redefine GUEST_APLIC_MAX_SOURCES as 96U to avoid '+OU' in min(...). - s/guest_num_sources/guest_aplic_num_sources. --- Changes in v5: - Drop pointless initializer for local variable res in vaplic_make_domu_dt_node(). - Limit guest_num_sources in the similar way to IMSIC. - Rename VAPLIC_NUM_SOURCES to GUEST_APLIC_MAX_SOURCES to be aligned with the similar place in vIMSIC related code. --- Changes in v4: - Drop spurious and includes from aplic.c (mistakenly added, they belong to vaplic.c). - Reduce vaplic_name[] from 128 to 32 bytes in vaplic_make_domu_dt_node(). - Use __initconstrel (with const) for init_ops instead of __initdata. - s/__ULL/_UL for defintion of GUEST_APLIC_S_BASE. --- Changes in v3: - Fix rebase conflicts becuase of this patch is reordered after IMSIC DT node creation is intoduced. - Update the commit message. - Move initialization of domaincfg with APLIC_DOMAINCFG_RO80 from this patch to earlier. - Change paddr_t aplic_size to unsigned int in vaplic_make_domu_dt_node() and replace the UB (after it started to be uint) aplic_size >> 32 with an explicit 0 in the DT reg property. - Add BUILD_BUG_ON() to be sure that aplic size isn't bigger then UINT32_MAX. --- Changes in v2: - Avoid as max as possible of host properties inheritance. Only number of APLIC's irqs are checked what leads to an introduction of get_aplic_irqs_num(). - Move this patch earlier what leads to an introduction of vimsic_make_domu_dt_node() stub. - s/vimsic_make_domu_dt_node/imsic_make_domu_dt_node. - Refactor vimsic_make_domu_dt_node() to avoid re-usage of APLIC host properties. - Drop next_phandle as it is now in common code. - Drop const for kinfo argument of vimsic_make_domu_dt_node() is is going to be updated inside vimsic_make_domu_dt_node(). - Use introduced before vintc->num_irqs. --- --- xen/arch/riscv/aplic-priv.h | 13 ++++ xen/arch/riscv/aplic.c | 2 + xen/arch/riscv/include/asm/aplic.h | 8 +++ xen/arch/riscv/include/asm/guest-layout.h | 6 ++ xen/arch/riscv/vaplic.c | 77 +++++++++++++++++++++++ 5 files changed, 106 insertions(+) diff --git a/xen/arch/riscv/aplic-priv.h b/xen/arch/riscv/aplic-priv.h index 85e0d028d1ae..35100d3a64fe 100644 --- a/xen/arch/riscv/aplic-priv.h +++ b/xen/arch/riscv/aplic-priv.h @@ -34,4 +34,17 @@ struct aplic_priv { const struct imsic_config *imsic_cfg; }; =20 +/* + * Value is inspired by what QEMU is using for riscv,num-sources property = for + * APLIC node. + */ +#define GUEST_APLIC_MAX_SOURCES 96U + +/* + * Specifies the number of interrupt sources supported by guest APLIC doma= in. + * Could be limited by host interrupt controller and is identical for every + * domain for now. + */ +extern unsigned int guest_aplic_num_sources; + #endif /* ASM_RISCV_APLIC_PRIV_H */ diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index d08401db46b3..c2d7183e1852 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -92,6 +92,8 @@ static int __init cf_check aplic_init(void) panic("%s: failed to get number of interrupt sources\n", node->full_name); =20 + guest_aplic_num_sources =3D min(GUEST_APLIC_MAX_SOURCES, aplic_info.nu= m_irqs); + if ( aplic_info.num_irqs > ARRAY_SIZE(aplic.regs->sourcecfg) ) aplic_info.num_irqs =3D ARRAY_SIZE(aplic.regs->sourcecfg); =20 diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/as= m/aplic.h index 5a7fcb6ec4f1..07318aaac25d 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -34,6 +34,14 @@ =20 #define APLIC_TARGET_HART_IDX_SHIFT 18 =20 +#define APLIC_IDC_SIZE 32 + +#define APLIC_MIN_SIZE 0x4000 +#define APLIC_SIZE_ALIGN(x) ROUNDUP(x, APLIC_MIN_SIZE) + +#define APLIC_SIZE(nr_cpus) (APLIC_MIN_SIZE + \ + APLIC_SIZE_ALIGN(APLIC_IDC_SIZE * (nr_cpu= s))) + struct aplic_regs { uint32_t domaincfg; /* 0x0000 */ uint32_t sourcecfg[1023]; /* 0x0004 */ diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/inc= lude/asm/guest-layout.h index 5e566450bdfa..90603f06bb91 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -3,6 +3,12 @@ =20 #include =20 +/* + * Base address of the guest's supervisor-mode APLIC. The value is the add= ress + * typically used for APLIC by QEMU. + */ +#define GUEST_APLIC_S_BASE _UL(0xd000000) + /* * Base address of the guest's supervisor-mode IMSIC. The value is the add= ress * typically used for IMSIC by QEMU. diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index c9f188b989a3..a529a5b1dc49 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -9,6 +9,8 @@ */ =20 #include +#include +#include #include #include =20 @@ -19,6 +21,80 @@ =20 #include "aplic-priv.h" =20 +unsigned int __ro_after_init guest_aplic_num_sources; + +#define VAPLIC_COMPATIBLE "riscv,aplic" + +#define FDT_VAPLIC_INT_CELLS 2 + +static int __init cf_check vaplic_make_domu_dt_node(struct kernel_info *ki= nfo) +{ + struct domain *d =3D kinfo->bd.d; + int res; + void *fdt =3D kinfo->fdt; + unsigned int msi_parent_phandle; + char vaplic_name[32]; + unsigned int aplic_size =3D APLIC_SIZE(d->max_vcpus); + const __be32 reg[] =3D { + cpu_to_be32(GUEST_APLIC_S_BASE >> 32), + cpu_to_be32(GUEST_APLIC_S_BASE), + cpu_to_be32(0), + cpu_to_be32(aplic_size), + }; + + BUILD_BUG_ON(APLIC_SIZE(MAX_VIRT_CPUS) > UINT_MAX); + + res =3D snprintf(vaplic_name, ARRAY_SIZE(vaplic_name), "/soc/aplic@%lx= ", + GUEST_APLIC_S_BASE); + if ( res >=3D sizeof(vaplic_name) ) + { + dprintk(XENLOG_DEBUG, "vaplic name is truncated\n"); + return -ENOBUFS; + } + + res =3D vimsic_make_domu_dt_node(kinfo, &msi_parent_phandle); + if ( res ) + return res; + + res =3D fdt_begin_node(fdt, vaplic_name); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#interrupt-cells", FDT_VAPLIC_INT_CELL= S); + if ( res ) + return res; + + res =3D fdt_property(fdt, "reg", reg, sizeof(reg)); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "riscv,num-sources", guest_aplic_num_so= urces); + if ( res ) + return res; + + res =3D fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", VAPLIC_COMPATIBLE); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "msi-parent", msi_parent_phandle); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "phandle", kinfo->phandle_intc); + if ( res ) + return res; + + return fdt_end_node(fdt); +} + +static const struct vintc_init_ops __initconstrel init_ops =3D { + .make_domu_dt_node =3D vaplic_make_domu_dt_node, +}; + static const struct vintc_ops vintc_ops =3D { .vcpu_init =3D vcpu_imsic_init, .vcpu_deinit =3D vcpu_imsic_deinit, @@ -33,6 +109,7 @@ int domain_vaplic_init(struct domain *d) =20 d->arch.vintc =3D &vaplic->vintc; d->arch.vintc->ops =3D &vintc_ops; + d->arch.vintc->init_ops =3D &init_ops; =20 vaplic->regs.domaincfg =3D APLIC_DOMAINCFG_RO; =20 --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844014; cv=none; d=zohomail.com; s=zohoarc; b=euAVIY1RVpY+uaT6b6nD2pBfNMaRUyWd98SX2hbUBhUpaM6cJMYctVf4zVH7+oa8CJ9UjerdeM1moQ9JUVVMZeEP4TySlzpCleOsHwlFfwfLECXHdXYxmvBVdTtbRQs5cPUL7GE/CzuRZ1hT6fNBXhrcZ6eWyIAS1Pl/LGcrtdA= ARC-Message-Signature: i=1; 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Smith" Subject: [PATCH v8 16/20] xen/riscv: implement IRQ routing for device passthrough Date: Thu, 27 Aug 2026 17:19:09 +0200 Message-ID: X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1787843988-028DDA5B-5AC857AA/10/73395122804 X-purgate-type: spam X-purgate-size: 28211 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844015512158500 Content-Type: text/plain; charset="utf-8" dom0less device passthrough requires granting guest domains access to device interrupts. Introduce map_device_irqs_to_domain() to enumerate a DT node's interrupt properties, skipping those not owned by the primary interrupt controller (as at the moment I haven't seen usages of it), and map_irq_to_domain() to grant domain access and configure Xen's interrupt descriptor accordingly. Sharing IRQ between domains is rejected. Both map_irq_to_domain() and map_device_irqs_to_domain() are marked __overlay_init, mirroring Arm: without CONFIG_OVERLAY_DTB this expands to __init, so the functions are init-only and need no XSM check; with CONFIG_OVERLAY_DTB they become runtime-callable, but the only runtime entry point is dt_overlay_domctl(), which performs the XSM checks at the domctl layer. RISC-V does not wire up DT overlay yet, so today these are strictly __init; if/when overlay support is added, the domctl-level XSM gating must be added together with it, as on Arm. route_irq_to_guest() and release_irq() manage irq_desc ownership for guest-assigned interrupts. Each assignment carries a small irq_guest structure as irqaction::dev_id, recording the owning domain and virtual IRQ number which is 1:1 mapped to physical IRQ number. A per-domain vIRQ allocation bitmap (used_irqs in struct vintc), managed by vintc_reserve_virq(), prevents the same vIRQ being claimed twice. Host and guest interrupts may differ in some operations (EOI timing in particular, possibly others): a host IRQ is completed once Xen's handler runs, whereas a passthrough IRQ must defer the physical completion until the guest issues its own EOI, otherwise a still-asserted level line would immediately retrigger and storm. This affects only the .end callback; the rest of hw_interrupt_type is shared, hence the separate host and guest hw_interrupt_type instances. With APLIC+IMSIC, guest interrupts are delivered directly by hardware through the IMSIC, bypassing do_IRQ(). The _IRQ_GUEST branch in do_IRQ() is therefore left as BUG() until a platform without direct IMSIC delivery is encountered. Signed-off-by: Oleksii Kurochko --- Changes in v8: - vintc_reserve_virq(): return an error code instead of a bool: 0 on success, -EEXIST when the vIRQ has already been reserved (which legitimately happens for an IRQ shared between devices) and -ERANGE when the vIRQ is outside the range the vINTC provides. Document the function and its return values. - vintc_reserve_virq(): mark it __overlay_init, as its only caller map_irq_to_domain() is __overlay_init too. Add the and includes this needs. - map_irq_to_domain(): check the return value of vintc_reserve_virq() and propagate anything but -EEXIST. Otherwise the IRQ would end up routed to the domain without domain_vintc_deinit() ever releasing it again. Update the stale comment accordingly. - domain_vintc_deinit(): only walk used_irqs and free it if it has actually been allocated. domain_vintc_init() can fail after the vINTC itself has been allocated, leaving used_irqs NULL. - irq.c: split the body of release_irq() into two helpers: irq_detach_action(), which removes the action matching dev_id from desc->action with desc->lock held, and irq_release_action(), which waits for a handler still running on another CPU and frees the action with desc->lock dropped. Both document the locking rules they rely on. release_irq() is now just a wrapper around the two. - release_guest_irq(): use irq_detach_action()/irq_release_action() instead of open-coding __clear_bit(_IRQ_GUEST, ...) followed by release_irq(), which looked the action up by dev_id a second time. - release_guest_irq(): drop the -EBUSY restriction that only allowed unrouting from a dying domain. Detaching the action under desc->lock now closes the window this was working around. - route_irq_to_guest(): on the intc_route_irq_to_guest() failure path, detach the action while desc->lock is still held and only release it after the lock has been dropped, instead of dropping the lock first and calling release_irq(). - route_irq_to_guest(): initialise desc at its declaration. - irq_get_guest_info(): use ASSERT(desc->action) instead of ASSERT(desc->action !=3D NULL). --- Changes in v7: - Build device.c as device.init.o: everything it provides is __overlay_init, which is plain __init as long as CONFIG_OVERLAY_DTB stays Arm-only. Unlike Arm, which picks device.o/device.init.o based on that config, RISC-V cannot enable it, so the choice is unconditional for now. - Don't have release_irq() free the guest IRQ info anymore: set free_on_release =3D false and free 'info' explicitly in release_guest_irq(), i.e. reinstate the xvfree() dropped in v5. The action stays embedded in struct irq_guest, so a single allocation still covers both, but it no longer has to be the structure's first member: the offsetof() BUILD_BUG_ON and the xvfree() of a pointer that merely happened to coincide with the allocation base are gone. The ->dev_id concern from v5 doesn't apply: release_irq() clears desc->action under desc->lock and waits for in-flight handling before returning, so nothing can observe ->dev_id once 'info' is freed. - Move 'action' to the end of struct irq_guest and reword its comment accordingly. - Use xvzalloc() instead of xvmalloc() for struct irq_guest, so that the embedded action is fully initialized (action.handler was left uninitialized before). - route_irq_to_guest(): free 'info' via the common free_info label when intc_route_irq_to_guest() fails, now that release_irq() no longer frees it. - Drop a stray blank line ahead of release_irq(). --- Changes in v6: - size nr_virqs as guest_aplic_num_sources + 1 to reserve APLIC's 1-indexed source 0, so the highest source/irq could be reserved. --- Changes in v5: - add early -EINVAL return in route_irq_to_guest() if domain is dying - use __clear_bit() instead of clear_bit() in release_guest_irq() since desc->lock is already held - remove irq_get_domain() wrapper; inline irq_get_guest_info(desc)->d at its single call site - reword IRQ_GUEST comment in do_IRQ() for clarity - move XVFREE(used_irqs) before the switch so it is freed prior to variant-specific vintc teardown - fix missing space in dt_dprintk() format string split across lines - Drop 'inline' for irq_get_guest_info() and leave it only static. - Drop xfree(info) from release_guest_irq() to avoid a potential dangling-pointer issue with the ->dev_id field. Now that 'struct irqaction action;' is embedded into 'struct irq_guest', 'info' will be freed as part of release_irq() at the end. --- Changes in v4: - Update the commit message. - Mark map_irq_to_domain() and map_device_irqs_to_domain() as __overlay_init (mirroring Arm) and include . - Fix grammar in the controller-skip comment ("IRQ" -> "IRQs"). - Drop the redundant 'base' local in guest_imsic_make_reg_property(); use GUEST_IMSIC_S_BASE directly. - Rename vintc::irq_nums -> nr_virqs and update all users. - Guard domain_vintc_deinit() against a NULL d->arch.vintc. - Use smp_rmb() instead of smp_mb() in release_irq()'s wait loop and document how it pairs with the spin_unlock() in do_IRQ(). - In release_guest_irq(), reject live unrouting from a non-dying domain (-EBUSY) and clear _IRQ_GUEST under desc->lock so a concurrent release for the same IRQ bails out instead of double-freeing 'info'. - Tidy spurious whitespace in release_irq()'s spin_lock/unlock calls. --- Changes in v3: - Drop extraneous "to" from "Unable to permit to %pd" message. - Move res/irq/rirq to loop scope; use nirq as declaration initializer. - Hoist irq_ranges check before the loop (it is loop-invariant). - Remove spurious forward declarations (struct dt_device_node, struct rangeset) from intc.h; remove all three from setup.h. - Use __set_bit() instead of set_bit() in intc_route_irq_to_guest() since desc->lock is always held on every write path for desc->status. - Use XVFREE() instead of xvfree() in domain_vintc_deinit(). - Rename allocated_irqs -> used_irqs in struct vintc. - Fix dangling desc->action in release_irq()'s !IRQ_HAS_MULTIPLE_ACTION path by nulling *action_ptr after saving the action pointer. - Use true (not 1) for free_on_release in route_irq_to_guest(). - Use %pd for domain printing in route_irq_to_guest() error paths. - Introduce release_guest_irq() to pair with route_irq_to_guest() and plug the irq_guest info leak; call it from domain_vintc_deinit() for each vIRQ recorded in used_irqs. --- Changes in v2: - Rework IRQ mapping in more common (similar approach to Arm). --- 1 Signed-off-by: Oleksii Kurochko 2: refactorign freeing Signed-off-by: Oleksii Kurochko last fix Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 4 + xen/arch/riscv/device.c | 100 ++++++++++++ xen/arch/riscv/include/asm/intc.h | 9 ++ xen/arch/riscv/include/asm/irq.h | 5 + xen/arch/riscv/intc.c | 60 +++++++ xen/arch/riscv/irq.c | 255 ++++++++++++++++++++++++++++++ xen/arch/riscv/vaplic.c | 9 ++ 8 files changed, 443 insertions(+) create mode 100644 xen/arch/riscv/device.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index fcd73c7a2dd5..3b948c11dd61 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y +=3D aia.o obj-y +=3D aplic.o obj-y +=3D cpufeature.o +obj-y +=3D device.init.o obj-y +=3D domain.o obj-y +=3D domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) +=3D dom0less-build.init.o diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index c2d7183e1852..3681f0669efb 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -325,9 +325,13 @@ static const hw_irq_controller aplic_xen_irq_type =3D { .set_affinity =3D aplic_set_irq_affinity, }; =20 +/* At the moment there is no difference between guest and Xen ops */ +#define aplic_guest_irq_type aplic_xen_irq_type + static const struct intc_hw_operations aplic_ops =3D { .info =3D &aplic_info, .host_irq_type =3D &aplic_xen_irq_type, + .guest_irq_type =3D &aplic_guest_irq_type, .handle_interrupt =3D aplic_handle_interrupt, .set_irq_type =3D aplic_set_irq_type, }; diff --git a/xen/arch/riscv/device.c b/xen/arch/riscv/device.c new file mode 100644 index 000000000000..fc41c075c772 --- /dev/null +++ b/xen/arch/riscv/device.c @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include +#include + +#include + +int __overlay_init map_irq_to_domain(struct domain *d, unsigned int irq, + bool need_mapping, const char *devnam= e) +{ + int res; + + res =3D irq_permit_access(d, irq); + if ( res ) + { + printk(XENLOG_ERR "Unable to permit %pd access to IRQ %u\n", d, ir= q); + return res; + } + + if ( need_mapping ) + { + /* + * -EEXIST merely means that the IRQ has already been reserved, wh= ich + * legitimately happens when the IRQ is shared between devices. Any + * other failure has to be fatal: the IRQ would otherwise be route= d to + * the domain without domain_vintc_deinit() ever releasing it agai= n. + */ + res =3D vintc_reserve_virq(d, irq); + if ( res && (res !=3D -EEXIST) ) + { + printk(XENLOG_ERR "Unable to reserve vIRQ %u for %pd\n", irq, = d); + return res; + } + + res =3D route_irq_to_guest(d, irq, irq, devname); + if ( res < 0 ) + { + printk(XENLOG_ERR "Unable to map IRQ%u to %pd\n", irq, d); + return res; + } + } + + dt_dprintk(" - IRQ: %u\n", irq); + + return 0; +} + +int __overlay_init map_device_irqs_to_domain(struct domain *d, + struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges) +{ + unsigned int i, nirq =3D dt_number_of_irq(dev); + + if ( irq_ranges ) + return -EOPNOTSUPP; + + /* Give permission and map IRQs */ + for ( i =3D 0; i < nirq; i++ ) + { + int res, irq; + struct dt_raw_irq rirq; + + res =3D dt_device_get_raw_irq(dev, i, &rirq); + if ( res ) + { + printk(XENLOG_ERR "Unable to retrieve irq %u for %s\n", + i, dt_node_full_name(dev)); + return res; + } + + /* + * Don't map IRQs that have no physical meaning + * ie: IRQs whose controller is not APLIC/IMSIC/PLIC. + */ + if ( rirq.controller !=3D dt_interrupt_controller ) + { + dt_dprintk("irq %u not connected to primary controller. Connec= ted to %s\n", + i, dt_node_full_name(rirq.controller)); + continue; + } + + irq =3D platform_get_irq(dev, i); + if ( irq < 0 ) + { + printk("Unable to get irq %u for %s\n", i, dt_node_full_name(d= ev)); + return irq; + } + + res =3D map_irq_to_domain(d, irq, need_mapping, dt_node_name(dev)); + if ( res ) + return res; + } + + return 0; +} diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 6fc0e620e937..1bfba7c6155b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -15,6 +15,7 @@ enum intc_variant { }; =20 struct cpu_user_regs; +struct domain; struct irq_desc; struct kernel_info; struct vcpu; @@ -34,6 +35,9 @@ struct intc_hw_operations { /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; =20 + /* hw_irq_controller to enable/disable/eoi guest irq */ + const struct hw_interrupt_type *guest_irq_type; + /* Set IRQ type */ void (*set_irq_type)(struct irq_desc *desc, unsigned int type); /* Set IRQ priority */ @@ -63,6 +67,8 @@ struct vintc_ops { }; =20 struct vintc { + unsigned int nr_virqs; + unsigned long *used_irqs; /* Callbacks invoked during domain construction only. */ const struct vintc_init_ops *init_ops; /* Runtime callbacks used for the lifetime of the guest. */ @@ -76,10 +82,13 @@ void register_intc_ops(const struct intc_hw_init_ops *i= nit_ops); void intc_init(void); =20 void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority); +int intc_route_irq_to_guest(struct irq_desc *desc, unsigned int priority); =20 void intc_handle_external_irqs(struct cpu_user_regs *regs); =20 int domain_vintc_init(struct domain *d); void domain_vintc_deinit(struct domain *d); =20 +int vintc_reserve_virq(const struct domain *d, unsigned int virq); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/= irq.h index 62648bdc4252..66067747dc0f 100644 --- a/xen/arch/riscv/include/asm/irq.h +++ b/xen/arch/riscv/include/asm/irq.h @@ -52,6 +52,11 @@ void init_IRQ(void); =20 void do_IRQ(struct cpu_user_regs *regs, unsigned int irq); =20 +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname); + +int release_guest_irq(struct domain *d, unsigned int virq); + #endif /* ASM__RISCV__IRQ_H */ =20 /* diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index f5c8af6ddea4..bca83b4f4fa3 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -3,11 +3,15 @@ #include #include #include +#include +#include #include #include #include #include +#include #include +#include =20 #include #include @@ -78,6 +82,22 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsign= ed int priority) intc_set_irq_priority(desc, priority); } =20 +int intc_route_irq_to_guest(struct irq_desc *desc, + unsigned int priority) +{ + ASSERT(spin_is_locked(&desc->lock)); + + ASSERT(intc_hw_ops->guest_irq_type); + + desc->handler =3D intc_hw_ops->guest_irq_type; + __set_bit(_IRQ_GUEST, &desc->status); + + intc_set_irq_type(desc, desc->arch.type); + intc_set_irq_priority(desc, priority); + + return 0; +} + int __init make_intc_domU_node(struct kernel_info *kinfo) { const struct vintc *vintc =3D kinfo->bd.d->arch.vintc; @@ -101,6 +121,15 @@ int domain_vintc_init(struct domain *d) break; } =20 + if ( !ret ) + { + d->arch.vintc->used_irqs =3D + xvzalloc_array(unsigned long, + BITS_TO_LONGS(d->arch.vintc->nr_virqs)); + if ( !d->arch.vintc->used_irqs ) + ret =3D -ENOMEM; + } + return ret; } =20 @@ -108,6 +137,20 @@ void domain_vintc_deinit(struct domain *d) { const enum intc_variant variant =3D intc_hw_ops->info->hw_variant; =20 + if ( !d->arch.vintc ) + return; + + if ( d->arch.vintc->used_irqs ) + { + unsigned int virq; + + for ( virq =3D 0; virq < d->arch.vintc->nr_virqs; virq++ ) + if ( test_bit(virq, d->arch.vintc->used_irqs) ) + release_guest_irq(d, virq); + + XVFREE(d->arch.vintc->used_irqs); + } + switch ( variant ) { case INTC_APLIC: @@ -118,3 +161,20 @@ void domain_vintc_deinit(struct domain *d) break; } } + +/* + * Mark @virq as used by @d so that domain_vintc_deinit() knows that it ha= s to + * be released. + * + * Returns 0 on success, -EEXIST if @virq has already been reserved, which + * legitimately happens when an IRQ is shared between devices, and -ERANGE= if + * @virq is outside the range of the interrupt sources the vINTC provides. + */ +int __overlay_init vintc_reserve_virq(const struct domain *d, + unsigned int virq) +{ + if ( virq >=3D d->arch.vintc->nr_virqs ) + return -ERANGE; + + return test_and_set_bit(virq, d->arch.vintc->used_irqs) ? -EEXIST : 0; +} diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c index b5066fc3e981..4ba45fc79df2 100644 --- a/xen/arch/riscv/irq.c +++ b/xen/arch/riscv/irq.c @@ -12,11 +12,26 @@ #include #include #include +#include #include +#include =20 #include #include =20 +/* Describe an IRQ assigned to a guest */ +struct irq_guest +{ + struct domain *d; + unsigned int virq; + /* + * The action of a guest IRQ has the same lifetime as this structure, = so + * embed it here to have both covered by a single allocation. Conseque= ntly + * it must not be freed by release_irq() (see free_on_release below). + */ + struct irqaction action; +}; + static irq_desc_t irq_desc[NR_IRQS]; =20 struct irq_desc *irq_to_desc(unsigned int irq) @@ -198,6 +213,14 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int i= rq) if ( desc->handler->ack ) desc->handler->ack(desc); =20 + if ( desc->status & IRQ_GUEST ) + /* + * With APLIC + IMSIC, guest interrupts bypass Xen and are deliver= ed + * directly to the guest. Without IMSIC, interrupts would be trapp= ed + * by Xen and would need injecting into the guest here. + */ + panic("unimplemented"); + if ( desc->status & IRQ_DISABLED ) goto out; =20 @@ -227,3 +250,235 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int = irq) spin_unlock(&desc->lock); irq_exit(); } + +static struct irq_guest *irq_get_guest_info(struct irq_desc *desc) +{ + ASSERT(spin_is_locked(&desc->lock)); + ASSERT(test_bit(_IRQ_GUEST, &desc->status)); + ASSERT(desc->action); + + return desc->action->dev_id; +} + +/* + * Detach the action registered with 'dev_id' from 'desc' and, if it was t= he + * last one, shut the interrupt down. + * + * To be called with desc->lock held, which is still held upon return. The + * detached action is returned (NULL if 'dev_id' had no action registered)= and + * has to be handed to irq_release_action() once the lock has been dropped. + */ +static struct irqaction *irq_detach_action(struct irq_desc *desc, + const void *dev_id) +{ + struct irqaction *action, **action_ptr =3D &desc->action; + + ASSERT(spin_is_locked(&desc->lock)); + +#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION + for ( ;; ) + { + action =3D *action_ptr; + if ( !action || (action->dev_id =3D=3D dev_id) ) + break; + + action_ptr =3D &action->next; + } +#else + action =3D *action_ptr; +#endif + + if ( !action ) + { + printk(XENLOG_WARNING "Trying to free already-free IRQ %u\n", + desc->irq); + return NULL; + } + + /* Found it - remove it from the action list */ +#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION + *action_ptr =3D action->next; +#else + *action_ptr =3D NULL; +#endif + + /* If this was the last action, shut down the IRQ */ + if ( !desc->action ) + { + desc->handler->shutdown(desc); + __clear_bit(_IRQ_GUEST, &desc->status); + } + + return action; +} + +/* + * Complete the release of an action detached by irq_detach_action(). + * + * To be called with desc->lock dropped: the lock cannot be held all the w= ay + * through, as waiting for a handler still running on another CPU to compl= ete + * requires do_IRQ() to be able to acquire the very same lock. + * + * Once this function has returned, the action (and hence any object embed= ding + * it) is no longer referenced by anyone and may be freed by the caller. + */ +static void irq_release_action(const struct irq_desc *desc, + struct irqaction *action) +{ + /* + * Wait to make sure it's not being used on another CPU. + * + * The read barrier pairs with the spin_unlock() in do_IRQ(): once we + * observe _IRQ_INPROGRESS cleared, we are guaranteed to also see the + * writes do_IRQ() made to desc (e.g. desc->action) before releasing t= he + * lock, so it is safe to free the action below. + */ + do { smp_rmb(); } while ( test_bit(_IRQ_INPROGRESS, &desc->status) ); + + if ( action->free_on_release ) + xvfree(action); +} + +void release_irq(unsigned int irq, const void *dev_id) +{ + struct irq_desc *desc =3D irq_to_desc(irq); + struct irqaction *action; + unsigned long flags; + + spin_lock_irqsave(&desc->lock, flags); + action =3D irq_detach_action(desc, dev_id); + spin_unlock_irqrestore(&desc->lock, flags); + + if ( action ) + irq_release_action(desc, action); +} + +int release_guest_irq(struct domain *d, unsigned int virq) +{ + struct irq_desc *desc =3D irq_to_desc(virq); + struct irqaction *action; + struct irq_guest *info; + unsigned long flags; + int ret =3D -EINVAL; + + spin_lock_irqsave(&desc->lock, flags); + + if ( !test_bit(_IRQ_GUEST, &desc->status) ) + goto unlock_err; + + info =3D irq_get_guest_info(desc); + if ( d !=3D info->d ) + goto unlock_err; + + /* + * Detaching the action happens with desc->lock still held, so that a + * concurrent release_guest_irq() for the same IRQ sees _IRQ_GUEST alr= eady + * cleared and bails out, rather than capturing the same 'info' and + * double-freeing it below. + */ + action =3D irq_detach_action(desc, info); + + spin_unlock_irqrestore(&desc->lock, flags); + + if ( action ) + irq_release_action(desc, action); + + xvfree(info); + + return 0; + + unlock_err: + spin_unlock_irqrestore(&desc->lock, flags); + return ret; +} + +/* Route an IRQ to a specific guest */ +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname) +{ + struct irq_guest *info; + struct irq_desc *desc =3D irq_to_desc(irq); + unsigned long flags; + int retval =3D 0; + + if ( d->is_dying ) + return -EINVAL; + + info =3D xvzalloc(struct irq_guest); + if ( !info ) + return -ENOMEM; + + info->d =3D d; + info->virq =3D virq; + + info->action.dev_id =3D info; + info->action.name =3D devname; + /* The action is part of 'info', thus it is freed together with it. */ + info->action.free_on_release =3D false; + + spin_lock_irqsave(&desc->lock, flags); + + /* + * If the IRQ is already used by someone + * - If it's the same domain -> Xen doesn't need to update the IRQ de= sc. + * For safety check if we are not trying to assign the IRQ to a + * different vIRQ. + * - Otherwise -> For now, don't allow the IRQ to be shared between + * Xen and domains. + */ + if ( desc->action !=3D NULL ) + { + if ( test_bit(_IRQ_GUEST, &desc->status) ) + { + struct domain *ad =3D irq_get_guest_info(desc)->d; + + if ( d !=3D ad ) + { + printk(XENLOG_G_ERR "IRQ %u is already used by %pd\n", + irq, ad); + retval =3D -EBUSY; + } + else if ( irq_get_guest_info(desc)->virq !=3D virq ) + { + printk(XENLOG_G_ERR + "%pd: IRQ %u is already assigned to vIRQ %u\n", + d, irq, irq_get_guest_info(desc)->virq); + retval =3D -EBUSY; + } + } + else + { + printk(XENLOG_G_ERR "IRQ %u is already used by Xen\n", irq); + retval =3D -EBUSY; + } + goto out; + } + + retval =3D _setup_irq(desc, 0, &info->action); + if ( retval ) + goto out; + + retval =3D intc_route_irq_to_guest(desc, IRQ_NO_PRIORITY); + if ( retval ) + { + struct irqaction *action =3D irq_detach_action(desc, info); + + spin_unlock_irqrestore(&desc->lock, flags); + + if ( action ) + irq_release_action(desc, action); + + goto free_info; + } + + spin_unlock_irqrestore(&desc->lock, flags); + + return 0; + + out: + spin_unlock_irqrestore(&desc->lock, flags); + free_info: + xvfree(info); + + return retval; +} diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index a529a5b1dc49..14f6e3164a9b 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -113,6 +113,15 @@ int domain_vaplic_init(struct domain *d) =20 vaplic->regs.domaincfg =3D APLIC_DOMAINCFG_RO; =20 + /* + * APLIC source 0 is reserved; sources are numbered 1..guest_aplic_num= _sources + * and used directly as indices into used_irqs. Size the bitmap to + * guest_aplic_num_sources + 1 so the highest source has a valid slot + * (index 0 stays unused). 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[109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:48 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843989; x=1788448789; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=hspl5jZCbYhpDCmk3LQL2TUMtm9DwE0NtljqNNHKmy8=; b=PX/afli83Fs28nOZ3KzNexiHUhSmrv+2vhJrRHCMy5aS+EA5Shc44C3Z2a/S1Nxq0a VO4f94RMG+9vclW0vRzD+zi9yaDwLT/rgUhBcwf32J7jqZmvaON4elnRKIhhAS3jHSEe PKTseGT81oxEwc3nV7AfGLVvkQICnMbvcf/axESrei+Uvl1yrVfFkUnGi4Zvm14evNQD XkQu8lw4F73HV/ivZFym3JdKglAjTSsBFI0mujaQyavT/3vMVd+MO8QT5GrTfxdTpcgt OTD8EyZJSF+i9JBzynOSEilDdojzCi4uNDm4d/RddjBKx7NMJaJ+t3arJdLJJg2PKV0V hy6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843989; x=1788448789; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=hspl5jZCbYhpDCmk3LQL2TUMtm9DwE0NtljqNNHKmy8=; b=rppqpCsHqwEpxxrSDO6vH7Vix98RPMlKD6vDEDYzoxJMpMTrwqzgxPn6pYdpJwaHhO kg/s/7yGNdzae3ONNqo8nA6DvmYVC1ZwSH2pgZcDOG2osiWdReka/let7oXQBXOqAEal ZxIX1qF8kJ8W9IuHrApqBuF6RrS3lGsxbvrC0Aj6OODetCVpEi5Tk7R2IRTr6bDp5fq4 IAqDCd//0scDL99RcoN/K90+r6jJhSN/flyDkHAry/sFVKgnYwxRrVGNWKdJ6hZJjoJl FX+vfl0+e732DJYbCWoeSeTOCQ+YXlviTNfYjVWx5yJSA68+xBP9oeS+1mWtjfXE7Zc9 9yVw== X-Gm-Message-State: AFuF++m245Y9f5CBW4gOzjKF7QCvp5yYpbelTa9rY3QcDg/CEVzcGwFp 6bIfvve7nGLPXfKBMcyIuKtSh4iwMpFopemVXkFdlbYpFS66/mjzOs36iWQJcg== X-Gm-Gg: AR+sD13yyLigdU5rX6WMufrnpEc/sgdl6CNkEZMcOS0ons7dKpPHYlUHO3lBGla5zkc 1LY6VTlFB0+0G88TfScWLzWlr/qVmJ3lTt07TCsn564NRsvcKjGYbnloMt+2dUTa2hyzMNRo8/h Odw1FOQyKZA3lYnfYex+TR88OBsU3L/03vhURCrm96Kbwd7ZoXjbmzK9RSG/OnV5/MTV6S4JpRD PfGUc7/GpPyVzAdebuYnvuDJnfuiTyrDKX6uBjXn9/UnSvH/4Ia2k3V63swhJkx08+suswRuLvo NhVV61nQkh2iWS37Wu5lBGU8IJaD/n6FOk5XLAEi09CmRcaj0RZq+krZiXoJv1Feu5xWx8AOy79 ZankA4dN5cYUkV/J8x9ITacMer4G51OVVMhM2h1/cJLV9oh1FhL6J7aF5DCMRHpRYW0AUGn1mcT ikFXHqlr3+I3zhaT0HqwznoG9cO9OkL6wOUJTCnMc1vVogH8bQMYUfTuPF7fdlxoC+vSLzemPrn 39TLXixw03XdyzSj49Wity55JvMQ2LH X-Received: by 2002:a5d:4cc9:0:b0:482:a9d7:7ced with SMTP id ffacd0b85a97d-482e26f2d68mr18663653f8f.14.1787843988781; Thu, 27 Aug 2026 08:19:48 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 17/20] xen/riscv: implement init_intc_phandle() Date: Thu, 27 Aug 2026 17:19:10 +0200 Message-ID: X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1787843989-FC610034-D4EE1F8E/10/73395122804 X-purgate-type: spam X-purgate-size: 1378 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844029475158500 Content-Type: text/plain; charset="utf-8" Implement init_intc_phandle() to read phandle of interrupt controller node and save it in kernel->phandle_intc for the future usage during creation of guest interrupt controller node. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-8: - Nothing changed. Only rebase. --- --- xen/arch/riscv/dom0less-build.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index 4cc00012aa8d..a1fa51b996a7 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -4,9 +4,26 @@ #include #include #include +#include =20 #include =20 +int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, + const int node_next, const void *pfdt) +{ + if ( dt_node_cmp(name, "intc") =3D=3D 0 ) + { + uint32_t phandle_intc =3D fdt_get_phandle(pfdt, node_next); + + if ( phandle_intc !=3D 0 ) + kinfo->phandle_intc =3D phandle_intc; + + return 0; + } + + return 1; +} + int __init make_arch_nodes(struct kernel_info *kinfo) { /* No RISC-V specific nodes need to be made, at the moment. */ --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844021; cv=none; d=zohomail.com; s=zohoarc; b=f+ypd/+I/AA3GcQpafnzF9RsKNzVuhzlo5wX9qD8QkIlr6KH6rtpMBNkBAjMLJFYOpJmXqRJTIdjpetE0J2V45APEyXembWD04Gm2gKnua0Be7CEKaO6hke1R55YfYCjpM/qxsQqxepdC7eHmw199XNDNy6RBNidzzu6cKIekCU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787844021; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=A7l2D0jJWYC9jU2joRLXLdGgfpd427nTKM3O84md/I4=; b=hO3wJBRLi2ec+dKGZJe3nbqBdRjZ6/yzfW5hPhQlDHpEuBvE/aO8JxcyB7BZedgkUCjQ2o5R6QG90sCd20GS3/WyEybPIBogljVTTuvSkDqJO0PgNy3OAAj9fNuZEmQJhdES2qyesLtqZLtfhxnVMxuriiW+epMoOefvMzHLl0I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1787844021319315.3203330846785; Thu, 27 Aug 2026 08:20:21 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1400837.1636503 (Exim 4.92) (envelope-from ) id 1wzbtS-0007Sb-T3; Thu, 27 Aug 2026 15:19:54 +0000 Received: by outflank-mailman (output) from mailman id 1400837.1636503; Thu, 27 Aug 2026 15:19:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wzbtR-0007PM-Tp; Thu, 27 Aug 2026 15:19:53 +0000 Received: by outflank-mailman (input) for mailman id 1400837; Thu, 27 Aug 2026 15:19:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wzbtP-000768-DL for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 15:19:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wzbtO-00C6oU-QH for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 17:19:50 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a905594-2eae-0a2a0a5409dd-0a2a450cba40-8 for ; Thu, 27 Aug 2026 17:19:50 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a905596-f479-0a2a450c0019-d155dd2bac24-3 for ; Thu, 27 Aug 2026 17:19:50 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-482e5733a5aso1155300f8f.0 for ; Thu, 27 Aug 2026 08:19:50 -0700 (PDT) Received: from fedora (user-109-243-144-234.play-internet.pl. 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The scheduler must be initialized prior to do_initcalls() because cpupool_create_pool() is called during initcalls; without it, BUG_ON(IS_ERR(pool)) is triggered inside cpupool_create_pool(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-8: - Nothing changed. Only rebase. --- Changes in v3: - Add Acked-by: Jan Beulich . --- Changes in v2: - New patch. Several patches were folded into one. --- --- xen/arch/riscv/setup.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 56a0907a855f..c3e98733ebc3 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -6,9 +6,12 @@ #include #include #include +#include #include #include #include +#include +#include #include #include #include @@ -156,12 +159,21 @@ void __init noreturn start_xen(unsigned long bootcpu_= id, =20 timer_init(); =20 + rcu_init(); + + setup_system_domains(); + local_irq_enable(); =20 console_init_postirq(); =20 guest_mm_init(); =20 + scheduler_init(); + set_current(idle_vcpu[0]); + + do_initcalls(); + printk("All set up\n"); =20 machine_halt(); --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844018; cv=none; d=zohomail.com; s=zohoarc; b=hbp6G8W9xJr0tK8TkAiIUBN+5wjDpKRlWEIs8eHeXxNJ9gOjM0E8+Arh2P0U7ZzfqlaMyxIdnGyEtmPiUKcJy2U+Vjn/1qa2AxiDiz1LbI5pV72Xek0wJAP/VQ9fdL0CQXhK3+Rh+yh55oe50UzQ27hahm2rvt4vH2XJKbuIMS4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787844018; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=nihbvDgoGb4TJo/cKdORKPVLnJZwrALFzlqr8YYLpAU=; b=ATp10H3RsXQQ9MIhz80vfSzD+KF+K9z3IKCYM5l++YHbGjDsKL0sD43ss2pvf2BRHk4+p8oUvB5ezJtEnHojbQtD96iLNIfVpIWXKVw337hMpwpi/MlRFIR/MGW9nmS2FjVfsq2ljA6PL4cxtx7mwytDJoT/ENXCDO+284eKDpg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1787844018713784.0946767051923; Thu, 27 Aug 2026 08:20:18 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1400842.1636509 (Exim 4.92) (envelope-from ) id 1wzbtU-0007ir-Km; Thu, 27 Aug 2026 15:19:56 +0000 Received: by outflank-mailman (output) from mailman id 1400842.1636509; Thu, 27 Aug 2026 15:19:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wzbtT-0007gH-I3; Thu, 27 Aug 2026 15:19:55 +0000 Received: by outflank-mailman (input) for mailman id 1400842; Thu, 27 Aug 2026 15:19:53 +0000 Received: from mx.expurgate.net ([195.190.135.20]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wzbtQ-0007E1-K9 for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 15:19:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wzbtP-00BpK6-TS for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 17:19:51 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a905597-8faa-0a2a0a5109dd-0a2a45079888-2 for ; Thu, 27 Aug 2026 17:19:51 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a905597-b4ea-0a2a45070019-d155802dec33-3 for ; Thu, 27 Aug 2026 17:19:51 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-49b0d8bc2aaso14137115e9.0 for ; Thu, 27 Aug 2026 08:19:51 -0700 (PDT) Received: from fedora (user-109-243-144-234.play-internet.pl. [109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:51 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843991; x=1788448791; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=nihbvDgoGb4TJo/cKdORKPVLnJZwrALFzlqr8YYLpAU=; b=kpLH7V/zEvPVRYHuCJ3pt4cOvyEd0ZtYlgOrkh/b3nma2u4bgpZ7aXcf0nGbHQDRrq IusfvNj4LF946bPRC2zjdAh1NSGL+uCGCHrr/v74qxoAQjDxwQnJYYoBjn5T7dFmsbxd xM15Se5msf+kRnzrnx6HM3BZj8wPSLZtJSuKMCpnHfqwRvn4239UddrtDWXV/YNBvrCP 2f9Uq4PO8Z1FdDhRp1vrcjNSjMm+MmxSPQ8eTOs0vjUfwDnHX1kTRR9s77eELTaLRJIc dQinJ/DXu61RFFdY+GrHz8c0QwEa7z3CLOp06u5JWsdr4zlfpEq8F4RQHfyuin6Ox8NC B2eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843991; x=1788448791; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=nihbvDgoGb4TJo/cKdORKPVLnJZwrALFzlqr8YYLpAU=; b=rNtzF2rjPMAkXwOTGS1v0zI0gEbV4F7itTXII5WTDjUzzjuy148RJ4g9bJNO40NHRr H77rI8AGKuYQrkhz6Ip+emSdN36pejSDjZB6jW4lgPSO7Ha33eYTrc2I03ln4Ju1Wk1k CIZdaWBpm+5gJu0p+rcawmhVdeFIzujEdbMWSZpXjh6ccDqQFkeuHPYOg0FlY5+MWhRY 0BCEMwLXXagVf+1FPMADSUIDe0N6LIvQBTimvSLrit7HUFh5N53ugtSXDEAsKAHY2VqA HQBc8UqdjN4b2V0gQ5yQUerGTZlfsDe1CKm7Y7bf9vg3zMZ2bz5Ggl4VaYaIkJ1KNPqs JxBg== X-Gm-Message-State: AFuF++ncJIwUM4MnSCrnZsetu6EC2OYGlESBx06xlKkJbFYAbDs09P5x eXrENuViwi96zocvBPxE/1lF1bj5mrNLBBAEQfGBeAO2o8mPe9bHGYeibjeLIQ== X-Gm-Gg: AR+sD13MP1wPc4o2+mHQidPhon2jf7IqUfRyndEXpupMXkunZoddifHoyJtrBDswshG xGe5Xh9qlV+Ii9rjddgj8o1J/+uiTbX2K2rKLrFZXaIASHCMEDVulAglX4WwnemUNp80cZgeRJN Z5HllWN9Dj1Rxf09RwjOPKPCzMqglDVnR3FyN4YrIjNmSCiiFQhCLEGXHOnN/apLOWBHQXBMtkE cmpi8cE9a0rbDEt/Fx82fqaagif7jVeGgvoMPr/Mg4hUnGiIsYW9wD+J8Wj0bvOqweOpgEQzRj7 0kNA+TaljReUe8dIi+7bU6mb8UrLfgiboGtKeFzDqUkX0oGxghAa3J1Mt84M9BrvS7FZ4o15ZX0 ufhExzOyQNQWbeC2SenupwBLNHbLbnxjqbiq32b909VLGS2Hk58rjg7P0k9e6sC43gL9VMbfzWP NQcPYvA2Q6yact7WMi7GJ2f5AQqV+3KrsWXAYwJvKIHPQ7XTd9UZ1r4stz2f/JJ/wklR4mVFCAT F9mnoFmjCWvzRrNmtv6krzyPk9D3dVg X-Received: by 2002:a05:600c:c48f:b0:499:dbc0:370d with SMTP id 5b1f17b1804b1-499dc6eaca4mr163300205e9.2.1787843991237; Thu, 27 Aug 2026 08:19:51 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 19/20] xen/riscv: provide init_vuart() Date: Thu, 27 Aug 2026 17:19:12 +0200 Message-ID: <906eee47f9e9da115209afe96b4efef9893346f1.1787836900.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1787843991-3C817AE4-3804E09F/10/73395122804 X-purgate-type: spam X-purgate-size: 1391 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844019428158500 Content-Type: text/plain; charset="utf-8" For debug purpose is enough to have only print messages from guest what is now implemented in vsbi_legacy_ecall_handler(). For full guesst console support it will better to have something similar to [1], thereby there is nothing specific should be done, at least, for now and init_vuart() is provided to make dom0less code buildable. [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602041533440.317= 5371@ubuntu-linux-20-04-desktop/ Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v3-v8: - Nothing changed. Only rebase. --- Changes in v2: - Add Acked-by: Jan Beulich . --- --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index a1fa51b996a7..d1a51b92936a 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -8,6 +8,14 @@ =20 #include =20 +int __init init_vuart(struct domain *d, struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + /* Nothing to do at the moment */ + + return 0; +} + int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, const int node_next, const void *pfdt) { --=20 2.55.0 From nobody Thu Sep 3 07:03:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1787844042; cv=none; d=zohomail.com; s=zohoarc; b=YmCK4hyOVlpIaQBOto4Z31VuBJpJTjFImSc34cHwKZgamUc87q7AvwQr2xwzjMwDsfiaxIdHnIhnag0zElMiwlesqWNh6TLlFR5c+mwjOJIAYLo9OuVducnqvoRZZghG0KgX4/G9F1EvkSwf3h4vkHXmZaXi2Q8k5KxsI1JsMEk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1787844042; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=fVKdGetffBRubdmjJd38E0ZcnQQRwEaATMIg4OwbtS0=; b=VudiI2zQFXOCf0D2gmRQZxbMV61uLPHQ9dYth6TrH4CWMDN/t+lF01EWOYN02Rc3a+V7hkwrAJDXmv9wkpKaeExJ4srY58jJUaHCIo1BoBPpvrpmrR+yW5Tm2JUkPQzQJmhHtPieaowplWkZd536kxYGKs8xK2tx+Xuw2tM3Q+s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1787844042678773.348772316384; Thu, 27 Aug 2026 08:20:42 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1400844.1636516 (Exim 4.92) (envelope-from ) id 1wzbtX-00084R-1W; Thu, 27 Aug 2026 15:19:59 +0000 Received: by outflank-mailman (output) from mailman id 1400844.1636516; Thu, 27 Aug 2026 15:19:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wzbtV-0007zw-HZ; Thu, 27 Aug 2026 15:19:57 +0000 Received: by outflank-mailman (input) for mailman id 1400844; Thu, 27 Aug 2026 15:19:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wzbtR-0007Ne-Rj for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 15:19:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wzbtR-00C6oU-6u for xen-devel@lists.xenproject.org; Thu, 27 Aug 2026 17:19:53 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a905598-2eae-0a2a0a5409dd-0a2a4502a324-4 for ; Thu, 27 Aug 2026 17:19:53 +0200 Received: from [209.85.221.46] (helo=mail-wr1-f46.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a905599-6ca4-0a2a45020019-d155dd2eed9f-3 for ; Thu, 27 Aug 2026 17:19:53 +0200 Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-47ddf7b09e5so1880269f8f.1 for ; Thu, 27 Aug 2026 08:19:53 -0700 (PDT) Received: from fedora (user-109-243-144-234.play-internet.pl. [109.243.144.234]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-482e28f5d01sm10049148f8f.32.2026.08.27.08.19.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Aug 2026 08:19:52 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1787843992; x=1788448792; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=fVKdGetffBRubdmjJd38E0ZcnQQRwEaATMIg4OwbtS0=; b=VO0qUWWUuPSk1qaWoG0IuDyUmJ8dMQTjUXCOYhtImrn+shyATsJDyJ33inzEZxCL7w z6RGpqPqhtNrUm/qRjJ+sEirI9eszV21gEeorDk+pb5tiFrLCrO0bk0n58oqvlyzI0Hg /4Q2q1gCyIpXpSOb+CVJZ1pVYLwTNiZr/jW5xUHKHxWTZhH01s/IdEFS3nzwfBl/BV6/ aiR4WlWxKgBJPqfqmoSz2azHyrKb4Vb7cSrC7jt7mp1bHA9Av95Ywgm0MYZmnrqHirtR Tj8DqQ1eJHsnUWb9szGJRQQd2ghEL7Ahtto68SIYrb1P9q0yozWDZNU9aNW1p/jW4udm SDwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1787843992; x=1788448792; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=fVKdGetffBRubdmjJd38E0ZcnQQRwEaATMIg4OwbtS0=; b=iC0SEaeKNb9sFDE8OR2JJ3jfVwNjZErsz9JaP4adMJfJeHNTFsb6C6bn+B586agyCm 18DybGHuZE2KLwfdKt/dXtLRMt7F4Pn5wI8r6a0+KM6lAJgsIiWs1M+HBUH+xcfeLrjH xfHcEpTRZSn9PpMWzi0YnZQnE3uyh02ezzDlVOg1vQmkLt6TrcUo6U7zjmwIqLZxB3N9 PNeuqQdPuDj82HKmsdlu1uhcrjDXxtuaomEyO3stcxTNqxoCWYdK//PYYK8MNpY4GLuX UZ1JuJKHuO/QXLIW3Jn+VhMiE5X62FVRtUjymTb1tf0+mNbx7LZSHkWDuJml+1SQOOa5 8skw== X-Gm-Message-State: AFuF++mXYXpBHg1ShUTTCTDjOLFUDLfcEhJh9vn/oNBbaEdrohb9qrhr 71R6YK7afR0G3CLOZdmhcxtjtQ/TG160T1ekkh8PBDdAVOHX/twMFrvrcpiwbg== X-Gm-Gg: AR+sD12UMP8A662X0JPAJrkOIxV8XbAaU4LuoYqraHagzjFPM4xkUNzP4U5viqSb9s1 DIuTXDYSXCiiEVE27kfKdBLBF2+MJoHxuOqfUwzj86JprKzSDoEqJEAu+Thoh4HIulPWxQDhr4K qBoNUq7AgcHbhcZSr/K52kuesRNSJ6fp9XYbajqRAWXLu1+/ABSIRuEYvblwPVi55PkXmkoUMlN j18KeHcT1c03XFc6TPVsaaRkHLfh58fWFGspern9Mq7f419g6oIeEWJjkg8Jaa0zxaikRSftcnd hztLkQoKSC0y4xOARi7cLYSW0toUABzY+ktAGxbfSQkNl2B7gOZz5iRldbrLFaBU/S5PIKRURz1 Vl7XVOquYDr548FTwWEdCfj10dnahv+qyF0qKea++5ip0hi6lmc7kZFDSBE2qEj2jeER8dtp765 5oyGZuXQeWTFXcWIAqAw6qPIq5AHtMdeC+IFjrLsPGgHMHYYhDBlSw1PGf72HYg2hgBj7Lbo33V KfjO6V/MJeROM3FzMY/3FtSMTIavZ8ouQ== X-Received: by 2002:a05:6000:29dc:b0:47f:8183:e9b8 with SMTP id ffacd0b85a97d-482e26f2a93mr16922970f8f.22.1787843992513; Thu, 27 Aug 2026 08:19:52 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Zheng Zhang , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v8 20/20] xen/riscv: add initial dom0less infrastructure support Date: Thu, 27 Aug 2026 17:19:13 +0200 Message-ID: X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1787843993-66AB52AC-C88A6E13/10/73395122804 X-purgate-type: spam X-purgate-size: 7397 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1787844043654158500 Content-Type: text/plain; charset="utf-8" Enable dom0less support for RISC-V by selecting HAS_DOM0LESS and providing the minimal architecture hooks required by the common dom0less infrastructure. Add stub implementations for architecture-specific helpers used when building domains from the device tree. These allow the generic dom0less code to build and let a basic DomU be constructed on RISC-V. construct_hwdom() and make_hypervisor_node() are still stubs returning an error: Dom0/hwdom construction isn't supported yet, and the hypervisor node generation (needed by domains with DOM0LESS_ENHANCED_NO_XS set) is not implemented. Both are marked with a TODO and are not reached by the currently supported configurations. Provide missing helpers and definitions required by the domain construction code, including domain bitness helpers and the p2m_set_allocation() prototype. Additionally define the guest magic memory region (GUEST_MAGIC_BASE / GUEST_MAGIC_SIZE) in asm/guest-layout.h. The base is arbitrary; the only constraint is that the region must not overlap guest RAM or the emulated device regions. It is placed in the unused gap below GUEST_RAM0_BASE (0x80000000); the constraints are documented next to the #define-s. A separate region for grant tables will be introduced at the same time as the introduction of the grant table for RISC-V. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v8: - Nothing changed. Only rebase. --- Changes in v6-7: - Acked-by: Jan Beulich . --- Changes in v5: - Reword the comment above defintion of GUEST_MAGIC_BASE. - Shrunk the size of GUEST_MAGIC_SIZE to 2Mb as looking on the Arm only 4 pages are used and there is no technical reason to have 16Mb for that region. (Maybe in case of Arm it is connected that Arm has these definitions in public header so more space is reserved to not "break" public API in future) - Update the commit message with a remark about grant table region in guest-layout.h. --- Changes in v4: - Reword the description: the stubs do not let dom0less fully "run" since construct_hwdom() and make_hypervisor_node() return an error; spell out these limitations instead. - Add a TODO comment to construct_hwdom() explaining that Dom0/hwdom construction isn't supported yet. - Add a TODO comment to make_hypervisor_node() explaining that returning an error breaks building of domains with DOM0LESS_ENHANCED_NO_XS set, and why that is harmless for now. - Document the constraints on GUEST_MAGIC_BASE/GUEST_MAGIC_SIZE next to the #define-s and drop the QEMU-based justification (QEMU is not involved); the base is simply an arbitrary non-overlapping address. Changes in v3: - Add /* Nothing specific to do for now */ comment to arch_handle_passthrough_prop(). - Use _ULL() instead of xen_mk_ullong() for GUEST_MAGIC_BASE and GUEST_MAGIC_SIZE (xen_mk_ullong() is intended for public headers only). - Fix GUEST_MAGIC_BASE from 0x39000000 to 0x79000000 to avoid the QEMU RISC-V virt machine PCIE_ECAM range. - Drop CONFIG_STATIC_MEMORY=3Dn from the CI randconfig; now redundant since STATIC_MEMORY depends on HAS_STATIC_MEMORY which RISC-V does not select. Changes in v2: - Move declaration of p2m_set_allocation() to p2m-common.h. - Add __initdata for max_init_domid and drop initalizer for it. - Add CONFIG_STATIC_MEMORY=3Dn to CI's randconfig to avoid compilation error because of guest_physmap_add_pages() isn't provided. --- xen/arch/riscv/Kconfig | 2 ++ xen/arch/riscv/dom0less-build.c | 7 ++++++ xen/arch/riscv/domain-build.c | 28 +++++++++++++++++++++++ xen/arch/riscv/include/asm/guest-layout.h | 12 ++++++++++ 4 files changed, 49 insertions(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 48520588fe40..d8a348c0cf07 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -6,6 +6,8 @@ config RISCV select GENERIC_BUG_FRAME select GENERIC_UART_INIT select HAS_DEVICE_TREE_DISCOVERY + select HAS_DOM0LESS + select HAS_DOMAIN_TYPE select HAS_EX_TABLE select HAS_PMAP select HAS_UBSAN diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index d1a51b92936a..0801d7e25059 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -102,3 +102,10 @@ int __init arch_parse_dom0less_node(struct dt_device_n= ode *node, =20 return 0; } + +int __init arch_handle_passthrough_prop(struct kernel_info *kinfo, + struct dt_device_node *node) +{ + /* Nothing specific to do for now */ + return 0; +} diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index d7613721db95..1e3abe259ccd 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -156,9 +156,37 @@ int __init make_cpus_node(const struct domain *d, stru= ct kernel_info *kinfo) return fdt_end_node(fdt); } =20 +int __init construct_hwdom(struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + /* + * TODO: Dom0/hwdom construction isn't supported on RISC-V yet, so this + * is a stub returning an error. It must be implemented before a hardw= are + * domain can be built from the device tree. + */ + + return -EOPNOTSUPP; +} + int __init make_timer_node(const struct kernel_info *kinfo) { /* There is no need for timer node for RISC-V. */ =20 return 0; } + +int __init make_hypervisor_node(struct domain *d, + const struct kernel_info *kinfo, + int addrcells, int sizecells) +{ + /* + * TODO: Generating the hypervisor node isn't implemented yet. Returni= ng + * an error here breaks building of any domain (DomU included) whose + * dom0less_feature has DOM0LESS_ENHANCED_NO_XS set. This is harmless = for + * now because Dom0/hwdom construction isn't supported on RISC-V yet + * either, and no RISC-V DomU sets that flag, so this path is never ta= ken. + * It must be implemented before DOM0LESS_ENHANCED_NO_XS is used. + */ + + return -EOPNOTSUPP; +} diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/inc= lude/asm/guest-layout.h index 90603f06bb91..ceed9125e7e2 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -32,4 +32,16 @@ #define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } #define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } =20 +/* + * The guest magic region holds the Xen-reserved pages mapped into the + * guest's physical address space. The only real constraint on + * GUEST_MAGIC_BASE/SIZE is that the region must not overlap guest RAM + * (the GUEST_RAMx banks) or the emulated device regions defined above; + * the exact base is otherwise arbitrary. Here it is placed in the unused = gap + * below GUEST_RAM0_BASE (0x80000000), but a hole after a RAM bank would w= ork + * equally well. + */ +#define GUEST_MAGIC_BASE _UL(0x79000000) +#define GUEST_MAGIC_SIZE _UL(0x00200000) + #endif /* ASM_RISCV_GUEST_LAYOUT_H */ --=20 2.55.0