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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:39 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251420; x=1778856220; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3ZMmWO9/I/8K7VzRErw7HfQg64F77t5aimUcSK3Fxfo=; b=HZKLF3BNlv20nh4wH4h5ebWGekK9N6CDpnAgQwEjuVcblZO4ArcEo2iOEdxPjcNRVg R9gvRziEApB1ACoeU88ihhWZ3FTQU6e7+g2+IiL2SDeJrEgPXFmi1JNzskfSkW7D1sw4 0IBUgIqQ8tI5xb4jGXK8J3ihtmUcm+tnaZ2VC5g4TG2Mg4EFXoU3AYDffYu6k45+q80B dnFYcIqun42aMS+sCSmyjooILqzyFvQTckLh0gc/jUwv8iCjS8eGd+koTx/M79i0gEmB GcAxW3/BzhzPIKsRmMu+93hVMz6fpJC/j7USAXRXSxD+RqsY3oybJpKOX9VKHsojvmz+ v2og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251420; x=1778856220; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3ZMmWO9/I/8K7VzRErw7HfQg64F77t5aimUcSK3Fxfo=; b=pCyk3JUsu0oEhgJMXDDQ70CGjF8lqQqYfQulg0/ziDE11pyYT+mDZ3etdWtuoRy0zP 3cOEYllIqgIV9t8J+3ZvP9MTi0TtFNqOpQNiOn/hpKtvGGlOp7iK7r+mWguJxsQRsRg7 OXoyvRHD9rSSRYc3ao9EkIHSP34oX4LEIiPHj23Pg/ne7CbY0oPHzZSYX0Fp4ZfRjlIU 99DUrz5MOHgwT6pyq+ksGA3CPs8/VvwPthN/zhjChC/1bHWeBDJYNIwaosYDeeIauFPz gbHQH7/IF8Osqs5YE5lm2HVfA7ziZM9pkQY0bnv2cE+WenVq6ehVbckoTCB3bzmH7/Im raMg== X-Gm-Message-State: AOJu0YyAyPBrVNf/PHKdiQykfqDLLg0eH8GGskGdxk0oNwvw/eqV2LBO VWRw+0vIOlgI7ixPpWGV6kpa5qeppBbaSyqGDz4vwVIRBPRYkYEefvD7ovZm2w== X-Gm-Gg: AeBDievOS0+sPHqhOheukB8+FnfG9s3gXNhTBaA1VGjpe3jazAUGEtCTLIVpird8I// 0kxfeuKzI7xA6iWiyFQKzCTVNUXjg9XGaxGR3pBQQc+ldGSTjn8zecz7127x9RUvIfmOCT2YtCG K0zPO97+SDhdsMnCaV7nrDHcvMB8sZVueTcZTnLoAGgmioU6i/m4eYYwN7+Zb/Wn2/kGww/B8NJ C0qg2jQvkUantVsU62gTqHGDL1VvTCcDar19FlwB6zUmW9Zh2axxz2SUIEKV5DRYNeo9O/EmH/c gTu8K5M+W3FiNsbW7cvDMTF2DvN9cP52bpxvENadoUOZ7aEqUzHkQx90+OSjG9V4WkhcMEKg4hO I3Cuso5xj12xSHvEIemjpGktZif5rdpV6eL/5xn32Z3SzOshPPyKMFcQ3kS3tWZXAMrfQY/qObg 8RJ2wE/lqfcZpefjHCfGmxq68cpFzFsgk4ZoEojHx8NQ02lUQoiNEhLmxCmUvrj2At8Q== X-Received: by 2002:a17:906:fd87:b0:bad:f5dd:6740 with SMTP id a640c23a62f3a-bc56aa411e4mr728446366b.3.1778251419579; Fri, 08 May 2026 07:43:39 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Alistair Francis , Connor Davis Subject: [PATCH v2 01/26] xen: arm: update p2m_set_allocation() prototype Date: Fri, 8 May 2026 16:43:03 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1778251420-86168D75-213873DA/10/73395122804 X-purgate-type: spam X-purgate-size: 7869 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251437230154100 Content-Type: text/plain; charset="utf-8" p2m_set_allocation() signals preemption redundantly: via a bool *preempted out-argument (set to true) and via -ERESTART return code, both at the same time. This led to the caller-side ASSERT(preempted =3D=3D (rc =3D=3D -EREST= ART)) added solely to document their agreement. Drop the out-argument entirely. The return code alone is sufficient to distinguish preemption (-ERESTART) from success (0) or other failures. Replace the pointer with a plain bool can_preempt that controls whether the preemption check is performed at all, making the previous NULL-to-suppress-preemption calling convention explicit and type-safe. Since p2m_set_allocation() is called by the common dom0less build code, move its declaration from the ARM-specific asm/p2m.h to xen/p2m-common.h. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko --- Changes in v2: - new patch --- xen/arch/arm/include/asm/p2m.h | 1 - xen/arch/arm/mmu/p2m.c | 22 ++++++++-------------- xen/arch/riscv/include/asm/paging.h | 2 +- xen/arch/riscv/p2m.c | 7 ++++--- xen/arch/riscv/paging.c | 7 ++----- xen/common/device-tree/dom0less-build.c | 2 +- xen/include/xen/p2m-common.h | 2 ++ 7 files changed, 18 insertions(+), 25 deletions(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 7957dbd96e57..62b37a05f79e 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -232,7 +232,6 @@ void p2m_restore_state(struct vcpu *n); /* Print debugging/statistial info about a domain's p2m */ void p2m_dump_info(struct domain *d); =20 -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preemp= ted); int p2m_teardown_allocation(struct domain *d); =20 static inline void p2m_write_lock(struct p2m_domain *p2m) diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c index 51abf3504fcf..e5c6be7c0890 100644 --- a/xen/arch/arm/mmu/p2m.c +++ b/xen/arch/arm/mmu/p2m.c @@ -67,10 +67,11 @@ int arch_get_paging_mempool_size(struct domain *d, uint= 64_t *size) =20 /* * Set the pool of pages to the required number of pages. - * Returns 0 for success, non-zero for failure. + * Returns 0 for success, -ERESTART if preempted, or a negative error code= on + * failure. * Call with d->arch.paging.lock held. */ -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preemp= ted) +int p2m_set_allocation(struct domain *d, unsigned long pages, bool can_pre= empt) { struct page_info *pg; =20 @@ -112,11 +113,8 @@ int p2m_set_allocation(struct domain *d, unsigned long= pages, bool *preempted) break; =20 /* Check to see if we need to yield and try again */ - if ( preempted && general_preempt_check() ) - { - *preempted =3D true; + if ( can_preempt && general_preempt_check() ) return -ERESTART; - } } =20 return 0; @@ -125,7 +123,6 @@ int p2m_set_allocation(struct domain *d, unsigned long = pages, bool *preempted) int arch_set_paging_mempool_size(struct domain *d, uint64_t size) { unsigned long pages =3D size >> PAGE_SHIFT; - bool preempted =3D false; int rc; =20 if ( (size & ~PAGE_MASK) || /* Non page-sized request? */ @@ -133,27 +130,24 @@ int arch_set_paging_mempool_size(struct domain *d, ui= nt64_t size) return -EINVAL; =20 spin_lock(&d->arch.paging.lock); - rc =3D p2m_set_allocation(d, pages, &preempted); + rc =3D p2m_set_allocation(d, pages, true); spin_unlock(&d->arch.paging.lock); =20 - ASSERT(preempted =3D=3D (rc =3D=3D -ERESTART)); - return rc; } =20 int p2m_teardown_allocation(struct domain *d) { int ret =3D 0; - bool preempted =3D false; =20 spin_lock(&d->arch.paging.lock); if ( d->arch.paging.p2m_total_pages !=3D 0 ) { - ret =3D p2m_set_allocation(d, 0, &preempted); - if ( preempted ) + ret =3D p2m_set_allocation(d, 0, true); + if ( ret =3D=3D -ERESTART ) { spin_unlock(&d->arch.paging.lock); - return -ERESTART; + return ret; } ASSERT(d->arch.paging.p2m_total_pages =3D=3D 0); } diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/a= sm/paging.h index e487c89a4ccd..103384723dc5 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -9,7 +9,7 @@ struct page_info; int paging_domain_init(struct domain *d); =20 int paging_freelist_adjust(struct domain *d, unsigned long pages, - bool *preempted); + bool can_preempt); =20 int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages); int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 703b9f4d2540..41d6d3d5e699 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -430,15 +430,16 @@ int p2m_init(struct domain *d, const struct xen_domct= l_createdomain *config) =20 /* * Set the pool of pages to the required number of pages. - * Returns 0 for success, non-zero for failure. + * Returns 0 for success, -ERESTART if preempted, or a negative error code= on + * failure. * Call with d->arch.paging.lock held. */ -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preemp= ted) +int p2m_set_allocation(struct domain *d, unsigned long pages, bool can_pre= empt) { struct p2m_domain *p2m =3D p2m_get_hostp2m(d); int rc; =20 - if ( (rc =3D paging_freelist_adjust(d, pages, preempted)) ) + if ( (rc =3D paging_freelist_adjust(d, pages, can_preempt)) ) return rc; =20 /* diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index 76a203edbb0c..35f572689a7c 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -47,7 +47,7 @@ static int _paging_add_to_freelist(struct domain *d) } =20 int paging_freelist_adjust(struct domain *d, unsigned long pages, - bool *preempted) + bool can_preempt) { ASSERT(spin_is_locked(&d->arch.paging.lock)); =20 @@ -66,11 +66,8 @@ int paging_freelist_adjust(struct domain *d, unsigned lo= ng pages, return rc; =20 /* Check to see if we need to yield and try again */ - if ( preempted && general_preempt_check() ) - { - *preempted =3D true; + if ( can_preempt && general_preempt_check() ) return -ERESTART; - } } =20 return 0; diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tr= ee/dom0less-build.c index 6d6882a34b5a..1058699ab25b 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -747,7 +747,7 @@ static int __init domain_p2m_set_allocation(struct doma= in *d, uint64_t mem, domain_p2m_pages(mem, d->max_vcpus); =20 spin_lock(&d->arch.paging.lock); - rc =3D p2m_set_allocation(d, p2m_pages, NULL); + rc =3D p2m_set_allocation(d, p2m_pages, false); spin_unlock(&d->arch.paging.lock); =20 return rc; diff --git a/xen/include/xen/p2m-common.h b/xen/include/xen/p2m-common.h index f0bd9a6b9896..1b44ec8ce36c 100644 --- a/xen/include/xen/p2m-common.h +++ b/xen/include/xen/p2m-common.h @@ -43,5 +43,7 @@ int __must_check check_get_page_from_gfn(struct domain *d= , gfn_t gfn, bool readonly, p2m_type_t *p2mt_p, struct page_info **page_p); =20 +int p2m_set_allocation(struct domain *d, unsigned long pages, + bool can_preempt); =20 #endif /* _XEN_P2M_COMMON_H */ --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:40 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251421; x=1778856221; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xxTnfnHWZBjnSzhjEou4ZV1OWnhheJt3wsjWOC72ais=; b=RhJm641UWtuGann51h4kJ3uT4z3jXh1UqWzcGqqTEKvBAXsCC3Lz1/KxELUTBXSpye qRRrwBzcCxDH2A6njzXfFAkERN4Yry9O2mikcP4qMYC0Ydc+w4EDiuIKx7+wdSYQqrX+ fcX9TP50NmFYFkhYOmdHof92NLddIHwBzN0lMcvUtwC6RjiQ33PtZr3AggCCooUmHhEx iw6Ud0lh6b2zAvwuitaF3CMzpFeKvH5kC4DYu573jhooqf//Q6r2TOU3qe0zirayOOYQ 5uMVQUAfxeY/WxMHqV13WhXWlD7y2yGz+XnllXJVa5/ITv1Q4tRWCfIXCiMH0aBh0vsG 75Ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251421; x=1778856221; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=xxTnfnHWZBjnSzhjEou4ZV1OWnhheJt3wsjWOC72ais=; b=Rf3pn25Hv84THK4UADrlBF0LgOgPcBnU8dIVceLl6xK5mGrG62wuoQfzxuYXLsclZR GEz6LQTuNcQ6i6CMCG556Hln5pjJNS+GnzwEUxIK3tM4Mr7saAhPFUPkZvJZSauCbxvp yv8uk7jeA7FD5o0sLMRlRyAoQjMIPhnJA3IaAw00oXdPvxZCaRS2S9AoDxp8bbv+q5DK 7MP8CYy7AR0dsmd29CXMaU7uNK6IdrFCuhSG8piTrFI70A65332CVm/1EXmj2n+CwOTZ IV9tzi+DViBvE89y7Q7hPYdtgmq26+N+mvu0xToN29q9zq8V4I916BD5fQVdRsSGb7Xn puuw== X-Gm-Message-State: AOJu0Yy2zdZF1XCLD0C0kwoamnxCQeA3wTwVkxdJo8ndtAt7DjmoQofW yP2mJ4lEmhnrhuSGCQ/8oC0Cte9AUug8NaKdVSxbO8X3kDB3KSjeBJiHYkwLQg== X-Gm-Gg: AeBDietQOkL+Rjz4ATyNuD5dtJGD8YQ12BbEd7uUIH4+SiJKUoPYqTsS4rcmqAXU30m WOmj8AmcevbmEOIXxGV2dY62vyAFsOowznvpUn3RTkh7f/6sNoadjPJb+w3eG7LruDmjz/Hzc1e nTDLgUub2YG4ZEX8WRpJrn//6GU8MZfYdRXhHBjDOlsv64tMW+Z+OzvhpcPvCJk+vJRURyGwTL+ GMD/+OJ/JYBBCg+YDY1gobjYllk8QrOyhJ+AAiqSzKSccxoSdzdTDhSa65m4q9DozteHx3/R+cK LQtncBbd5e9YHb/Ejziwm13dGb/NFxRnjuSBoD/zlkEOwJN+fkt5y8Tdfful52LFNX0bXnxC4B3 dOrm4NKHncf2SSk+yvrIToU6vGFx8+eBOlA5T2Er7Qhyk1+wE6xiXpUJcItzcwH/XiSGgfwJ7zz 70KJcUc9ac34318sj575L9aTDSiiSGJCUqAJomQyosHV0rqPz0EJvQWe8NyFU3u0H9ig== X-Received: by 2002:a17:906:4792:b0:bc6:bb4b:1726 with SMTP id a640c23a62f3a-bc85d6b8d73mr452039566b.22.1778251421005; Fri, 08 May 2026 07:43:41 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 02/26] xen/riscv: Implement ARCH_PAGING_MEMPOOL Date: Fri, 8 May 2026 16:43:04 +0200 Message-ID: <97f20cc49563fdf01775a649e562e302bd0fa886.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1778251421-8576FD75-37C5910D/10/73395122804 X-purgate-type: spam X-purgate-size: 2399 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251443184158501 Content-Type: text/plain; charset="utf-8" The p2m_freelist is used to allocate pages for the P2M. To initialize this list, domain_p2m_set_allocation() may be called from construct_domU() in the common Dom0less code, so RISC-V provides an implementation and enables CONFIG_ARCH_PAGING_MEMPOOL unconditionally. Additionally, implement arch_{set,get}_paging_mempool_size(). They are not directly used yet, but are required to support the XEN_DOMCTL_{get,set}_paging_mempool_size hypercalls. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Turn on CONFIG_ARCH_PAGING_MEMPOOL=3Dy unconditionally and drop all ifde= f-s related to this config. - Optimize check inside arch_set_paging_mempool_size which verify size argument. - Use pfn_to_paddr() inside arch_get_paging_mempool_size() instead of open coding the stuff. - Drop ASSERT() from arch_set_paging_mempool_size() as it is impossible to have here preempted =3D true and rc !=3D -ERESTART. --- --- xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/p2m.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 41426c205292..48520588fe40 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -1,5 +1,6 @@ config RISCV def_bool y + select ARCH_PAGING_MEMPOOL select DOMAIN_BUILD_HELPERS select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 41d6d3d5e699..bed997bd9d5a 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1606,3 +1606,27 @@ struct page_info *get_page_from_gfn(struct domain *d= , unsigned long gfn, =20 return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); } + +int arch_set_paging_mempool_size(struct domain *d, uint64_t size) +{ + unsigned long pages =3D PFN_DOWN(size); + int rc; + + /* Non page-sized request or 32-bit overflow? */ + if ( pfn_to_paddr(pages) !=3D size ) + return -EINVAL; + + spin_lock(&d->arch.paging.lock); + rc =3D p2m_set_allocation(d, pages, true); + spin_unlock(&d->arch.paging.lock); + + return rc; +} + +/* Return the size of the pool, in bytes. */ +int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) +{ + *size =3D pfn_to_paddr(ACCESS_ONCE(d->arch.paging.total_pages)); + + return 0; +} --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251446; cv=none; d=zohomail.com; s=zohoarc; b=IlvRI8eKo/BR/Ehq9X7mmONVm/YCGmAORwBo0GctJJHvfV/A/iLxLsq+2XXLmiAjCUoXPIFwrRG9xcEygRLV6yiNRKtiOh1WZkcxRisJC9MNNvBJ6xALS7XgsevT21BlLmlobQ8qt6de9+2K9t5qLTG42qWSCIW8EvRHWhffx6A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251446; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=RC7DlCeUsaedUaIqwbZ2zmHNvDYUNbqCg+js/0qPP3o=; b=KVNaw7vd/LGManvWYsFsffgDvyLOuKFUBOUo44FFTszQXB7yHui12fiei3/mcXkCFS3suiZkA15tq9xr+yf6ZlH5bKLhQFb3kIHGieg31euc6e0DIuubtgLLW4r9a3MgVAxOaPyDa7BQRpq1EUebEy8NMhMlelNDO/bCIZfJHNc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778251446544571.5756860844547; Fri, 8 May 2026 07:44:06 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303736.1577011 (Exim 4.92) (envelope-from ) id 1wLMQb-0005L3-N0; Fri, 08 May 2026 14:43:45 +0000 Received: by outflank-mailman (output) from mailman id 1303736.1577011; Fri, 08 May 2026 14:43:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQb-0005Kr-JW; Fri, 08 May 2026 14:43:45 +0000 Received: by outflank-mailman (input) for mailman id 1303736; Fri, 08 May 2026 14:43:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQa-00056i-0p for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQZ-007XVC-Dp for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:43 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf678-2eae-0a2a0a5409dd-0a2a4501d306-48 for ; Fri, 08 May 2026 16:43:43 +0200 Received: from [209.85.208.41] (helo=mail-ed1-f41.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf69f-c1f2-0a2a45010019-d155d029cc46-3 for ; Fri, 08 May 2026 16:43:43 +0200 Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-67bc6098640so3266330a12.0 for ; Fri, 08 May 2026 07:43:43 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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It also creates additional vCPUs up to max_vcpus and assigns the device tree address and boot cpuid in registers. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Rework construct_domain() to print that vCPU1...n are created using %pv. - Use true instead of 1 for initialization of v->is_initialised. - Drop unnessary BUG_ON() in construct_domain(). - Add TODO comment above *_load() functions. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain-build.c | 52 +++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 xen/arch/riscv/domain-build.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 8f7fd625dddd..fd5e499eb4b9 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y +=3D aplic.o obj-y +=3D cpufeature.o obj-y +=3D domain.o +obj-y +=3D domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) +=3D dom0less-build.init.o obj-$(CONFIG_EARLY_PRINTK) +=3D early_printk.o obj-y +=3D entry.o diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c new file mode 100644 index 000000000000..492327631e33 --- /dev/null +++ b/xen/arch/riscv/domain-build.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include + +#include +#include + +int __init construct_domain(struct domain *d, struct kernel_info *kinfo) +{ + struct vcpu *v =3D d->vcpu[0]; + struct cpu_user_regs *regs =3D vcpu_guest_cpu_user_regs(v); + + BUG_ON(v->is_initialised); + + /* + * At the moment *_load() don't return value and will just panic() + * inside. + * TODO: it will be good to change that. + */ + kernel_load(kinfo); + initrd_load(kinfo, copy_to_guest_phys); + dtb_load(kinfo, copy_to_guest_phys); + + regs->sepc =3D kinfo->entry; + + /* Guest boot cpuid =3D 0 */ + regs->a0 =3D 0; + regs->a1 =3D kinfo->dtb_paddr; + + for ( unsigned int i =3D 1; i < d->max_vcpus; i++ ) + { + const struct vcpu *tmp_v =3D vcpu_create(d, i); + + if ( !tmp_v ) + { + printk("Failed to allocate %pd v%d\n", d, i); + break; + } + + dprintk(XENLOG_INFO, "Created vcpu %pv\n", tmp_v); + } + + domain_update_node_affinity(d); + + v->is_initialised =3D true; + clear_bit(_VPF_down, &v->pause_flags); + + return 0; +} --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:43 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251424; x=1778856224; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ON68LWIVt0veSgG+MTTW1fAvzyX9osSH7edZs0haa/c=; b=ojY1+tG8NNYEKp3zbp7ZDYfpS4oprGUt5PmSK/6ClXNHLVQqfeTMkBdCQi1YSVThur QZ78RPLe/2zzPjuRxXVb2Wyx4fHUwhEZXun/dkVP82KIUfJT824Z9YOcJCxx0edJ69gV VREtYZ4FggqCYzYnEFrpO3Bm6DU2DMY5+JmpvJ5DW/Otmowl5rrI3M2blHcYsk/ob/aC cICsQK8ZiVZ4LWObBvyggAdT8sZ8sLBU/EZ4F/rP5WbCgoBRFi1PRQhjFv3Fa2faohsw UUWaTly+K3PdPbqf6ovRYpMcjl0HJLNYWRNtb3p19hmSFnShT2NHYJPr/nDZ7eUFqERW lovA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251424; x=1778856224; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ON68LWIVt0veSgG+MTTW1fAvzyX9osSH7edZs0haa/c=; b=fDlkEB4+qh/4x3rcrOO7vr1bkxuouAyufYenhhmndbf9wQ9taeGEIeWd1Uyo6JTs/5 LlB1RPWyjMtCcCtoBNrue1dlzLGNF0LwwIYxJFD3lISNcRd45BrQF3zYjJo/FsL/UGOi VOFRnptptal18Di8monwDZE7BKZzBg9o6pVvguGHfdhu2ffNcg7zMXX1G2TGMEgQtUYP NTfrU+3A7hUh00eQ4HYpKknY3FIF0ytRvST5e4q3L9g+4x+MzJcZgxRUofSLofsrMh2N OdY/EzZPQudfdKkJI+L31zjVaT8JIukZBIvAShZZwKpDTYoR49uXj8vD/jxeNsJ1hRXX EZkQ== X-Gm-Message-State: AOJu0YwhW0r65UvZwAlvVn5wDs5ImVCB2fnKfyWEX6pcYVqX0WfStWgH 4fBCXL2ja3+xjVbiVPBNLZmBI1dPOoFSUxn1FCSSRLHRNCEIdp2TtmJH30gf6w== X-Gm-Gg: Acq92OGsNg34BuMel2BOa3QcrFRSaZxMbOA87IfqnBSxHuHMow7bcJ/36aZkwFY+AJ0 2dHWEg7tdHIv88tkDX4XWRSXJq2BhrHMf4D1NMnw3X2loLdrGpht8oM4kdYzlDGjK3J6B6metCc VHIC1dK5WxBUQ0tZng8IgjXmWWl9bc4yyc1JreF4rRbtCjS+QOpktS3t7YBHhJZms5AcLV3s9Uc hWxzFjeXKBW4CMoVULcv2//mFjGLBaiOuG+symLO1BTvCSy9VEqI6iJ/6RyDT/xFp3DwRsDiqun oO+zA9tlfsx2u86Iuv/5ZwxRmTKWrqa6Evb2I6v9e5G1H8yv6GG6cO4AY3J2VlPNulMYxRcg3yo IZwGHktnszogG8h0Wg9qaZDoNDOM8WclYJ3m6L6GrO9OWWliKTnu1x2nFfdoLi2efZZHhUoi+jE bvkVKUjyUrH/i7t5teoChHHM6ZPKqnWk9siSb6vk4jwM4gvtrM54RpyVFt25/wF0LAnGVQ9tu9m 5tN X-Received: by 2002:a17:906:209a:b0:bc5:f94d:97ec with SMTP id a640c23a62f3a-bc5f94d99d0mr432108466b.45.1778251423727; Fri, 08 May 2026 07:43:43 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 04/26] xen/riscv: implement prerequisites for domain_create() Date: Fri, 8 May 2026 16:43:06 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778251424-39B7C938-AB56FE88/10/73395122804 X-purgate-type: spam X-purgate-size: 2301 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251453416154100 Content-Type: text/plain; charset="utf-8" arch_domain_create() and arch_sanitise_domain_config() are prerequisites for domain_create(). arch_sanitise_domain_config() currently returns 0, as there is no specific work required at this stage. arch_domain_create() performs basic initialization, such as setting up the = P2M and initializing of next unused phandle. Signed-off-by: Oleksii Kurochko --- Changes in v2: - update the commit message. - Drop vcpu_switch_to_aarch64_mode() from riscv/stubs. It shouldn't be und= er riscv/ at all. - Drop next_phandle as it is now in common code. --- xen/arch/riscv/domain.c | 25 +++++++++++++++++++++++++ xen/arch/riscv/stubs.c | 12 ------------ 2 files changed, 25 insertions(+), 12 deletions(-) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index c77be3b827eb..669dd27d79a3 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -289,6 +289,31 @@ void sync_vcpu_execstate(struct vcpu *v) /* Nothing to do -- no lazy switching */ } =20 +int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) +{ + return 0; +} + +int arch_domain_create(struct domain *d, + struct xen_domctl_createdomain *config, + unsigned int flags) +{ + int rc =3D 0; + + if ( is_idle_domain(d) ) + return 0; + + if ( (rc =3D p2m_init(d, config)) !=3D 0) + goto fail; + + return rc; + + fail: + d->is_dying =3D DOMDYING_dead; + arch_domain_destroy(d); + return rc; +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index acbb5b9123ea..cfb12d51d00b 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -101,18 +101,6 @@ void dump_pageframe_info(struct domain *d) BUG_ON("unimplemented"); } =20 -int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) -{ - BUG_ON("unimplemented"); -} - -int arch_domain_create(struct domain *d, - struct xen_domctl_createdomain *config, - unsigned int flags) -{ - BUG_ON("unimplemented"); -} - int arch_domain_teardown(struct domain *d) { BUG_ON("unimplemented"); --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251451; cv=none; d=zohomail.com; s=zohoarc; b=Xs+7Ejug3V7zWkkm6bg8Kt6RZa6oX4vTx6hbuv6zvrflTPER+ZIiOgq1A38LooMmrmbtPiFFbr6fVsmlIrpL0dJzi0P8suSGRFM9lGZCvV8+cRiQ4D5p/ekNEnJa4tMapyw349NmH5NvAHn8SzbsN9XF/cSPqiuTsgGjs9NFs9g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251451; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=xB7Os2MChM3TR6KXilRQ9GrrVvrhO9KwN/leWcO7waQ=; b=QbbV5Xzy6OgRHgAO+qbJTqzVq1uIijr7kElycC/XfTdMTUuwbE9hAxceK0ddmY+pqAzpX3m6FijKAJqNo4tVZiP3V2/5oLC0sE3RNpMAraoKmV6CUDFJxmq++pVNa6Vi9CKtuXa7f5rIqWaunEiNzMeBQG0G8AQPwP1kKJ+74XQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778251451374869.6307385293223; Fri, 8 May 2026 07:44:11 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303739.1577028 (Exim 4.92) (envelope-from ) id 1wLMQe-0005ps-58; Fri, 08 May 2026 14:43:48 +0000 Received: by outflank-mailman (output) from mailman id 1303739.1577028; Fri, 08 May 2026 14:43:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQe-0005od-1f; Fri, 08 May 2026 14:43:48 +0000 Received: by outflank-mailman (input) for mailman id 1303739; Fri, 08 May 2026 14:43:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQc-0005Xa-OM for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQc-007XVC-50 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-2eae-0a2a0a5409dd-0a2a45028638-42 for ; Fri, 08 May 2026 16:43:46 +0200 Received: from [209.85.218.52] (helo=mail-ej1-f52.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a2-af86-0a2a45020019-d155da34ac9a-3 for ; Fri, 08 May 2026 16:43:46 +0200 Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-bc264a50e7fso393112866b.0 for ; Fri, 08 May 2026 07:43:46 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Introduce the per-domain isa string and guest isa bitmap, populated during domain creation by calling init_guest_isa(). Introduce guest_unsupp to filter out ISA extensions that should not be exposed to guests: - f/d/q/v: FPU and vector context save/restore are not yet implemented for guests. - h: Nested virtualisation is not supported. - sstc: Xen owns the supervisor timer; guests must use SBI. - svade: Xen manages hardware A/D bit updates in stage-2 page tables. - svpbmt: Page-based memory types are not yet wired up in stage-2 code. Drop __initconst for riscv_isa_ext() as it can be used after init stage by init_guest_isa(). Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/guest_unsupp_bmp/guest_unsupp. - Drop guest_isa_str. - Provide init_guest_isa() instead of polluting match_isa_ext(). - Drop xlen. - Add the comment about guest_unsupp. - Update the way how guest_unsupp is init-ed. - Drop __initconst for riscv_isa_ext[] as it is used in init_guest_isa() which isn't marked as __init as it could be used after init stage. --- --- xen/arch/riscv/cpufeature.c | 59 ++++++++++++++++++++++++- xen/arch/riscv/domain.c | 3 ++ xen/arch/riscv/include/asm/cpufeature.h | 5 +++ xen/arch/riscv/include/asm/domain.h | 4 ++ 4 files changed, 70 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index 92235fdfd5ab..618592e6096a 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -14,6 +14,7 @@ #include #include #include +#include #include =20 #include @@ -120,7 +121,7 @@ static int __init dt_get_cpuid_from_node(const struct d= t_device_node *cpu, * and strncmp() is used in match_isa_ext() to compare extension names ins= tead * of strncasecmp(). */ -const struct riscv_isa_ext_data __initconst riscv_isa_ext[] =3D { +const struct riscv_isa_ext_data riscv_isa_ext[] =3D { RISCV_ISA_EXT_DATA(i), RISCV_ISA_EXT_DATA(m), RISCV_ISA_EXT_DATA(a), @@ -128,6 +129,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_e= xt[] =3D { RISCV_ISA_EXT_DATA(d), RISCV_ISA_EXT_DATA(q), RISCV_ISA_EXT_DATA(c), + RISCV_ISA_EXT_DATA(v), RISCV_ISA_EXT_DATA(h), RISCV_ISA_EXT_DATA(zicntr), RISCV_ISA_EXT_DATA(zicsr), @@ -160,6 +162,12 @@ static const struct riscv_isa_ext_data __initconst req= uired_extensions[] =3D { RISCV_ISA_EXT_DATA(svpbmt), }; =20 +/* + * Everything in riscv_isa_ext[] which shouldn't be exposed to guests shou= ld + * appear here. + */ +static __ro_after_init DECLARE_BITMAP(guest_unsupp, RISCV_ISA_EXT_MAX); + static bool __init is_lowercase_extension_name(const char *str) { /* @@ -480,6 +488,53 @@ bool riscv_isa_extension_available(const unsigned long= *isa_bitmap, return test_bit(id, isa_bitmap); } =20 +int init_guest_isa(struct domain *d) +{ + char *buf =3D d->arch.guest_isa_str; + size_t len =3D sizeof(d->arch.guest_isa_str); + + bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, + RISCV_ISA_EXT_MAX); + +#if defined(CONFIG_RISCV_32) + if ( snprintf(buf, len, "rv32") >=3D len ) + return -ENOBUFS; +#elif defined(CONFIG_RISCV_64) + if ( snprintf(buf, len, "rv64") >=3D len ) + return -ENOBUFS; +#else +# error "Unsupported RISC-V bitness" +#endif + + for ( unsigned int i =3D 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) + { + const struct riscv_isa_ext_data *ext =3D &riscv_isa_ext[i]; + + if ( !riscv_isa_extension_available(d->arch.guest_isa, ext->id) ) + continue; + + if ( ext->id >=3D RISCV_ISA_EXT_BASE && strlcat(buf, "_", len) >= =3D len ) + return -ENOBUFS; + + if ( strlcat(buf, ext->name, len) >=3D len ) + return -ENOBUFS; + } + + return 0; +} + +static void __init init_guest_unsupp(void) +{ + set_bit(RISCV_ISA_EXT_f, guest_unsupp); + set_bit(RISCV_ISA_EXT_d, guest_unsupp); + set_bit(RISCV_ISA_EXT_q, guest_unsupp); + set_bit(RISCV_ISA_EXT_v, guest_unsupp); + set_bit(RISCV_ISA_EXT_h, guest_unsupp); + set_bit(RISCV_ISA_EXT_sstc, guest_unsupp); + set_bit(RISCV_ISA_EXT_svade, guest_unsupp); + set_bit(RISCV_ISA_EXT_svpbmt, guest_unsupp); +} + void __init riscv_fill_hwcap(void) { unsigned int i; @@ -527,4 +582,6 @@ void __init riscv_fill_hwcap(void) if ( !all_extns_available ) panic("Look why the extensions above are needed in " "https://xenbits.xenproject.org/docs/unstable/misc/riscv/boo= ting.txt\n"); + + init_guest_unsupp(); } diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 669dd27d79a3..041aed176f32 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -303,6 +303,9 @@ int arch_domain_create(struct domain *d, if ( is_idle_domain(d) ) return 0; =20 + if ( (rc =3D init_guest_isa(d)) !=3D 0 ) + goto fail; + if ( (rc =3D p2m_init(d, config)) !=3D 0) goto fail; =20 diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/inclu= de/asm/cpufeature.h index 0c48d57a03bb..42d13d9dbdbe 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -17,6 +17,8 @@ */ #define RISCV_ISA_EXT_BASE 26 =20 +#define RISCV_GUEST_ISA_STR_MAX 256 + enum riscv_isa_ext_id { RISCV_ISA_EXT_a, RISCV_ISA_EXT_c, @@ -44,7 +46,10 @@ enum riscv_isa_ext_id { RISCV_ISA_EXT_MAX }; =20 +struct domain; + void riscv_fill_hwcap(void); +int init_guest_isa(struct domain *d); =20 bool riscv_isa_extension_available(const unsigned long *isa_bitmap, enum riscv_isa_ext_id id); diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index 6044ce0feee0..664b0b9f9129 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -7,6 +7,7 @@ #include #include =20 +#include #include #include #include @@ -94,6 +95,9 @@ struct arch_domain { struct p2m_domain p2m; =20 struct paging_domain paging; + + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; }; =20 #include --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251454; cv=none; d=zohomail.com; s=zohoarc; b=oLX35uFFS7WZVYQp/SjmtKxKV0oxuOQb+ovlGwsjb0R+gzIlbIr2z2RQQ3KzERFdcEcvF8V6f9kzrSx0UdiOC4s/4gZysX8YXpvgts0k9eZrOeoIDquAeSwi578qffbYIDR6kzEzPM3qDxmmIZ/9/4LmVNxQI1tecgywPQD0QHE= ARC-Message-Signature: i=1; a=rsa-sha256; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:46 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251427; x=1778856227; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h2FQZbHP3CuQahBukHTaog7FxD+oxGJO5XRNsXmYJe4=; b=X0t+9RaSUeCjep3jNL7vIIdNjlbPwUqfBKiXwLObzdX6gaKimPlQ7z8HxtZn5uVNIr buVozRXQpaVSV+v+uWl8hz7I5Nl6hEepWyrKGHII+d9Rmpj3NBJztsk4ucH1dwpeKLl8 ooYUMXOa8/yTB0hHCHfHurzXRhK+wbT/ujx+JwQ2xgJrpQWIqFLxfrG1XG89SpVYt94/ fiS4kGyo1qb8KPgSnBcwqK2SR1PFy540Xq4BM80H7ivkkrXyIMuvPr+iwH2WvlCoVWxB znDRfTDWf4r3nXyz53qadxAvblPYLtZuM/fcrhZ96MzGZ2UrPMapGvgY74tKUyJy9Au9 kxLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251427; x=1778856227; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=h2FQZbHP3CuQahBukHTaog7FxD+oxGJO5XRNsXmYJe4=; b=sQXkZrPpNZEcvV6h7+2B+/y2HJJvc2zSPi5XLQykEySDXIcLoqbeIR1O7PZTeJ6Cuc dpXrRrx0yCPEI+kGU1QqJ2yoNCThImyixkrgb6WAEKjAjqNXZSC4UYNbRWN47mLEbzGA BOpn+tT0svdtcdnXKlaY4zqd8IvUaoT2q7iPPIK6UV7TjcTurJqHHgaAHQBteDoNe9+W WgUtO4fJu2lJZxdNrFsU4o1xZjg1TNimEJM5cJ4Fa8+81nKauZ6/+gVKpHx934FARg2S qhdxJbdK6SKyAtDg8Wmx3dqnDn3u0B7LSM/8qShn9U0pRElXDuYg+QBPPnl+gGCIbdZm D2Fw== X-Gm-Message-State: AOJu0YxGAl/GzLB/wgBqwzxnyUIvkRrGKlZke9gSZWQ0kkY3ERc1jgML /bfPXalk2eJ7QdmVciE8UiF2r4KORbNbYkdVqaZQQ0DCAV43t4edTzzvAhNaoA== X-Gm-Gg: Acq92OEfecAL58r/D4VpERJX93PQgzkkP2GUMa0fJvX3HCJFup4BnEFN2E3dxlpvkGG Y5m5Y2EYdrXHRFQm7dZ4HZ9cfrAvwFqL+R4yH10NXoMEPWb8B7XsbHNENXoj027L5d4/kS2oVVg 1rFcq/dYx/CC/FoSa7wDq0rYvGE+GS/rU8xIG9nKerdD6sFCk5G2J+onjR1+61ViyC56hnS3Glx 6E0lJ/S45J6we+rQ9hNAR99uFIIZNkRxfUJn7uOiEccrsG7m+NzsIbjQqagHLuWY7vpS2fAExFR kkuSsuXER414OzxphipLgjg9BYgVpCkONSrd/7kC5cPk5jQ0rZsnAHYrUBnjeUfbgCWAK9FgNhH funVLdBBoliyr+8kISbK/GYq70s+oIeQj2D8mO3e1TovGZ2Alhcv+j1WXExcXaDxt7zDyVxVkwO PZGBsTjOIZWzqmqKHNQmSFG59n+3LkDdTX48tLuOqPOETA0iigBespwRAgBpzoyyXl6g== X-Received: by 2002:a17:907:c18:b0:bc4:b9f5:fe27 with SMTP id a640c23a62f3a-bc56c42aca0mr727233666b.10.1778251426591; Fri, 08 May 2026 07:43:46 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 06/26] xen/riscv: implement make_cpus_node() Date: Fri, 8 May 2026 16:43:08 +0200 Message-ID: <69d2dd26b7c2d00c9d28f898f041f6d1be145e0d.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-42698a/1778251427-20C7DF3B-6AFED7C1/10/73395122804 X-purgate-type: spam X-purgate-size: 4127 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251477646154100 Content-Type: text/plain; charset="utf-8" Implement make_cpus_node() to create cpus node for a guest domain. This function is going to be use by common dom0less code during construction domain. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/u32/uint32_t for timebase_frequency local variable. - Drop +1 from BUILD_BUG_ON(). - return fdt_end_node(fdt); instead of res at the end of the function. --- --- xen/arch/riscv/domain-build.c | 106 ++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 492327631e33..3063328d96e4 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,8 +3,10 @@ #include #include #include +#include #include =20 +#include #include #include =20 @@ -50,3 +52,107 @@ int __init construct_domain(struct domain *d, struct ke= rnel_info *kinfo) =20 return 0; } +int __init make_cpus_node(const struct domain *d, struct kernel_info *kinf= o) +{ + int res; + const struct dt_device_node *cpus =3D dt_find_node_by_path("/cpus"); + unsigned int cpu; + uint32_t timebase_frequency; + bool frequency_valid; + void *fdt =3D kinfo->fdt; + + dt_dprintk("Create cpus node\n"); + + if ( !cpus ) + { + dprintk(XENLOG_ERR, "Missing /cpus node in the device tree?\n"); + return -ENOENT; + } + + frequency_valid =3D dt_property_read_u32(cpus, "timebase-frequency", + &timebase_frequency); + + res =3D fdt_begin_node(fdt, "cpus"); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#address-cells", 1); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#size-cells", 0); + if ( res ) + return res; + + if ( frequency_valid ) + res =3D fdt_property_cell(fdt, "timebase-frequency", timebase_freq= uency); + + for ( cpu =3D 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + uint32_t reg =3D cpu_to_fdt32(cpu); + + snprintf(buf, sizeof(buf), "cpu@%u", cpu); + res =3D fdt_begin_node(fdt, buf); + if ( res ) + return res; + + res =3D fdt_property(fdt, "reg", ®, sizeof(reg)); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "status", "okay"); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", "riscv"); + if ( res ) + return res; + + BUILD_BUG_ON((sizeof("riscv,") + + sizeof_field(struct gstage_mode_desc, name)) >=3D si= zeof(buf)); + snprintf(buf, sizeof(buf), "riscv,%s", max_gstage_mode->name); + res =3D fdt_property_string(fdt, "mmu-type", buf); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "riscv,isa", d->arch.guest_isa_st= r); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "device_type", "cpu"); + if ( res ) + return res; + + res =3D fdt_begin_node(fdt, "interrupt-controller"); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", "riscv,cpu-intc"); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#interrupt-cells", 1); + if ( res ) + return res; + + res =3D fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "phandle", alloc_phandle(kinfo)); + if ( res ) + return res; + + /* end of interrupt-controller */ + res =3D fdt_end_node(fdt); + if ( res ) + return res; + + res =3D fdt_end_node(fdt); + if ( res ) + return res; + } + + return fdt_end_node(fdt); +} --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251449; cv=none; d=zohomail.com; s=zohoarc; b=dwQdvrdGDS5rHlNP7IvF4igU2iuCRU0qt4yF5a19njwBwaWetSgD78bZRFgAtBnPjXnaWVtUqw60mLsWMsKAfucaoS+2tNofl8nGzKVpF71XBkL/iybNQodOzmVHUmi/TcrFUDcf6hsD0WZPODz1k5H1nRgCv2QeBG7kK7dSnm4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251449; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:47 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251428; x=1778856228; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fLvC2PpGNSOer61k2601CFg3UXOxaIWR6wu0w95lWf4=; b=gzaj2O2vERQO97xv+7fVNMNjcwRpORuevEuZ72MihGsf3xfVTiN1SdmEDbkRD/xTyp fhspq0WdODITpe0Q9NJLbZFZKD+4EtxlWdzwuNjeJ23mPL1rg/iBebrsJCBz5qDYZwC4 lHlpnkGrqX2K3jS3uogKvuJMhwRiMIR+amLFK2ELPDQTbzc1bDoSGuOoiRB7lSr7sXa9 r+8nsMCPGmULIW3QulQX0tKKWUAa86p1mL9PRAhK+7W2/AkTAk7WJz2KayC0jo+z6m7L 348ackhr+AV2rxSSlu7AyvqzvnR7pj/vS5JCnosm6MAXIQuFk9VM73O+quXuztVvVTFo /Z4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251428; x=1778856228; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=fLvC2PpGNSOer61k2601CFg3UXOxaIWR6wu0w95lWf4=; b=Z+mdSQ2CCvD2cxu+i9ZOUI2gEZjg4UnLvEQJpjT/yrW0oC20f1RoP3rKi6i/gHYrKO 3kiVVC7rTyBtiCM8jWPcD3T0bXerau56KmbAW7iLLjtF+nS015XBbXxxnQK+i5AasZJy 4a73A/6ZTH8az18DlKDFYPc2Aj9tZBTwoYYtS+8lojGjyU2soWRWz3uiQD/W31mOtX4O WYUIdU2cXgOKN7tQ3jOHyovdR/Ixu5I96ODZ9r6lOtCm+yi/urPrr6vonr1yppYCV5SH YfPWZpajAl744Ficy8/z5B03i9Kvx611Snw3J/ch/EWgC3Me1zZ3jXX+mYT3KtRnXMAb nwEA== X-Gm-Message-State: AOJu0YxZx0XbqEiT0+/nYyC3zqhvBlOsrJO8nv3tq8qlzjxZ9HAvyqnF f47C/IZedpTbqfsBVdJlDwlMfVLHajzsTOqHW3Qh4MxBgca2GOegii7og+DkCg== X-Gm-Gg: AeBDiet3fSrE45GdzgchRU55uRbIcJx+MkjhBzINJ3ZsPURcE698fTtwzOq+r2POMFk k+A6Eg/xt+TOpJ+VNMoIwspB1yWEywPqhZl3HSL2PrrfY6JRyNLsuiMWSVoA0ex5CPpO0Nn6npk nN/NAUIuSVquSl4NBUp564DpGTpzQNQ6GAgLOhFlp6qJRoauqhuXGYFDROMTjtMmRFdqrM7gF5O G6q0DtBDisM5pdxySFTuYs2RyftzKd/RNG6qMvEE7MiVrfDHlxwMAzp7BCNStP6a3yn/B75p9dB JfTrKSb+n/ztYcJRFrBO/S7oByoILiTSW3auVHHfSXXC2c6e6Axd2vCoaT4HIgYrlMM4th5i3Hg 27dpSHxUGPTg8Q7XeaA4uogVieBin1k83ac62UjaHuMI6QiEPwge+a2iA+qbjcJ4dyQH3Vrmj9+ lfd6mD41IzZ5rFM5L7vExF8Fic7JBB5Lk7Ry6WhPdPPE9ApStrNMz19qirgh7zx/pNLTtLlm+D5 5bU X-Received: by 2002:a17:906:fd87:b0:bc1:b5ef:7541 with SMTP id a640c23a62f3a-bc85cdada2bmr371439566b.22.1778251427956; Fri, 08 May 2026 07:43:47 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 07/26] xen/riscv: implement make_timer_node() Date: Fri, 8 May 2026 16:43:09 +0200 Message-ID: <24f4c2ba7ab00c31b66108f63e6752a3bed2e0f1.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778251428-28479C48-51C34B81/10/73395122804 X-purgate-type: spam X-purgate-size: 1561 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251451137158500 Content-Type: text/plain; charset="utf-8" Generally, in DT for RISC-V there is a document which describes a timer node (riscv,timer.yaml or sifive,clint.yaml), but the Linux timer driver is declared with TIMER_OF_DECLARE(riscv_timer, "riscv", ...). It matches the CPU node (compatible "riscv"), not the timer node itself. It then calls of_find_compatible_node(NULL, NULL, "riscv,timer") only to read the optional riscv,timer-cannot-wake-cpu property. Since Xen does not care about that property for now, make_timer_node() is implemented to return 0, as no timer node needs to be created for RISC-V guests. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Acked-by: Jan Beulich - Update the commit message. --- --- xen/arch/riscv/domain-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 3063328d96e4..02b293239142 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include =20 @@ -156,3 +157,10 @@ int __init make_cpus_node(const struct domain *d, stru= ct kernel_info *kinfo) =20 return fdt_end_node(fdt); } + +int __init make_timer_node(const struct kernel_info *kinfo) +{ + /* There is no need for timer node for RISC-V. */ + + return 0; +} --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251454; cv=none; d=zohomail.com; s=zohoarc; b=oKnWK7OM4S2hMb1e4Pc/o8Pjy1/0r4hbtxA24pJnqgQXSNzXXRCzZJnFMkphyG3pcLFybCUnvUT4KXVhKqSnGonk5Mr7RIi+Q8YBGp98oc23o5JHT7r6iwjf6bh97eMj7gfybXHAPNHtTbAq3IHJ0I0Xdm9kGbJ/eEiCXtacoos= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251454; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=8yGl4LH5XFe9FwGLjZCEW5kyIYDSUJUrG5QxrUQAt3k=; b=n0/YabcRz+qlVxJL/e5AnbOZ8P1nLFqN9HKKMmux0pKlCfSeuL+aMqNPzHbAh91P/31RzTVUfpwEXmw5BevAMJzehRvwbDT+CsCHJZ3XW0I2gJtxDnl0IAZpbrhifD/NF/1UDRPpZ0uKQc9Qtx13LtLv0QmzL3khqfQJCpyH4g4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778251454729365.3217795193839; Fri, 8 May 2026 07:44:14 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303745.1577056 (Exim 4.92) (envelope-from ) id 1wLMQi-0006dm-F6; Fri, 08 May 2026 14:43:52 +0000 Received: by outflank-mailman (output) from mailman id 1303745.1577056; Fri, 08 May 2026 14:43:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQi-0006dN-7v; Fri, 08 May 2026 14:43:52 +0000 Received: by outflank-mailman (input) for mailman id 1303745; Fri, 08 May 2026 14:43:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQg-0006J3-QL for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQg-007XVC-6p for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:50 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-2 for ; Fri, 08 May 2026 16:43:50 +0200 Received: from [209.85.218.51] (helo=mail-ej1-f51.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a6-af86-0a2a45020019-d155da33a5c7-3 for ; Fri, 08 May 2026 16:43:50 +0200 Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-bc23bebd345so31302266b.1 for ; Fri, 08 May 2026 07:43:50 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:49 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251429; x=1778856229; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8yGl4LH5XFe9FwGLjZCEW5kyIYDSUJUrG5QxrUQAt3k=; b=YlIDZheTxRIsmAZj2iWN6ARrv4uC197sV8MXFaBvPIfPcqeq+0SgqAfvewPD0VA10+ DQkXbwgpzeHMLt2sbTrovV1drcaPsSp6gqYhMXnPUn52d4WGYTtWknRM9pwlIT5gXFGS zVNqvQtDjdvq01DLxsrPcLg+3C7GrPZ/XyiE/1sTNqZTl5rKKpbD/z6iHAVwk0KI5aGX u0hnf8JcnVnAx9PLW6+/AKzbFxwAoH8hyOkVx+gF56kYAr5Ipdp04zeh8+UvaIDFGtA+ Q8H5TFR2uRDi5uQmpC3xbiytPduJ/M+zXqrYjiGfkHh2ZKea5a5JFvAozBhNHrFaku1+ OZfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251429; x=1778856229; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=8yGl4LH5XFe9FwGLjZCEW5kyIYDSUJUrG5QxrUQAt3k=; b=X/+6gUqfJCTcjBgC2nw1lopKvI6Rgo+NG6a17dxGgFEYRmScUzUc/5qLUbmqePmtpP dXOOZwxY4uExVmAh2+IOn2n+Id5WpQ3s3d4EVI8bIY+OGR6HYoyV+CZ9F6vOhvRfpoII FwXAu7JpjpPUBidCvAA4ihS81ebplcJoMfsaotB+QYvNAFZS/eFL7OV5YHB9yGxCjElb uG0XS685PNBvfKL4oudKVWcQGGndK9qR1FSwm135adGjUXIARKf8fDEtj9pGlvsCsF1Q Y7+qBQiSWhSK4/9OSzJtGeds6QTirhl+497IjTaSnnWpz8Wu/pmyLBXs8/1od7o42Uqo WaDA== X-Gm-Message-State: AOJu0YzfNFtIRGWUJT/URXqm/ek8nOy5J6cG+djp4/nFYiAlHhC5KJUL n05lF3P3DvgHYLZIBJkwL5FmOzXoTNlUHMbaTquPl1sv6MabifVkdUzvNNNaIQ== X-Gm-Gg: AeBDieulw6vLzepIwdhvSe6VT0PS/gAV9uGJTsZw+Pr5cl+p8FOz7PnJSPl2jnF5o8R /5h4BXUy+CBg28kntmalSNDZSONkTl6sySY8UYrHrvVOaXbljRNZAaUPvOAWxtiz/hZw7ECgQgY eZ/r6d1g1+usVnxzqqqH0T8OwAGrHv7CW/b7LyOErpJEs6EDIKtGyp5WBs88OnO+HhExM7QPw0t vx8pd8G0oewHIITLw8u6+eLKY0IV5mXuNxnkS0cQ2XVPo9QzJRaBCypMlw+H8zGLsc2iZRyl7sy rNZHh0UcPElJzAAtVr2X4ltQ8dv1v5nfVktLMEzhDoPDqtIFL2syGha4f7fJ0nQOGGXtEM11zbg 1HlPZgM04cIPsbgMLz1pgAr0oCbZ9HAQ0Obx2gCzyBOwKfvWeYH0+ncx6/7sqzps7eLIrVrNWoS MVPZusi++VrNbDSkzoyTxuGodE6KcPrL0FSl4lkx13veZNiMKaQfbSjKW6OFeYo4Yc/w== X-Received: by 2002:a17:907:3f8e:b0:bc5:7c6d:8656 with SMTP id a640c23a62f3a-bc85d0b153bmr241091066b.19.1778251429347; Fri, 08 May 2026 07:43:49 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 08/26] xen/riscv: implement make_arch_nodes() Date: Fri, 8 May 2026 16:43:10 +0200 Message-ID: <92338cb9254da76cccb242154d0617603b856052.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1778251430-A937C161-1AA0B3AA/10/73395122804 X-purgate-type: spam X-purgate-size: 1158 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251455212158500 Content-Type: text/plain; charset="utf-8" No RISC-V-specific nodes need to be created at the moment, so make_arch_nodes() is implemented to simply return 0. It is placed in dom0less-build.c as make_arch_nodes() is only used in the dom0less code path. In the future, it will be extended to create an emulated UART node. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Update the commit message. --- --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index a683972e9235..4cc00012aa8d 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -2,10 +2,18 @@ =20 #include #include +#include #include =20 #include =20 +int __init make_arch_nodes(struct kernel_info *kinfo) +{ + /* No RISC-V specific nodes need to be made, at the moment. */ + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251453; cv=none; d=zohomail.com; s=zohoarc; b=S5gX+t03dIa8/k5VS/W6K+ncSfYMXXmLCplssbE8Yj6ehUDf17IZdSkuoI8/1JTQU1yOzF9GRx7KMyY+lkhhS5pxbWmQN6AxomBVo2KHU13l8Z71GvsFxsQpegBbMaywAT+zE6fbdr0SzY6jjWjZ+sc5NPcy0XGOi2GeeAXiK3Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251453; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=/IQA+KUL5MpZcplutGw2+zZiZhu/Y0nI/Sw/1I/I0ks=; b=MrBC8Zt3KhsBFwDrkJj2kisVz4aKm9V0G06ml+6jaKEAYctrcuV0ihmvxDJ0RNLhlBY/K935nTh3W0iIIAUZ0K8/wigI6pcE6aYIYAYDidU7Bzx13I1AcaM5NUn0CM9AflCZ0sNVKOZxnEIVRc6sMmtpRa98KQCdgiOzkfS1Im0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778251453681367.74746647432903; Fri, 8 May 2026 07:44:13 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303746.1577064 (Exim 4.92) (envelope-from ) id 1wLMQj-0006vi-Uh; Fri, 08 May 2026 14:43:53 +0000 Received: by outflank-mailman (output) from mailman id 1303746.1577064; Fri, 08 May 2026 14:43:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQj-0006ux-Lw; Fri, 08 May 2026 14:43:53 +0000 Received: by outflank-mailman (input) for mailman id 1303746; Fri, 08 May 2026 14:43:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQi-0006aZ-5O for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQh-00A90j-Id for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:51 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a6-bab6-0a2a0a5309dd-0a2a450581d0-2 for ; Fri, 08 May 2026 16:43:51 +0200 Received: from [209.85.218.49] (helo=mail-ej1-f49.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a7-aaa8-0a2a45050019-d155da31a443-3 for ; Fri, 08 May 2026 16:43:51 +0200 Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-b93698bb57aso376275666b.0 for ; Fri, 08 May 2026 07:43:51 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - New patch. --- xen/arch/riscv/aplic.c | 7 +++++-- xen/arch/riscv/include/asm/intc.h | 10 +++++++--- xen/arch/riscv/intc.c | 10 ++++++++-- 3 files changed, 20 insertions(+), 7 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 739e8dab3498..97dc0ef731f0 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -306,12 +306,15 @@ static const hw_irq_controller aplic_xen_irq_type =3D= { =20 static const struct intc_hw_operations aplic_ops =3D { .info =3D &aplic_info, - .init =3D aplic_init, .host_irq_type =3D &aplic_xen_irq_type, .handle_interrupt =3D aplic_handle_interrupt, .set_irq_type =3D aplic_set_irq_type, }; =20 +static const struct intc_hw_init_ops __initdata aplic_init_ops =3D { + .init =3D aplic_init, +}; + static int cf_check aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize, unsigned int *out_hwirq, @@ -347,7 +350,7 @@ static int __init aplic_preinit(struct dt_device_node *= node, const void *dat) =20 dt_irq_xlate =3D aplic_irq_xlate; =20 - register_intc_ops(&aplic_ops); + register_intc_ops(&aplic_ops, &aplic_init_ops); =20 /* Enable supervisor external interrupt */ csr_set(CSR_SIE, BIT(IRQ_S_EXT, UL)); diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index ecdc8a5e6577..8b498e43b33f 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -28,8 +28,6 @@ struct intc_info { struct intc_hw_operations { /* Hold intc hw information */ const struct intc_info *info; - /* Initialize the intc and the boot CPU */ - int (*init)(void); =20 /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; @@ -43,9 +41,15 @@ struct intc_hw_operations { void (*handle_interrupt)(struct cpu_user_regs *regs); }; =20 +struct intc_hw_init_ops { + /* Initialize the intc and the boot CPU */ + int (*init)(void); +}; + void intc_preinit(void); =20 -void register_intc_ops(const struct intc_hw_operations *ops); +void register_intc_ops(const struct intc_hw_operations *ops, + const struct intc_hw_init_ops *init_ops); =20 void intc_init(void); =20 diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index ea317aea5ad8..8649160403f7 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -12,9 +12,13 @@ =20 static const struct intc_hw_operations *__ro_after_init intc_hw_ops; =20 -void __init register_intc_ops(const struct intc_hw_operations *ops) +static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; + +void __init register_intc_ops(const struct intc_hw_operations *ops, + const struct intc_hw_init_ops *init_ops) { intc_hw_ops =3D ops; + intc_hw_init_ops =3D init_ops; } =20 void __init intc_preinit(void) @@ -27,7 +31,9 @@ void __init intc_preinit(void) =20 void __init intc_init(void) { - if ( intc_hw_ops->init() ) + ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); + + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); } =20 --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:51 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251432; x=1778856232; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VYs7BzMQgQ9bDQPKwO/Q6FA4+pq3em84Cw3U2UYtHu8=; b=JPP3VrCJyPqGTPCGipwY/V8+1CR0NfXe7vIZh1DAvZg00vVwaya4JlspAfwKZxRbTy XgosHDB69zEMwrUobrJvm0KvhVOrPJDkIw58gR/uzRNLnpFmih50WnLvUWQgWklmrmP1 jTnCLiUHxPitJcxverdYj5HBT2UhCi5uaiKNvTOyzOiEF4Zo1T+mXCywn711Ng61QmTt zW5ctsktSxFwYw4U69USWnIETRSKTsx9ioUYBsM58IH3nRTd0evp3rgrul5KzIeHX/sZ w1fGNPf/299WSxzFbRSJ3+GI+OinxwjXfFug/xJJY1WjFLxF6MrKIQ0vtE78Nn+ZaF8I DZ2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251432; x=1778856232; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=VYs7BzMQgQ9bDQPKwO/Q6FA4+pq3em84Cw3U2UYtHu8=; b=r/QMKuXZYbSuFSiT3DerUhiAS1iRtYf4GHNKsxOIAyHiQS+72TTsZINvs9v7A1Kv2D hJohHTUJ/an8TmSZRCtzM5kA/qHf6AGls9cXSbVTdYF/hfBJ8jxF5C6x/OjrfVK0pV6N 4ozBvLhc8gax2o6yaZMnO0gxOsvfibwiHHE3IQi67lAt+8BfqLzsvGrptPQqdOfAK6qy WjCkxC4T6au8lXt744GmcxG0YhQlmZkpeVNlsRkkyWxm+uNdc01QMzXrr6f1BSQEcG9h JEjnxfHVWhbhteYeBbpBu4IYeyaWz+ket7hN/1fw4yyQWtINf0jz392b5w8RnkCdTqJP UaPQ== X-Gm-Message-State: AOJu0YzQRKTN43jTeTqfLXairpfMWxiHg5ma4uP0QpH8OaAgUOMKkTYj Y8CwHxN1mZek5drK7smWz5Z+FEfek6iXSAuelw1AVa7J1fnoUlQ8npYNSWkCYw== X-Gm-Gg: AeBDiesLt1JUoItMy0UyO0mj0F7ICGJomy/UxcshMndep+cThA62riU92hBo7LMnckV hudSFh9+Sz8MMQcXkMcssR6aAKV4uMBiBlqKdd4bVGXgLid2cP0AwMT62aLDXtjqRpqbIktnzM2 P/YHKcfhtka6yc0JIfEyqFI/qr22tnmgNPOI/iUhVXYH2CUlrvfNLnu0Ra1eVvpszRS1C8mzZ0G 8J7ojjM0BXb/6u+nWz7JXvDmXTGaMKAYi8HmZ1jnZjmNMJsFMXtNlL05F4+XUJUpWP20g9Zt+/4 eenDjAgcQXXQQjQ05hgBhtzZ8akFkr0egMEQvJusBMzNeWCCabp/vVnwNQO7+QmaOS2m23Hy4Fe Llko7PmdF8tp7l1Kb8IakxcxWNPXeycrMTu4t1IELbSDLl5klEdqbt3P88i4DKN9Q50J4eHTpiH i4O9+3gUUSFyWgM2m5jBX5l1iUeqHqx83szB7IjpQj53eQqStGeJmbp9jnF1Km9mmwkw== X-Received: by 2002:a17:907:a80f:b0:bc6:a223:85fc with SMTP id a640c23a62f3a-bc6a2238a97mr551923466b.36.1778251432116; Fri, 08 May 2026 07:43:52 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 10/26] xen/riscv: implement make_intc_domU_node() Date: Fri, 8 May 2026 16:43:12 +0200 Message-ID: <425157c3414ca95665288fa3788430e96a99e3cd.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1778251432-7CA798B7-CC3832A0/10/73395122804 X-purgate-type: spam X-purgate-size: 3236 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251457253158500 Content-Type: text/plain; charset="utf-8" Introduce a RISC-V specific function to create an interrupt controller Device Tree node for DomU domains during dom0less build. Add make_intc_domU_node() to the dom0less build path and wire it to a new generic helper, intc_make_domu_dt_node(), which delegates DT node creation to the active interrupt controller implementation via vintc_init_ops. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/intc_make_domu_dt_node/make_intc_domU_node. - introduce separate intc_hw_init_ops structure for init operations. - Return -EOPNOTSUPP instead of -ENOSYS. - Drop const for kinfo argument as it could be changed by interrupt controller node creation code. - Refactor make_domu_dt_node(). - Make make_domu_dt_node part of vintc structure as it looks more logical = to be there. --- xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/intc.h | 12 ++++++++++-- xen/arch/riscv/intc.c | 11 +++++++++++ 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index 664b0b9f9129..136d9e816a44 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -98,6 +98,8 @@ struct arch_domain { =20 DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; + + struct vintc *vintc; }; =20 #include diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 8b498e43b33f..70df461a2a51 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -8,14 +8,13 @@ #ifndef ASM__RISCV__INTERRUPT_CONTOLLER_H #define ASM__RISCV__INTERRUPT_CONTOLLER_H =20 -struct dt_device_node; - enum intc_version { INTC_APLIC, }; =20 struct cpu_user_regs; struct irq_desc; +struct kernel_info; =20 struct intc_info { enum intc_version hw_version; @@ -46,6 +45,15 @@ struct intc_hw_init_ops { int (*init)(void); }; =20 +struct vintc_init_ops { + /* Create interrupt controller node for domain */ + int (*make_domu_dt_node)(struct kernel_info *kinfo); +}; + +struct vintc { + struct vintc_init_ops *init_ops; +}; + void intc_preinit(void); =20 void register_intc_ops(const struct intc_hw_operations *ops, diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 8649160403f7..0994deddcb2c 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -73,3 +74,13 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsign= ed int priority) intc_set_irq_type(desc, desc->arch.type); intc_set_irq_priority(desc, priority); } + +int __init make_intc_domU_node(struct kernel_info *kinfo) +{ + struct vintc *vintc =3D kinfo->bd.d->arch.vintc; + + if ( intc_hw_ops && vintc->init_ops && vintc->init_ops->make_domu_dt_n= ode ) + return vintc->init_ops->make_domu_dt_node(kinfo); + + return -EOPNOTSUPP; +} --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251452; cv=none; d=zohomail.com; s=zohoarc; b=d/2vmPeaYZas50M16SKsjTIeu1ILNeiXK/6U+Qw4j6m/pZ5KtjABeGu0dDzCtLub/63nsTXZX2krfU5E2ANW6GxGfRmXoLAF4UzQ+wSnyZkBS9higr6g3Lpkt8uXFR8c++XHYmfCSZhC/mFN2SZJtkfagD9zMYanHISmrugw4CU= ARC-Message-Signature: i=1; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:53 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251434; x=1778856234; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AuQ/dZIZ6GUpQXp8UMUYCyKW7XWo14Gw5sW3GPz0m38=; b=fXOB4eAiVaP2gDuCF3VApR2SYYZK9jd26lwghggHGfuilvx4jsLq3WIAi8ufGuVrlV I88RstgFMlLVA3bk/EjKphV4tiAHovU/+awTXow1KkI7I0Mr8KGb+j4sXtQJWVXK4nhy jjCJN2Gpt6TbmHStXXoy5nvjtYJbdR05J9t0ata4T9cPUekrluY6FfFUIAKfk55u8UUK HOoIVQat2bM4KdbMeqFkgQloOwySYX1CTdYHDZJB9wmSRglSWKruef0qgXzdPJSmizXZ yKlg0SdEIAWSiMJriBFMnX3/P1Bi/3SZT7RzTTM6ir2PGHQbESsdAljzwPA9ENpI/97Q F4Mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251434; x=1778856234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=AuQ/dZIZ6GUpQXp8UMUYCyKW7XWo14Gw5sW3GPz0m38=; b=EiYN3xuW85o4uzClE/5yqyNKcQsqgACcv6snrwUbI7d0axQsjR5jdaBce5KY79WWSw KwYb51JdNYxGUPmTYlRnqfurMc6/ciyTdbRJ+5Jg5qSSQfzwviS4KbzcwkzmYeCaQz1h MtRUcDe6ZOhCWRzeHaiGez7bqOKE3oiW/Vnd3QiO35/HKqzDAxtw9u5/LwrjwjBIPZt7 87NwSJ3hTcV6/6z9/OwUNuoyWwzAovTrrl9y5Vt3/+h/KF6C2krgXGK35v8sX8nrbpDp NgcwrJ5kAMML/oLbvMeXPLe67f0ebT7g9K2Nvlt2zYhFgEsv+U8spjHYL5tisTvH2ImC ko4g== X-Gm-Message-State: AOJu0YwDxxjFN3yjkGq0Wl/GdA0D54OZfusZOrq/h9+4uMgAil4wyN0u AgrSlA3xZ+iSp777n1sJkEia7xNHRy5AquUqnLklO+GVhro3RO49KRrQn709Bw== X-Gm-Gg: Acq92OGHIVtp1tb3GCcELuP+qSQcm3WkXmR+84eHNYYTyGcLkFUdpFItqFUpKee5Z5l F7QeopN66+nipfkBsgR0F6YyZ/cxkKJemsw8LNgejnkcaN8SdiawMtliAaCtkwz7XfWEcACKwBu /xiw+hu9Dv09P9PBtfNS4WYPMHOLH9IyZc/If3jIsC2LERQNsFya6lnpYOx9Qd1wXQC/0Blt+fq oTseRCSbVqz4OULHjPusRNJeQ0YoNAzsFVk7qF7UWY7n53vd+08InVj1aaL2RgYblFXf5n1F+g5 AtGmK6ylEpgzwRP+LqSp85+qp1uOEG/FTMYDIrbgy24q3pgMrZujbjO9bJWCsh5wQRKe3FV/7sY mk3a7U9Iqq8E4npB0XzBnZKbhIHjcsbYttDpoQPJhXnIg6insUObnQR3+0Sb6ZhyAfVM6Qvg/Hs rNo8lrB/PeJ0T4UR/KnJ9auRXHYqQrr8FQzoCFkrd+FP3cNdsn+tNOZUomDrxfYpR5/lm93jvME Y7B X-Received: by 2002:a17:907:c14:b0:bc6:7238:bd57 with SMTP id a640c23a62f3a-bcaa9f590a1mr190536466b.7.1778251433591; Fri, 08 May 2026 07:43:53 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 11/26] xen/riscv: introduce aia_init() and aia_usable() Date: Fri, 8 May 2026 16:43:13 +0200 Message-ID: <66ca7f49756740c3d54ac660bebf406479ed011e.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1778251434-A9971161-45DABEF4/10/73395122804 X-purgate-type: spam X-purgate-size: 2828 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251453432154100 Content-Type: text/plain; charset="utf-8" aia_init() is going to contain all the logic related to AIA initialization. At the moment, it only checks whether the SSAIA extension is available, and if so, sets is_aia_usable (which indicates more than just the availability of the extension) to true; it also signifies that the necessary components (to be introduced in follow-up patches) have been initialized. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - s/is_aia_available/is_aia_usable. - Drop return value for aia_init(). - s/aia_available()/aia_usable(). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aia.c | 23 +++++++++++++++++++++++ xen/arch/riscv/include/asm/aia.h | 10 ++++++++++ xen/arch/riscv/intc.c | 3 +++ 4 files changed, 37 insertions(+) create mode 100644 xen/arch/riscv/aia.c create mode 100644 xen/arch/riscv/include/asm/aia.h diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index fd5e499eb4b9..9df8b72b5494 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,3 +1,4 @@ +obj-y +=3D aia.o obj-y +=3D aplic.o obj-y +=3D cpufeature.o obj-y +=3D domain.o diff --git a/xen/arch/riscv/aia.c b/xen/arch/riscv/aia.c new file mode 100644 index 000000000000..f67f422c5a45 --- /dev/null +++ b/xen/arch/riscv/aia.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +static bool __ro_after_init is_aia_usable; + +bool aia_usable(void) +{ + return is_aia_usable; +} + +void __init aia_init(void) +{ + if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + return; + + is_aia_usable =3D true; +} diff --git a/xen/arch/riscv/include/asm/aia.h b/xen/arch/riscv/include/asm/= aia.h new file mode 100644 index 000000000000..ca42c3086126 --- /dev/null +++ b/xen/arch/riscv/include/asm/aia.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM__RISCV__AIA_H +#define ASM__RISCV__AIA_H + +bool aia_usable(void); + +void aia_init(void); + +#endif /* ASM__RISCV__ACPI_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 0994deddcb2c..a611c9dc5f32 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -9,6 +9,7 @@ #include #include =20 +#include #include =20 static const struct intc_hw_operations *__ro_after_init intc_hw_ops; @@ -34,6 +35,8 @@ void __init intc_init(void) { ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); =20 + aia_init(); + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:54 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251435; x=1778856235; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bJo88tDYRHxEoMYk1G+kL6a6Xp9nCz03PcEHLeEJrNI=; b=DGVXB8rf+bzvO7Y0vPrF96kXYNhOwQnp73HsI4cmT0jg8uxG5RDx273cAkM9EM6TXz 9Ih0gq11Tz1P/di2M5LVx9+PbhdJuaBvhGjTUdRFx8WbDFdvUt4kZkUq+KdSdZLF9CcO b3DVaMC4QDu7qYL7lDwvKXRapX/u9gG0HjBG24QFyKk5MJLGPdINBxq7okDuVpc5ilnY IGSEOr2zK7NU33Te2eR8i8oxZu5LD6zCIcKwmzKfDnwpB3zJBOoEOqAMp0w2ROXcMFGd M6kvQkgwxhoiE+poscz0TI6KXOzsoemgw0/4dLitQVFgMqc5XWeAT4z8Wd6pW14/JSjr wgfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251435; x=1778856235; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=bJo88tDYRHxEoMYk1G+kL6a6Xp9nCz03PcEHLeEJrNI=; b=XYlOL95aAHlY05yvp8oSGQq/Yu9Zv2XLEQsj/I2J2pVS0ylTG+EU+KPvMkKSpGiT9Y BnH5fxZZ16XKaTxtZTUOGfrJCeqg9Tqdrbuu8NdlR4gT90ZnMesqzCCDTWTaTTmFSSYv P9119/AtzbSoHJaBAf2RDrpxgwPwomSJFs6mxKeyFzgrPplgAgd5kL5yOnnoFdejRx4C t/nzAxvo/L4sQOhw32FB5qT6mVLjc0QGz+xWMupEYXCpX29FWV3PcPhht683/gMyud3G DhWy8WPR3cswMQbHj/5Fyd3t7krVtSBeljjBtZimWW08iYrO1rYSoqhmyqVHUFN1cFq4 lftg== X-Gm-Message-State: AOJu0YyNt3epYB+Ojwo3Ii+gu+PaLHiA8lokAHW+P7sFl6OA9ziEld1P /r5q8QusXR8Fbap3fUS8PcwsQWMLBiNjx0yJxQrNSCJxcqwybPHZtFmVl/b5ew== X-Gm-Gg: Acq92OFCJTYkM9yU0IG2c1J97t0Ur0r5YLmzawv75dDhEmi2ygVKQmtjy6NGko7P74n czUaW+1XX2e7CIBaAnjS9iGB1W6PkONNjIDmRcDt/o2bwBRMMn6MNkSmJYwf2Rm8gfXWMCy0xpj Hb4lUbBDacxP3liipw446lQqP/QKAatFvX+5DBaoYJ5ZT9HXOvKQ76aKDW6Iz6G0SpOffabLOOF rbEXE+EnG9HOOeIH7wEUkG6dsWYhJTeSLv7OGEDg2wNOcg/VWPjpVYbUF6bIWxdAHOkFJOcnLYF lLzZpMSsHIOVyVgX2Q4p3hvMAS4q2DirUK2MuUn4nT+tyIfncDT4ijSDhn1kSifl2AXSxTP8MIi 9Q24jvINxSY4FT7iW6Ck/knepenuh/P8NfUTWtnJy2p8tSG809v+oxgvBqXeNLrcpvlHo3szFRn QrzcHGme3N+MJ0DvNDatw8Ta9Q9c+oZD1zMBR4B/0OEyswPrOb0Eis3SeNAI3FysEMeQ== X-Received: by 2002:a17:906:fd87:b0:bc3:a0e9:e0c with SMTP id a640c23a62f3a-bc85c2b4e75mr424411766b.13.1778251435016; Fri, 08 May 2026 07:43:55 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 12/26] xen/riscv: add basic VGEIN management for AIA guests Date: Fri, 8 May 2026 16:43:14 +0200 Message-ID: <61291bec7664e780f122ccf438091dfc1aba99e3.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1778251435-84F63D75-58623B76/10/73395122804 X-purgate-type: spam X-purgate-size: 8137 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251467877154100 Content-Type: text/plain; charset="utf-8" It was decided to add support for IMSIC from the start instead of having AP= LIC operate in direct delivery mode, as it requires a trap-and-emulation approa= ch, which is not optimal from a performance standpoint. AIA provides a hardware-accelerated mechanism for delivering external interrupts to domains via "guest interrupt files" located in IMSIC. A single physical hart can implement multiple such files (up to GEILEN), allowing several virtual harts to receive interrupts directly from hardware. Introduce per-CPU tracking of guest interrupt file identifiers (VGEIN) for systems implementing AIA specification. Each CPU maintains a bitmap describing which guest interrupt files are currently in use. Add helpers to initialize the bitmap based on the number of available guest interrupt files (GEILEN), assign a VGEIN to a vCPU, and release it when no longer needed. When assigning a VGEIN, the corresponding value is written to the VGEIN field of the guest hstatus register so that VS-level external interrupts are delivered from the selected interrupt file. Signed-off-by: Oleksii Kurochko --- Changes in v2: - add static for defintion of vgein_bmp; - Drop declarartion of vgein_bmp from aia.h. - Move declaration of 'struct vgein_bmp' from aia.h to aia.c as all the management is inside aia.c. - Instead of decrement of vgein->geilen just update the wait how it is initialized. - Return -EOPNOTSUPP in vgein_init() instead of BUG_ON(). - Use %u to print unsigned int. - make bmp field in vgein_bmp not a pointer. - allocate owners dynamically. - Drop unnessary blank lines. - use find_first_zero_bit() instead of bitmap_weight() to find a free slot for vgein number. - Drop the section number for the comment. - Start to search from bitnum 1 for free vgein_id, as bitnum 0 is reserved= to tell that no guest extrenal interrupt number is used. Thereby drop vgein= _id++ at the end of vgein_assign(). - s/bitmap_set/__set_bit. - s/bitmap_clear/__clear_bit. - as vgein_init() is needed to be invoked once per CPU being brought up, d= rop __init for it. - Return vgein_id =3D=3D 0 if vgein_id is higher then maximun supported by= h/w VGEIN. - Add check in vgein_relase() that vgein is 0 and if it is there is nothing is needed to do. - Use gdprintk instead of printk() in vgein_{assign,release}. - Add the claryfing comment above geilen field. - Drop ASSERT in vgein_assign() and return just vgein_id =3D 0 in the case= when there is no aviablable h/w VGEINs. - Make vgein_init() static. --- xen/arch/riscv/aia.c | 144 +++++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/aia.h | 8 ++ 2 files changed, 152 insertions(+) diff --git a/xen/arch/riscv/aia.c b/xen/arch/riscv/aia.c index f67f422c5a45..f7f44961e0f5 100644 --- a/xen/arch/riscv/aia.c +++ b/xen/arch/riscv/aia.c @@ -1,11 +1,33 @@ /* SPDX-License-Identifier: GPL-2.0-only */ =20 +#include +#include #include #include #include +#include +#include #include +#include =20 +#include #include +#include +#include + +struct vgein_ctrl { + unsigned long bmp; + spinlock_t lock; + struct vcpu **owners; + /* The least-significant bits are implemented first, apart from bit 0 = */ + unsigned int geilen; +}; + +/* + * Bitmap for each physical cpus to detect which VS (guest) + * interrupt file id was used. + */ +static DEFINE_PER_CPU(struct vgein_ctrl, vgein); =20 static bool __ro_after_init is_aia_usable; =20 @@ -14,10 +36,132 @@ bool aia_usable(void) return is_aia_usable; } =20 +static int vgein_init(unsigned int cpu) +{ + struct vgein_ctrl *vgein =3D &per_cpu(vgein, cpu); + + csr_write(CSR_HGEIE, -1UL); + vgein->geilen =3D flsl(csr_read(CSR_HGEIE) >> 1); + csr_write(CSR_HGEIE, 0); + + printk("cpu%d.geilen=3D%u\n", cpu, vgein->geilen); + + if ( !vgein->geilen ) + return -EOPNOTSUPP; + + vgein->owners =3D xvzalloc_array(struct vcpu *, vgein->geilen); + if ( !vgein->owners ) + return -ENOMEM; + + spin_lock_init(&vgein->lock); + + return 0; +} + +static int cf_check cpu_callback(struct notifier_block *nfb, unsigned long= action, + void *hcpu) +{ + unsigned int cpu =3D (unsigned long)hcpu; + int rc =3D 0; + + switch ( action ) + { + case CPU_STARTING: + rc =3D vgein_init(cpu); + if ( rc ) + printk("AIA: failed to init vgein for CPU%un", cpu); + break; + } + + return notifier_from_errno(rc); +} + +static struct notifier_block cpu_nfb =3D { + .notifier_call =3D cpu_callback, +}; + void __init aia_init(void) { + int rc; + if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + { + dprintk(XENLOG_WARNING, "SSAIA isn't present in riscv,isa\n"); + return; + } + + if ( (rc =3D vgein_init(0)) ) + { + dprintk(XENLOG_ERR, "vgein_init() failed with rc(%d)\n", rc); return; + } =20 is_aia_usable =3D true; + + register_cpu_notifier(&cpu_nfb); +} + +unsigned int vgein_assign(struct vcpu *v) +{ + unsigned int vgein_id; + struct vgein_ctrl *vgein =3D &per_cpu(vgein, v->processor); + unsigned long *bmp =3D &vgein->bmp; + unsigned long flags; + + spin_lock_irqsave(&vgein->lock, flags); + /* + * The vgein_id shouldn't be zero, as it will indicate that no guest + * external interrupt source is selected for VS-level external interru= pts + * according to RISC-V priviliged spec: + * Hypervisor Status Register (hstatus) in RISC-V priviliged spec: + * + * The VGEIN (Virtual Guest External Interrupt Number) field selects + * a guest external interrupt source for VS-level external interrupt= s. + * VGEIN is a WLRL field that must be able to hold values between ze= ro + * and the maximum guest external interrupt number (known as GEILEN), + * inclusive. + * When VGEIN=3D0, no guest external interrupt source is selected for + * VS-level external interrupts. + * + * So start to search from bit number 1. + */ + vgein_id =3D find_next_zero_bit(bmp, vgein->geilen + 1, 1); + + if ( vgein_id > vgein->geilen ) + vgein_id =3D 0; + else + __set_bit(vgein_id, bmp); + + spin_unlock_irqrestore(&vgein->lock, flags); + +#ifdef VGEIN_DEBUG + gprintk(XENLOG_DEBUG, "%s: %pv: vgein_id(%u), xen_cpu%d_bmp=3D%#lx\n", + __func__, v, vgein_id, v->processor, *bmp); +#endif + + vcpu_guest_cpu_user_regs(v)->hstatus &=3D ~HSTATUS_VGEIN; + vcpu_guest_cpu_user_regs(v)->hstatus |=3D + MASK_INSR(vgein_id, HSTATUS_VGEIN); + + return vgein_id; +} + +void vgein_release(struct vcpu *v, unsigned int vgen_id) +{ + unsigned long flags; + struct vgein_ctrl *vgein =3D &per_cpu(vgein, v->processor); + + if ( !vgen_id ) + return; + + spin_lock_irqsave(&vgein->lock, flags); + __clear_bit(vgen_id, &vgein->bmp); + spin_unlock_irqrestore(&vgein->lock, flags); + +#ifdef VGEIN_DEBUG + gprintk(XENLOG_DEBUG, "%s: vgein_id(%u), xen_cpu%d_bmp=3D%#lx\n", + __func__, vgen_id, v->processor, vgein->bmp); +#endif + + vcpu_guest_cpu_user_regs(v)->hstatus &=3D ~HSTATUS_VGEIN; } diff --git a/xen/arch/riscv/include/asm/aia.h b/xen/arch/riscv/include/asm/= aia.h index ca42c3086126..6073c89774bb 100644 --- a/xen/arch/riscv/include/asm/aia.h +++ b/xen/arch/riscv/include/asm/aia.h @@ -3,8 +3,16 @@ #ifndef ASM__RISCV__AIA_H #define ASM__RISCV__AIA_H =20 +#include +#include + +struct vcpu; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:56 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251437; x=1778856237; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6MqW7oYxoiwR9Upy+HAuK/pfkhgDIEYHUh/OodAHs5I=; b=f2ZT5yfq+epYOENha3RXQUVZ9QozLPuaNWB4SRXAlmnhwOlxHK4Tp6bv4YTMvndzEl ljPf6e0x6Vt7xbZFp7UT/u+5pIJ0s0lWjbT91moc7RGjv5mS020EUx8Ap6IBvZXAcGfE aPHrT7f0wU3L93AlNFhIddp5DsVlef6Y7P25sPgcP2wKbhqonfx3wJUW+xy0WZcaMr04 IpEPZNigNEJhIb+wSyUnQPyxNair8KTBk2EZU9qsXdqzIdu6mTRLtr8a1MJI2jZlt3JE z4PyWVqgcxlHUR2oCkQJcPlno0ZBxitBnW0cLIJwBgbzSSQ0pAukFZhNfOkFFVMsxsyB /lLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251437; x=1778856237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=6MqW7oYxoiwR9Upy+HAuK/pfkhgDIEYHUh/OodAHs5I=; b=exwo9fVKvVo4eYwqSjjFlql6Pk7SZXqJjDI1G80F14C9tXp2KWeF5Wdl6+WbDG+wpf abu9hBZ03zODuBGl6dl+4OidpMdA5XanTrdpVPXyfV0D7l4esYZndVLB3rfU5OuAs6vy 1PtGoYi6pCsauzODMNNvn0Utkn1DG6f/A0Ja2G7WHdcfzJjdwTzgt3Rfyn5Ky19tda6h 6WfXxfXjmMTdpto2uCeVRkPKeXAzq7wJh8LtsgqsbJYPxTtFRwyJWP6dRKxxq83vVeKW 0P90J4OpVoxecwZd29MuCsH4QGfd6iAcwiXis8VSfSYuHDO+AIwu8HbNAnARaaBR7GIs ubyA== X-Gm-Message-State: AOJu0YzJVft3vX378F+n5xm9PjeYueDyyM7m6BYrp7KZSgLGmt6KenBm u1VPWxj6iLk3Pmd/MBsmxpytwqUhVlYhIVslMcNdR10BdCkABxuirC4wROf4yw== X-Gm-Gg: Acq92OHyyi38xxW31jF6UorHqWJweFTzHEMXFczFPTuXkXsqLWYZjT7kcU7T7fHuT05 3LC9+iJLLmPTEAotvdQ3k7CZ6rMPX/niRY710PmkDQMPhOkvnvvpbae3T9zA+d4x6ZEK1aOp8rM A1cv1Na3GBMwWqc4gfSDDnLoEC3OHZSoO5jTSWpvCKkojtNVKRYMyUbcMc10LSDmx7YJgpZVcHb AyYZUulvz9361qaduO5axc2WXR/7WiwelSGJhpbGL4ruPJHHFtxEgMVcbGICAMJG36hhqL83a9E 1255hoW9AeY7oh4DLZV984MN0YfFpKulbBFeMyUr1GZQlPX+RKFeqoj4YeA8WkwdN5J9tccY1+Q YLsHC4rmtJGyv8F2FefH2O1W7bn8cPR91GuXhG058XXEPLPqHwnD8qp2roibK3i2Bb8+cXD0HRE tY5PFOX2E/07NevMKSBsO55+cDudwedb0j3DRJHGfo66snfO6lyZXryezEbhrgN07X+Q== X-Received: by 2002:a17:907:9495:b0:bc2:7f6a:e4c5 with SMTP id a640c23a62f3a-bc56ce33c23mr724437866b.25.1778251436435; Fri, 08 May 2026 07:43:56 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 13/26] xen/riscv: introduce per-vCPU IMSIC state Date: Fri, 8 May 2026 16:43:15 +0200 Message-ID: <2471b51e89aff30765433d88b1646c5b2c72b5c2.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1778251437-D917D443-B31D0D0C/10/73395122804 X-purgate-type: spam X-purgate-size: 5109 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251463740154100 Content-Type: text/plain; charset="utf-8" Each vCPU interacting with the IMSIC requires state to track the associated guest interrupt file and its backing context. Introduce a per-vCPU structure to hold IMSIC-related state, including the guest interrupt file identifier and the CPU providing the backing VS-file. Access to the guest file identifier is protected by a lock. Initialize this structure during vCPU setup and store it in arch_vcpu. The initial state marks the VS-file as software-backed until it becomes associated with a physical CPU. Add helpers to retrieve and update the guest interrupt file identifier: - imsic_set_guest_file_id() is going to be used during vCPU creation to initialize IMSIC interrupt controller things for this vCPU. - vcpu_guest_file_id() is going to be used during update of APLIC's target register with the pair of information (to have MSI delivery mode work properly) when guest is trying to access vAPLIC's target register. It will be used in the follow up patches. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rename imsic_state to vimsic_state. - Use 'unsigned int' for vsfile_pcpu. - Drop initialzation of ->guest_file_id as it will be by default zero. - Add the comment about ->guest_file_id field. - Drop __init for vcpu_imsic_init() as it could be used during post-boot vCPU creation. - Update the commit message. - Drop locks around ->guest_file_id() in vcpu_guest_file_id() and imsic_s= et_guest_file_id(). --- xen/arch/riscv/imsic.c | 35 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/imsic.h | 23 +++++++++++++++++++ 3 files changed, 60 insertions(+) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index a4460576f620..8b46419ca23b 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -56,6 +57,16 @@ do { \ csr_clear(CSR_SIREG, v); \ } while (0) =20 +unsigned int vcpu_guest_file_id(const struct vcpu *v) +{ + return ACCESS_ONCE(v->arch.vimsic_state->guest_file_id); +} + +void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file= _id) +{ + ACCESS_ONCE(v->arch.vimsic_state->guest_file_id) =3D guest_file_id; +} + void __init imsic_ids_local_delivery(bool enable) { if ( enable ) @@ -312,6 +323,30 @@ static int imsic_parse_node(const struct dt_device_nod= e *node, return 0; } =20 +int vcpu_imsic_init(struct vcpu *v) +{ + struct vimsic_state *imsic_state; + + /* Allocate IMSIC context */ + imsic_state =3D xvzalloc(struct vimsic_state); + if ( !imsic_state ) + return -ENOMEM; + + v->arch.vimsic_state =3D imsic_state; + + /* Setup IMSIC context */ + rwlock_init(&imsic_state->vsfile_lock); + + imsic_state->vsfile_pcpu =3D NR_CPUS; + + return 0; +} + +void vcpu_imsic_deinit(const struct vcpu *v) +{ + xvfree(v->arch.vimsic_state); +} + /* * Initialize the imsic_cfg structure based on the IMSIC DT node. * diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index 136d9e816a44..42c1db91bd86 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,6 +54,8 @@ struct arch_vcpu { =20 struct vtimer vtimer; =20 + struct vimsic_state *vimsic_state; + register_t hcounteren; register_t hedeleg; register_t hideleg; diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/as= m/imsic.h index c6c59215df20..2b84824cd377 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -11,6 +11,7 @@ #ifndef ASM_RISCV_IMSIC_H #define ASM_RISCV_IMSIC_H =20 +#include #include #include #include @@ -61,7 +62,24 @@ struct imsic_config { spinlock_t lock; }; =20 +struct vimsic_state { + /* IMSIC VS-file */ + rwlock_t vsfile_lock; + /* + * (guest_file_id =3D=3D 0) -> s/w IMSIC SW-file + * (guest_file_id > 0) -> h/w IMSIC VS-file + */ + unsigned int guest_file_id; + /* + * (vsfile_pcpu >=3D 0) =3D> h/w IMSIC VS-file + * (vsfile_pcpu =3D=3D NR_CPUS) =3D> s/w IMSIC SW-file + */ + unsigned int vsfile_pcpu; +}; + struct dt_device_node; +struct vcpu; + int imsic_init(const struct dt_device_node *node); =20 const struct imsic_config *imsic_get_config(void); @@ -71,4 +89,9 @@ void imsic_irq_disable(unsigned int hwirq); =20 void imsic_ids_local_delivery(bool enable); =20 +int vcpu_imsic_init(struct vcpu *v); +void vcpu_imsic_deinit(const struct vcpu *v); +unsigned int vcpu_guest_file_id(const struct vcpu *v); +void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file= _id); + #endif /* ASM_RISCV_IMSIC_H */ --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251471; cv=none; d=zohomail.com; s=zohoarc; b=G2ftJ+l7D674VVonSu90nA1oceVV9uDOkbhEbY5UFDbRx5Pb9Z/gWOHeB81buUaq49GUE0oknDDeLLQ5exN6Qrk8AUUGXgGzoAGouDZ3J7rmdUrSgbGwlEACma757m1IMeBl6fFdLnj4IkWgPoqbuZ8l668+redRRw1S+wXI7RM= ARC-Message-Signature: i=1; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:57 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251438; x=1778856238; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4Y3wyFh809LwLfmzoza0kbwPpO/WboEnvN0kZbUKjhY=; b=DOT+I7UNBTFPwVkGGvfhYfPWCZeadFdCYE15d+A1mYSSt7D3N6+oZIsNUa/1Ac/ZGS YKPHwgk8gbWGp9LV3Iqn+16dIKzsofqnT3o05p7m3QoYkhjDYHsklwpd63Y4wcKMe3Mj ZwEPGNLBfPpcDwaBUOal+It8yCe5Z8SH1XM0K516IdO7mb2oARA2AffEaEcDt2T/JpLw R64UUsBYte8V8wxGHUib7PKpfs5RO8eVoMUm/cN+SOC0H+pPVz+pWMLeNky9wCLsRzh6 sjN35//2bdZFPL34n/OpaDFxC85ukB7KoG/jraxfm5w7Xino2LlJBpIhqsJsc5/AElve RRhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251438; x=1778856238; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=4Y3wyFh809LwLfmzoza0kbwPpO/WboEnvN0kZbUKjhY=; b=Iy+80TsBdpHL8JvZn6nCdykA2wXw34coK2n8z5IcA14ukoVk1R5l3u7i7IaUupakSg jbOdtCw3xnFlcYgBcSWyYCqmZgzTiW06513SlPmt15HhZm3TT5ekvfaCW9jqQ7nUT1Im 0PqeXA+IhMXmQqG/yWQuiO0qbXJ/zYege7YuPsMpIQV+aFVKgQXkQOsUhRYkJxZKCIRj QQsbYqr8HBs15U6A+xRNugNBelUsG2G7HEJ/D7Hshtxfxc5Lgx5GD1b9d5tkA2pGGmwX 2aOMRpM+a2NulSuOPsfdIBCkj6mevg3/VSf37YXY6a4YXTBhRBBPQapXYofLna2c9s2I R6GA== X-Gm-Message-State: AOJu0YwaGmYh7QHEPMO0kgCh/vplVijHMRqsIJUMFBU71ksvH88sXujs f9ELPmjAnyr7pOcNfd/5qz7sYWGmXpB3lB0uWlBD6MMFX4LNcc+g/YpmBt6asA== X-Gm-Gg: AeBDiev+beMyKX1Bt/WbalhmAAfNFOrQeGfaj64W0GaXAbAlOKx26dRlKnj/rM6gJY7 WnevXLsCSof+xwyPkKB9ixVbpWT9bOJRjdl+zxskhBR7CUSkalg2q6HudNpnUZCTeYiqeMeuxiO 2B970wn7JF2DODqZzvw3EOFtq7ef6JguakkZjiptAkYlRUbWmCDPCZHKpWZN0P0HgbyaUPdfnNv wcULa7411GfZHQwHHsVpnTSoTb9SrE7VmZBUhs8F7AV7tYl7xX7W7gsb6TOf7w0WMjRacjEwngu +g4y6fpsqMSY6/s54adnG7BfXHqYo8T9APkn67vsluKcKnHuHSxOJdkIUr8n4A0EtOf1sB6W+j4 /ospAF+StQLA9qcwWDzpxZUIGOXBZIxTqdoZsQO5jEbDNlufOTyjriKXC6XpIF9GH65nqU61Pvr XdrLmVczO6d/LdjxHG6UPW5OXeVifqfwI6MJKOKZBWhVWAs5axvFXkNwX56TeQxWXpJ4tvD7LyG m54 X-Received: by 2002:a17:907:c298:b0:bc4:a75e:1abb with SMTP id a640c23a62f3a-bc56cc2c06bmr790256166b.21.1778251437856; Fri, 08 May 2026 07:43:57 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 14/26] xen/riscv: add very early virtual APLIC (vAPLIC) initialization support Date: Fri, 8 May 2026 16:43:16 +0200 Message-ID: <220cf09814744b8b8136b1e3c35ab982226d3f6f.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778251438-0AD77C48-834605D1/10/73395122804 X-purgate-type: spam X-purgate-size: 9408 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251473634158500 Content-Type: text/plain; charset="utf-8" At the current development stage, only domain vINTC init and deinit operations are required, so implement those first. Initialize vAPLIC's domaincfg to with the interrupt-enable bit set and MSI delivery mode selected as the current solution is exepcted to have always IMSIC, and initialize vintc->ops. Other operations such as emulate_load(), emulate_store(), and is_access() will be needed once guests are running and MMIO accesses to APLIC MMIO range must be handled. These will be introduced separately later. Introduce a structure to describe a virtual interrupt controller (vINTC) and a vintc_ops structure, which provides operations to emulate load and store accesses to interrupt controller MMIOs and to check whether a given address falls within the MMIO range of a specific virtual interrupt controller. The vAPLIC implementation of these operations will be provided later once guests can be run and these operations are actually needed. Introduce these structures here as they are required for the implementation of domain_vaplic_init() and domain_vaplic_alloc(). Also, introduce vcpu_vaplic_init() and init vintc_ops->vcpu_init() with it. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/vcpu/v for function arguments in struct vintc_ops(). - Update the comment above is_access() and drop const for addr argument. - Update to_vaplic() to work with 'struct domain *'. - Drop smsiaddrcfg{h} from vaplic_regs struct as they aren't used for now. - Drop inclusion of xen/schec.h from intc.c. - use result of xvzalloc() as initializer in vpalic_alloc(). - Drop goto in domain_vaplic_init(). - s/XVFREE/xvfree. - s/aplic/vintc. - Drop __init for vcpu_vaplic_init() as it could be called for secondary C= PU bring up. - Drop vaplic_alloc(). - Drop vintc_ops struct, embed callbacks iniside struct vintc. - Introduce and init vintc irqs for vAPLIC. - Introduce intc_irq_nums() to properly initialize number of vAPLIC's irqs. --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 6 +++ xen/arch/riscv/domain.c | 13 ++--- xen/arch/riscv/include/asm/intc.h | 17 ++++++- xen/arch/riscv/include/asm/vaplic.h | 34 +++++++++++++ xen/arch/riscv/intc.c | 7 +++ xen/arch/riscv/vaplic.c | 78 +++++++++++++++++++++++++++++ 7 files changed, 147 insertions(+), 9 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vaplic.h create mode 100644 xen/arch/riscv/vaplic.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9df8b72b5494..9d8d21b65188 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -25,6 +25,7 @@ obj-y +=3D smpboot.o obj-y +=3D stubs.o obj-y +=3D time.o obj-y +=3D traps.o +obj-y +=3D vaplic.o obj-y +=3D vmid.o obj-y +=3D vm_event.o obj-y +=3D vsbi/ diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 97dc0ef731f0..aba9f3945236 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -295,6 +295,11 @@ static void cf_check aplic_set_irq_type(struct irq_des= c *desc, spin_unlock(&aplic.lock); } =20 +static unsigned int cf_check aplic_irq_num(void) +{ + return aplic_info.num_irqs; +} + static const hw_irq_controller aplic_xen_irq_type =3D { .typename =3D "aplic", .startup =3D aplic_irq_startup, @@ -309,6 +314,7 @@ static const struct intc_hw_operations aplic_ops =3D { .host_irq_type =3D &aplic_xen_irq_type, .handle_interrupt =3D aplic_handle_interrupt, .set_irq_type =3D aplic_set_irq_type, + .irq_nums =3D aplic_irq_num, }; =20 static const struct intc_hw_init_ops __initdata aplic_init_ops =3D { diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 041aed176f32..7aa00d6cfd95 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include =20 @@ -155,14 +156,10 @@ int arch_vcpu_create(struct vcpu *v) if ( (rc =3D vcpu_vtimer_init(v)) ) goto fail; =20 - /* - * As interrupt controller (IC) is not yet implemented, - * return an error. - * - * TODO: Drop this once IC is implemented. - */ - rc =3D -EOPNOTSUPP; - goto fail; + ASSERT(v->domain->arch.vintc->ops->vcpu_init); + + if ( (rc =3D v->domain->arch.vintc->ops->vcpu_init(v)) ) + goto fail; =20 return rc; =20 diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 70df461a2a51..3b30d000066a 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -15,6 +15,7 @@ enum intc_version { struct cpu_user_regs; struct irq_desc; struct kernel_info; +struct vcpu; =20 struct intc_info { enum intc_version hw_version; @@ -38,6 +39,8 @@ struct intc_hw_operations { =20 /* handle external interrupt */ void (*handle_interrupt)(struct cpu_user_regs *regs); + + unsigned int (*irq_nums)(void); }; =20 struct intc_hw_init_ops { @@ -50,8 +53,18 @@ struct vintc_init_ops { int (*make_domu_dt_node)(struct kernel_info *kinfo); }; =20 +struct vintc_ops { + /* Initialize some vINTC-related stuff for a vCPU */ + int (*vcpu_init)(struct vcpu *v); + + /* Check if a address is virtual interrupt controller MMIO */ + int (*is_access)(const struct vcpu *v, unsigned long addr); +}; + struct vintc { - struct vintc_init_ops *init_ops; + unsigned int irq_nums; + const struct vintc_init_ops *init_ops; + const struct vintc_ops *ops; }; =20 void intc_preinit(void); @@ -65,4 +78,6 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigne= d int priority); =20 void intc_handle_external_irqs(struct cpu_user_regs *regs); =20 +unsigned int intc_irq_nums(void); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/a= sm/vaplic.h new file mode 100644 index 000000000000..630ca14657f2 --- /dev/null +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + */ + +#ifndef ASM__RISCV__VAPLIC_H +#define ASM__RISCV__VAPLIC_H + +#include +#include + +#include + +struct domain; + +#define to_vaplic(d) container_of(d->arch.vintc, struct vaplic, vintc) + +struct vaplic_regs { + uint32_t domaincfg; +}; + +struct vaplic { + struct vintc vintc; + struct vaplic_regs regs; +}; + +int domain_vaplic_init(struct domain *d); +void domain_vaplic_deinit(struct domain *d); + +#endif /* ASM__RISCV__VAPLIC_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index a611c9dc5f32..122adf78a391 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -78,6 +78,13 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsign= ed int priority) intc_set_irq_priority(desc, priority); } =20 +unsigned int intc_irq_nums(void) +{ + ASSERT(intc_hw_ops && intc_hw_ops->irq_nums); + + return intc_hw_ops->irq_nums(); +} + int __init make_intc_domU_node(struct kernel_info *kinfo) { struct vintc *vintc =3D kinfo->bd.d->arch.vintc; diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c new file mode 100644 index 000000000000..d2ec196668bc --- /dev/null +++ b/xen/arch/riscv/vaplic.c @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + * Copyright (c) Vates + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "aplic-priv.h" + +#define VAPLIC_NUM_SOURCES 96 + +static int cf_check vcpu_vaplic_init(struct vcpu *v) +{ + int rc =3D 0; + unsigned int vgein_id; + + rc =3D vcpu_imsic_init(v); + if ( rc ) + return rc; + + if ( !(vgein_id =3D vgein_assign(v)) ) + { + printk("Software interrupt files aren't supported\n"); + rc =3D -EOPNOTSUPP; + goto fail; + } + + imsic_set_guest_file_id(v, vgein_id); + + return rc; + + fail: + vcpu_imsic_deinit(v); + + return rc; +} + +static const struct vintc_ops vintc_ops =3D { + .vcpu_init =3D vcpu_vaplic_init, +}; + +int __init domain_vaplic_init(struct domain *d) +{ + struct vaplic *vaplic =3D xvzalloc(struct vaplic); + + if ( !vaplic ) + return -ENOMEM; + + d->arch.vintc =3D &vaplic->vintc; + d->arch.vintc->ops =3D &vintc_ops; + + vaplic->regs.domaincfg =3D APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM; + + d->arch.vintc->irq_nums =3D min(intc_irq_nums(), + VAPLIC_NUM_SOURCES + 0U); + + + return 0; +} + +void __init domain_vaplic_deinit(struct domain *d) +{ + struct vaplic *vaplic =3D to_vaplic(d); + + xvfree(vaplic); +} --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - Drop __init for domain_vintc_(de)init(). - Update the commit message. --- xen/arch/riscv/domain.c | 3 +++ xen/arch/riscv/include/asm/intc.h | 3 +++ xen/arch/riscv/intc.c | 36 +++++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 7aa00d6cfd95..6de5b82b3724 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -306,6 +306,9 @@ int arch_domain_create(struct domain *d, if ( (rc =3D p2m_init(d, config)) !=3D 0) goto fail; =20 + if ( (rc =3D domain_vintc_init(d)) ) + goto fail; + return rc; =20 fail: diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 3b30d000066a..89a9c6806e55 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -80,4 +80,7 @@ void intc_handle_external_irqs(struct cpu_user_regs *regs= ); =20 unsigned int intc_irq_nums(void); =20 +int domain_vintc_init(struct domain *d); +void domain_vintc_deinit(struct domain *d); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 122adf78a391..7f9850416bb4 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -11,6 +11,7 @@ =20 #include #include +#include =20 static const struct intc_hw_operations *__ro_after_init intc_hw_ops; =20 @@ -94,3 +95,38 @@ int __init make_intc_domU_node(struct kernel_info *kinfo) =20 return -EOPNOTSUPP; } + +int domain_vintc_init(struct domain *d) +{ + int ret =3D -EOPNOTSUPP; + const enum intc_version ver =3D intc_hw_ops->info->hw_version; + + switch ( ver ) + { + case INTC_APLIC: + ret =3D domain_vaplic_init(d); + break; + + default: + printk("vintc (ver:%d) isn't implemented\n", ver); + break; + } + + return ret; +} + +void domain_vintc_deinit(struct domain *d) +{ + const enum intc_version ver =3D intc_hw_ops->info->hw_version; + + switch ( ver ) + { + case INTC_APLIC: + domain_vaplic_deinit(d); + break; + + default: + printk("vintc (ver:%d) isn't implemented\n", ver); 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Add support for creating an APLIC node when building the guest DT. Provide stub for imsic_make_dt_node() it will be introduced properly in follow-up patch. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - Avoid as max as possible of host properties inheritance. Only number of APLIC's irqs are checked what leads to an introduction of get_aplic_irqs_num(). - Move this patch earlier what leads to an introduction of vimsic_make_domu_dt_node() stub. - s/vimsic_make_domu_dt_node/imsic_make_domu_dt_node. - Refactor vimsic_make_domu_dt_node() to avoid re-usage of APLIC host properties. - Drop next_phandle as it is now in common code. - Drop const for kinfo argument of vimsic_make_domu_dt_node() is is going to be updated inside vimsic_make_domu_dt_node(). - Use introduced before vintc->num_irqs. --- xen/arch/riscv/aplic.c | 2 + xen/arch/riscv/imsic.c | 7 +++ xen/arch/riscv/include/asm/aplic.h | 9 +++ xen/arch/riscv/include/asm/guest-layout.h | 2 + xen/arch/riscv/include/asm/imsic.h | 3 + xen/arch/riscv/vaplic.c | 77 ++++++++++++++++++++++- 6 files changed, 98 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index aba9f3945236..6ed9118485f3 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -12,8 +12,10 @@ #include #include #include +#include #include #include +#include #include #include #include diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index 8b46419ca23b..ceea6778d9dc 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -522,3 +523,9 @@ int __init imsic_init(const struct dt_device_node *node) =20 return rc; } + +int __init vimsic_make_domu_dt_node(struct kernel_info *kinfo, + unsigned int *phandle) +{ + return -EOPNOTSUPP; +} diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/as= m/aplic.h index b0724fe6f360..b42b159496b8 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,7 @@ =20 #include =20 +#define APLIC_DOMAINCFG_RO80 (0x80U << 24) #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) =20 @@ -27,6 +28,14 @@ =20 #define APLIC_TARGET_HART_IDX_SHIFT 18 =20 +#define APLIC_IDC_SIZE 32 + +#define APLIC_MIN_SIZE 0x4000 +#define APLIC_SIZE_ALIGN(x) ROUNDUP(x, APLIC_MIN_SIZE) + +#define APLIC_SIZE(nr_cpus) (APLIC_MIN_SIZE + \ + APLIC_SIZE_ALIGN(APLIC_IDC_SIZE * (nr_cpu= s))) + struct aplic_regs { uint32_t domaincfg; /* 0x0000 */ uint32_t sourcecfg[1023]; /* 0x0004 */ diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/inc= lude/asm/guest-layout.h index 68d95a09394c..9fc990c057f2 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -3,6 +3,8 @@ =20 #include =20 +#define GUEST_APLIC_S_BASE 0xd000000 + #define GUEST_RAM_BANKS 2 =20 /* diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/as= m/imsic.h index 2b84824cd377..604f88db9322 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -78,6 +78,7 @@ struct vimsic_state { }; =20 struct dt_device_node; +struct kernel_info; struct vcpu; =20 int imsic_init(const struct dt_device_node *node); @@ -94,4 +95,6 @@ void vcpu_imsic_deinit(const struct vcpu *v); unsigned int vcpu_guest_file_id(const struct vcpu *v); void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file= _id); =20 +int vimsic_make_domu_dt_node(struct kernel_info *kinfo, unsigned int *phan= dle); + #endif /* ASM_RISCV_IMSIC_H */ diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index d2ec196668bc..3f967464335a 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -9,6 +9,8 @@ */ =20 #include +#include +#include #include #include =20 @@ -19,8 +21,11 @@ =20 #include "aplic-priv.h" =20 +#define VAPLIC_COMPATIBLE "riscv,aplic" #define VAPLIC_NUM_SOURCES 96 =20 +#define FDT_VAPLIC_INT_CELLS 2 + static int cf_check vcpu_vaplic_init(struct vcpu *v) { int rc =3D 0; @@ -47,6 +52,73 @@ static int cf_check vcpu_vaplic_init(struct vcpu *v) return rc; } =20 +static int __init cf_check vaplic_make_domu_dt_node(struct kernel_info *ki= nfo) +{ + int res =3D 0; + void *fdt =3D kinfo->fdt; + unsigned int msi_parent_phandle; + char vaplic_name[128]; + paddr_t aplic_addr =3D GUEST_APLIC_S_BASE; + paddr_t aplic_size =3D APLIC_SIZE(kinfo->bd.d->max_vcpus); + const __be32 reg[] =3D { + cpu_to_be32(aplic_addr >> 32), + cpu_to_be32(aplic_addr), + cpu_to_be32(aplic_size >> 32), + cpu_to_be32(aplic_size), + }; + struct vintc *vintc =3D kinfo->bd.d->arch.vintc; + + res =3D snprintf(vaplic_name, sizeof(vaplic_name), "/soc/aplic@%x", + GUEST_APLIC_S_BASE); + if ( res >=3D sizeof(vaplic_name) ) + { + dprintk(XENLOG_DEBUG, "vaplic name is truncated\n"); + return -ENOBUFS; + } + + res =3D vimsic_make_domu_dt_node(kinfo, &msi_parent_phandle); + if ( res ) + return res; + + res =3D fdt_begin_node(fdt, vaplic_name); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "#interrupt-cells", FDT_VAPLIC_INT_CELL= S); + if ( res ) + return res; + + res =3D fdt_property(fdt, "reg", reg, sizeof(reg)); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "riscv,num-sources", vintc->irq_nums); + if ( res ) + return res; + + res =3D fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", VAPLIC_COMPATIBLE); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "msi-parent", msi_parent_phandle); + if ( res ) + return res; + + res =3D fdt_property_cell(fdt, "phandle", kinfo->phandle_intc); + if ( res ) + return res; + + return fdt_end_node(fdt); +} + +static const struct vintc_init_ops __initdata init_ops =3D { + .make_domu_dt_node =3D vaplic_make_domu_dt_node, +}; + static const struct vintc_ops vintc_ops =3D { .vcpu_init =3D vcpu_vaplic_init, }; @@ -60,13 +132,14 @@ int __init domain_vaplic_init(struct domain *d) =20 d->arch.vintc =3D &vaplic->vintc; d->arch.vintc->ops =3D &vintc_ops; + d->arch.vintc->init_ops =3D &init_ops; =20 - vaplic->regs.domaincfg =3D APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM; + vaplic->regs.domaincfg =3D APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM | + APLIC_DOMAINCFG_RO80; =20 d->arch.vintc->irq_nums =3D min(intc_irq_nums(), VAPLIC_NUM_SOURCES + 0U); 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Add support for generating an IMSIC node when building the guest DT. This allows guests to discover and use the IMSIC interrupt controller. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/imsic_make_reg_property/guest_imsic_make_reg_property. - s/imsic_set_interrupt_extended_prop/guest_imsic_set_interrupt_extended_p= rop. - Use initalizer for regs[] array in imsic_make_reg_property(). - Move buf[] insde the for() loop. - Correct check of returned phandle. - Drop local variable len. - /s/XVFREE/xvfree in imsic_set_interrupt_extended_prop(). - Drop initializer for local variable data. - s/uint32_t/unsinged int for pos and cpu in imsic_set_interrupt_extended_= prop(). - Drop next_phandle as it is now in common code. - Introduce vcpu_imsic_deinit. - Refactor vimsic_make_domu_dt_node() to avoid usage of host IMSIC dt node. --- xen/arch/riscv/imsic.c | 127 +++++++++++++++++++++- xen/arch/riscv/include/asm/guest-layout.h | 2 + 2 files changed, 128 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index ceea6778d9dc..19cbacdf96e1 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -13,9 +13,12 @@ #include #include #include +#include #include +#include #include #include +#include #include #include #include @@ -35,6 +38,11 @@ static struct imsic_config imsic_cfg =3D { .lock =3D SPIN_LOCK_UNLOCKED, }; =20 +static unsigned int __ro_after_init guest_num_msis; + +#define GUEST_IMSIC_COMPATIBLE "riscv,imsics" +#define GUEST_IMSIC_NUM_MSIS 255 + #define IMSIC_DISABLE_EIDELIVERY 0 #define IMSIC_ENABLE_EIDELIVERY 1 #define IMSIC_DISABLE_EITHRESHOLD 1 @@ -291,6 +299,11 @@ static int imsic_parse_node(const struct dt_device_nod= e *node, return -ENOENT; } =20 + if ( dt_property_read_u32(node, "riscv,num-guest-ids", &tmp) ) + guest_num_msis =3D tmp; + else + guest_num_msis =3D imsic_cfg.nr_ids; + if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) || (imsic_cfg.nr_ids > IMSIC_MAX_ID) ) { @@ -524,8 +537,120 @@ int __init imsic_init(const struct dt_device_node *no= de) return rc; } =20 +static int __init guest_imsic_make_reg_property(struct domain *d, void *fd= t) +{ + paddr_t base_addr =3D GUEST_IMSIC_S_BASE; + __be32 regs[4] =3D { + cpu_to_be32(base_addr >> 32), + cpu_to_be32(base_addr), + cpu_to_be32((IMSIC_MMIO_PAGE_SZ * d->max_vcpus) >> 32), + cpu_to_be32(IMSIC_MMIO_PAGE_SZ * d->max_vcpus), + }; + + return fdt_property(fdt, "reg", regs, sizeof(regs)); +} + +static int __init guest_imsic_set_interrupt_extended_prop(struct domain *d, + void *fdt) +{ + unsigned int cpu, pos =3D 0; + uint32_t phandle; + uint32_t *irq_ext; + int res; + + irq_ext =3D xvzalloc_array(uint32_t, d->max_vcpus * 2); + if ( !irq_ext ) + return -ENOMEM; + + for ( cpu =3D 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + + snprintf(buf, sizeof(buf), "/cpus/cpu@%u/interrupt-controller", cp= u); + phandle =3D fdt_get_phandle(fdt, fdt_path_offset(fdt, buf)); + + if ( !phandle ) + { + res =3D -ENODEV; + goto out; + } + + irq_ext[pos++] =3D cpu_to_be32(phandle); + irq_ext[pos++] =3D cpu_to_be32(IRQ_S_EXT); + } + + res =3D fdt_property(fdt, "interrupts-extended", irq_ext, + d->max_vcpus * 2 * sizeof(*irq_ext)); + + out: + xvfree(irq_ext); + + return res; +} + int __init vimsic_make_domu_dt_node(struct kernel_info *kinfo, unsigned int *phandle) { - return -EOPNOTSUPP; + int res; + void *fdt =3D kinfo->fdt; + char vimsic_name[128]; + unsigned int vimsic_phandle; + unsigned int num_msis =3D min(GUEST_IMSIC_NUM_MSIS + 0U, guest_num_msi= s); + + res =3D snprintf(vimsic_name, sizeof(vimsic_name), "/soc/imsic@%x", + GUEST_IMSIC_S_BASE); + if ( res >=3D sizeof(vimsic_name) ) + { + dprintk(XENLOG_DEBUG, "vimsic name is truncated\n"); + return -ENOBUFS; + } + + res =3D fdt_begin_node(fdt, vimsic_name); + if ( res ) + return res; + + res =3D fdt_property_string(fdt, "compatible", GUEST_IMSIC_COMPATIBLE); + if ( res ) + return res; + + res =3D guest_imsic_make_reg_property(kinfo->bd.d, fdt); + if ( res ) + return res; + + res =3D guest_imsic_set_interrupt_extended_prop(kinfo->bd.d, fdt); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "riscv,num-ids", num_msis); + if ( res ) + return res; + + res =3D fdt_property(fdt, "msi-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "#msi-cells", 0); + if ( res ) + return res; + + res =3D fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "#interrupt-cells", 0); + if ( res ) + return res; + + vimsic_phandle =3D alloc_phandle(kinfo); + if ( !vimsic_phandle ) + return -EOVERFLOW; + + res =3D fdt_property_cell(fdt, "phandle", vimsic_phandle); + if ( res ) + return res; + + if ( phandle ) + *phandle =3D vimsic_phandle; + + return fdt_end_node(fdt); } diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/inc= lude/asm/guest-layout.h index 9fc990c057f2..b16ec79c3786 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -5,6 +5,8 @@ =20 #define GUEST_APLIC_S_BASE 0xd000000 =20 +#define GUEST_IMSIC_S_BASE 0x28000000 + #define GUEST_RAM_BANKS 2 =20 /* --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:03 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251444; x=1778856244; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nHhk3cMIRsy4K9vYVYjAVZnf9kJw2uzZP67LAV96DoQ=; b=sYR1yjTRf5W3Qqp8qwoaYeEV8uEk2A5IW8z2EHg5pCOMaRP/dvPS7O8C3GWWrcSX4F LvYblAh6LN4Gvmtx2VVhMzOSOP1Myrx5lgibRsT+DPMUATEfP58Lfey6cRtXroek1exS 2t4wuXNRNvt2xMA+VXvVjMG/B0lDyHSbPf5NCVBO3S87izFfx4HGduX4zVIvcbBWI/Hn tHe2Voy/4hjG3T/WEqhOQ5A3S1hBecL9VcpZTyZjel/mAtDohrYTjOZPLx8JAEdCpALW G8sYCVZNkUfm9q/7Q5ZNkCCv0ECI1snDbVvSa+psdlothe2YqQZpQEPib1vVRgwXi3ZZ 5deQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251444; x=1778856244; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=nHhk3cMIRsy4K9vYVYjAVZnf9kJw2uzZP67LAV96DoQ=; b=VZdMPT95AftAJ07chnRB13yRGjF6+M7aipzlHPMbEqtjGne0FUdHtyCQkuPQry4sUJ JzaZiKlFILCeHDFllfnddivCn2qkRS8+RhUWGr7DdyIRW6poV9MUFVLZRI313FajUkxQ s8CFO0Q4RllEw/SMWsTx9ym/8AXTej2j2MXIFgm8caVW/sOhcGersvoVEU4BVlGzgdMn O62h+DleO98SV8ypso+s+TqgGVGPclwnidR2LbOoJdHo8jEtuSV6tYhJjKCY5W0e1bhp EWuoecocWJesusHLRKzs1/t1TKnbJibkQ/j9kYgjYAOyXHCp8JWjkMrRR0lHy1xwUFEv MUNA== X-Gm-Message-State: AOJu0YyGRXZzfvSLGlqel7RTOqzPb++TU5cRy2NnwRx/iexvnsMFxsob QQjYTr9XsjriCjzwBgrlH+Aj8DUIRVD/5NnavhWh8BkayBP3DLp73t+gvMvCog== X-Gm-Gg: AeBDieuR1iiy4C1M7lf+bNhpfnhZa2t8SD2rlTvGvn3t8UlO5EEIbyG7u8pciQm2plt keN/HNcoy2llTSfXy3hZR03FO1G3NtssqZb3sezXcltdEflW2MFb0xqxdsSYH9cSxLrLzKRjbfZ 4jmSqkE9dqnAhJSgMc/GuGmL8VysOrICaQuooRm7n5fQ1/4XQV16uGLwtRXyl/XDbUK25wwXbsa OTZH/iMoSSo1qPyQbuOb8EricoviBPWgAl37xLM9TBNCNrrot5mvFqsBl6Rwc4n5YUUZGToWuoI RrqL6tEKroGK4yqeGzPrTbn/7NDRO07kJUKN+eF+E9dmOcQjqUzS0vY8U329wjiXfq0CiKP6yiY QkDGd4fNoULYzSJKXgQxUkC6g+YmgZyuR4mNGZlz8+2vJk1pUu+4B6SzrU2P1AFiNf8EpqByL0a UXvnUBaDob+LUIKJu8dkVpQKOwmEeAAPedvBIQ/uuqAj4qhr8PapP7E3fYRC0gfaLEMw== X-Received: by 2002:a17:907:7b96:b0:b9d:6cef:95fc with SMTP id a640c23a62f3a-bc56dd16fb0mr899141466b.35.1778251443460; Fri, 08 May 2026 07:44:03 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v2 18/26] xen: move declaration of map_device_irqs_to_domain() to common header Date: Fri, 8 May 2026 16:43:20 +0200 Message-ID: <2c0099a788abedfb0d6a8041203d93bb745e6bbe.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778251444-0A971C48-374D17EB/10/73395122804 X-purgate-type: spam X-purgate-size: 2159 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251471469158500 Content-Type: text/plain; charset="utf-8" As map_device_irqs_to_domain() is used unconditionally by common part of dom0less code it is moved to common header. fdt-domain-build.h is chosen as map_device_irqs_to_domain() could be also called indirectly in Arm's DOM0-related code. Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/arm/include/asm/setup.h | 3 --- xen/include/xen/fdt-domain-build.h | 13 +++++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/se= tup.h index 0d29b46ea52b..0adfa4993a8f 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -53,9 +53,6 @@ void init_traps(void); int handle_device(struct domain *d, struct dt_device_node *dev, p2m_type_t= p2mt, struct rangeset *iomem_ranges, struct rangeset *irq_rang= es); =20 -int map_device_irqs_to_domain(struct domain *d, struct dt_device_node *dev, - bool need_mapping, struct rangeset *irq_rang= es); - int map_irq_to_domain(struct domain *d, unsigned int irq, bool need_mapping, const char *devname); =20 diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domai= n-build.h index 671486c1c837..8612e98dfda5 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -12,6 +12,7 @@ =20 struct domain; struct page_info; +struct rangeset; struct membanks; =20 typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *p= g, @@ -79,6 +80,18 @@ static inline void set_domain_type(struct domain *d, con= st struct kernel_info *k #endif } =20 +/* + * Retrieves the interrupts configuration from a device tree node and maps + * those interrupts to the target domain. + * + * Returns: + * < 0 error + * 0 success + */ +int map_device_irqs_to_domain(struct domain *d, struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges); + #endif /* __XEN_FDT_DOMAIN_BUILD_H__ */ =20 /* --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:04 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251445; x=1778856245; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XVjEQLF6+ArFax55HjUAv3nB814yKtCQ+By22aNb4VM=; b=Vqq/B0x7CDPzV3UA41uSbxmwuAbOOgcGBSJIsSvItDURjB0izTKNWXie3koB54RCcZ e2d2004553tYDIFROfZ3EF+VidCU9pFBkdZWB8gAoNpLf6QkbIJWu8IOE2aMb8vi3A7X qjUeiUOjdxjK49wq1KUclvfM1PKIz7Oxwno82QTybBzQ7ZV/FtEugcwg6Bbg3puOMyKU +jJCFgIaQHXgXB9WJ8Dl7LsAXguCKc1VNfjyPzKd59QWVZtRkMFTZ4EVBYdj9uuVXaOF SDEj76AB3p2S5oPNqbm9lQdVpFshEn1axDZCQ9tAAiz75sMhSd82lGiQG8Itp2oSVxXY 3mFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251445; x=1778856245; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XVjEQLF6+ArFax55HjUAv3nB814yKtCQ+By22aNb4VM=; b=Lh5VXzDMBA5U94vELI0+xqXnHzpqjStlMmNQyRVj2j7NhCmO5PRWNDhRURo73uhMk+ KONKkGVII1qVQ9JhalU8gU7pQi7VWPe5eplC6Vk7bhMgHrsx2/FMYCUf/GO4IU3I4C1i ElUvSvavEHQwNnpuROPc3Y9iKArEntf5G663DT7ANOMufsglU7oB7no34ObavY5kWkzX 5DJ6RDvVQoczf8tcD/OzSSp1NRo14uawsm3TWvydjaue5kr9VieXpVAGtH5gEJY1shAl i2Rn/1OUWmdai3BQTH/oy+jSZrtBBfAE5QgQWDuUdLSsGK7kEkUKa9ywvdn7jYVsxuDq KsbA== X-Gm-Message-State: AOJu0YyIjqsY7A9A/ySOK9o5ewVuudKkCKoh2iOaCerMn0rlJHairmqf 6f0+0IE5IIyQ2B2EfOEo5plEUVEPmOUCLg+WiqVB7c2zY9rm9Jmvh+d4MtWt3Q== X-Gm-Gg: AeBDieuflP0j8P2M1kK309wlAWhJnQwSLaFFyVAyQykhPmclVOb2Ow/U5HxJCVyQB8A NZ3fKrdarSIgsyJ6T7yCtK/DZmXHavCVUKjSvkBirQQqo14Nb0Thp3aTawqWs8yxlQrzNqpPmvP nSpwLBRFLFeBIAOgQHHybn+fSTPGFDzv/nAJVnUA+ov01wA+Q4LKHzAUOWturNUvDHKJnaVVopi 19sPrrc5/nPAOWgfMKrqgcpnNy0jspey5TKn240NWAWPTgYtgtlNHdgKIMY0G0yx3xdVoqDahwA uWByRpwoB+bNBoga2bYqkA7eGOYKX+dUojtPPVRa925Vqt03yzSUxNN7pkurBxr+kSTbsCKA2Dh yc6zoXbp5979f01bP+JoWB+dgi5kdksS+a5K+4sqTccyoWY5P1IuAiDcMqj3DJd51I5pZHNgJln Tb8f2Pptoikk0y18TAPUf2RD0gnwOb4p91NKJKrpIFU0dEtxGcX3kLaY9DW/KDiGzjgFDSzNSO9 xA4 X-Received: by 2002:a17:907:7b9d:b0:bc3:80a5:5277 with SMTP id a640c23a62f3a-bc56dc16e60mr782938266b.45.1778251444867; Fri, 08 May 2026 07:44:04 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 19/26] xen/riscv: implement IRQ routing for device passthrough Date: Fri, 8 May 2026 16:43:21 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1778251445-8C87AD75-EE5EF4EA/10/73395122804 X-purgate-type: spam X-purgate-size: 15918 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251469588158500 Content-Type: text/plain; charset="utf-8" dom0less device passthrough requires granting guest domains access to device interrupts. Introduce map_device_irqs_to_domain() to enumerate a DT node's interrupt properties, skipping those not owned by the primary interrupt controller (as at the moment I haven't seen usages of it), and map_irq_to_domain() to grant domain access and configure Xen's interrupt descriptor accordingly. Sharing IRQ between domains is rejected. route_irq_to_guest() and release_irq() manage irq_desc ownership for guest-assigned interrupts. Each assignment carries a small irq_guest structure as irqaction::dev_id, recording the owning domain and virtual IRQ number which is 1:1 mapped to physical IRQ number. A per-domain vIRQ allocation bitmap (allocated_irqs in struct vintc), managed by vintc_reserve_virq(), prevents the same vIRQ being claimed twice. With APLIC+IMSIC, guest interrupts are delivered directly by hardware through the IMSIC, bypassing do_IRQ(). The _IRQ_GUEST branch in do_IRQ() is therefore left as BUG() until a platform without direct IMSIC delivery is encountered. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rework IRQ mapping in more common (similar approach to Arm). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 4 + xen/arch/riscv/device.c | 108 ++++++++++++++++++ xen/arch/riscv/include/asm/intc.h | 10 ++ xen/arch/riscv/include/asm/irq.h | 3 + xen/arch/riscv/include/asm/setup.h | 4 + xen/arch/riscv/intc.c | 36 ++++++ xen/arch/riscv/irq.c | 175 +++++++++++++++++++++++++++++ 8 files changed, 341 insertions(+) create mode 100644 xen/arch/riscv/device.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9d8d21b65188..fc6b34661111 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y +=3D aia.o obj-y +=3D aplic.o obj-y +=3D cpufeature.o +obj-y +=3D device.o obj-y +=3D domain.o obj-y +=3D domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) +=3D dom0less-build.init.o diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 6ed9118485f3..1c8fd0145eb2 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -311,9 +311,13 @@ static const hw_irq_controller aplic_xen_irq_type =3D { .set_affinity =3D aplic_set_irq_affinity, }; =20 +/* At the moment there is no difference between guest and Xen ops */ +#define aplic_guest_irq_type aplic_xen_irq_type + static const struct intc_hw_operations aplic_ops =3D { .info =3D &aplic_info, .host_irq_type =3D &aplic_xen_irq_type, + .guest_irq_type =3D &aplic_guest_irq_type, .handle_interrupt =3D aplic_handle_interrupt, .set_irq_type =3D aplic_set_irq_type, .irq_nums =3D aplic_irq_num, diff --git a/xen/arch/riscv/device.c b/xen/arch/riscv/device.c new file mode 100644 index 000000000000..ba78032028af --- /dev/null +++ b/xen/arch/riscv/device.c @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include + +#include + +int map_irq_to_domain(struct domain *d, unsigned int irq, + bool need_mapping, const char *devname) +{ + int res; + + res =3D irq_permit_access(d, irq); + if ( res ) + { + printk(XENLOG_ERR "Unable to permit to %pd access to IRQ %u\n", d,= irq); + return res; + } + + if ( need_mapping ) + { + /* + * Checking the return of vintc_reserve_virq is not + * necessary. It should not fail except when we try to map + * the IRQ twice. This can legitimately happen if the IRQ is share= d. + */ + vintc_reserve_virq(d, irq); + + res =3D route_irq_to_guest(d, irq, irq, devname); + if ( res < 0 ) + { + printk(XENLOG_ERR "Unable to map IRQ%u to %pd\n", irq, d); + return res; + } + } + + dt_dprintk(" - IRQ: %u\n", irq); + + return 0; +} + +/* + * map_device_irqs_to_domain retrieves the interrupts configuration from + * a device tree node and maps those interrupts to the target domain. + * + * Returns: + * < 0 error + * 0 success + */ +int map_device_irqs_to_domain(struct domain *d, + struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges) +{ + unsigned int i, nirq; + int res, irq; + struct dt_raw_irq rirq; + + nirq =3D dt_number_of_irq(dev); + + /* Give permission and map IRQs */ + for ( i =3D 0; i < nirq; i++ ) + { + res =3D dt_device_get_raw_irq(dev, i, &rirq); + if ( res ) + { + printk(XENLOG_ERR "Unable to retrieve irq %u for %s\n", + i, dt_node_full_name(dev)); + return res; + } + + /* + * Don't map IRQ that have no physical meaning + * ie: IRQ whose controller is not APLIC/IMSIC/PLIC. + */ + if ( rirq.controller !=3D dt_interrupt_controller ) + { + dt_dprintk("irq %u not connected to primary controller." + "Connected to %s\n", i, + dt_node_full_name(rirq.controller)); + continue; + } + + irq =3D platform_get_irq(dev, i); + if ( irq < 0 ) + { + printk("Unable to get irq %u for %s\n", i, dt_node_full_name(d= ev)); + return irq; + } + + res =3D map_irq_to_domain(d, irq, need_mapping, dt_node_name(dev)); + if ( res ) + return res; + + + /* + * At the moment there is only one user of map_device_irqs_to_doma= in() + * for RISC-V which calls it irq_ranges =3D=3D NULL. + */ + if ( irq_ranges ) + return -EOPNOTSUPP; + } + + return 0; +} diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 89a9c6806e55..1ff992b6c20b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -13,8 +13,11 @@ enum intc_version { }; =20 struct cpu_user_regs; +struct domain; +struct dt_device_node; struct irq_desc; struct kernel_info; +struct rangeset; struct vcpu; =20 struct intc_info { @@ -32,6 +35,9 @@ struct intc_hw_operations { /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; =20 + /* hw_irq_controller to enable/disable/eoi guest irq */ + const struct hw_interrupt_type *guest_irq_type; + /* Set IRQ type */ void (*set_irq_type)(struct irq_desc *desc, unsigned int type); /* Set IRQ priority */ @@ -63,6 +69,7 @@ struct vintc_ops { =20 struct vintc { unsigned int irq_nums; + unsigned long *allocated_irqs; const struct vintc_init_ops *init_ops; const struct vintc_ops *ops; }; @@ -75,6 +82,7 @@ void register_intc_ops(const struct intc_hw_operations *o= ps, void intc_init(void); =20 void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority); +int intc_route_irq_to_guest(struct irq_desc *desc, unsigned int priority); =20 void intc_handle_external_irqs(struct cpu_user_regs *regs); =20 @@ -83,4 +91,6 @@ unsigned int intc_irq_nums(void); int domain_vintc_init(struct domain *d); void domain_vintc_deinit(struct domain *d); =20 +bool vintc_reserve_virq(const struct domain *d, unsigned int virq); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/= irq.h index f633636dc308..98dd536be86e 100644 --- a/xen/arch/riscv/include/asm/irq.h +++ b/xen/arch/riscv/include/asm/irq.h @@ -49,6 +49,9 @@ void init_IRQ(void); =20 void do_IRQ(struct cpu_user_regs *regs, unsigned int irq); =20 +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname); + #endif /* ASM__RISCV__IRQ_H */ =20 /* diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/as= m/setup.h index 2215894cfbb1..9dbd3a8cbef7 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,6 +5,10 @@ =20 #include =20 +struct domain; +struct dt_device_node; +struct rangeset; + #define max_init_domid (0) =20 void setup_mm(void); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 7f9850416bb4..a24c679c0cf8 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -7,7 +7,9 @@ #include #include #include +#include #include +#include =20 #include #include @@ -86,6 +88,22 @@ unsigned int intc_irq_nums(void) return intc_hw_ops->irq_nums(); } =20 +int intc_route_irq_to_guest(struct irq_desc *desc, + unsigned int priority) +{ + ASSERT(spin_is_locked(&desc->lock)); + + ASSERT(intc_hw_ops->guest_irq_type); + + desc->handler =3D intc_hw_ops->guest_irq_type; + set_bit(_IRQ_GUEST, &desc->status); + + intc_set_irq_type(desc, desc->arch.type); + intc_set_irq_priority(desc, priority); + + return 0; +} + int __init make_intc_domU_node(struct kernel_info *kinfo) { struct vintc *vintc =3D kinfo->bd.d->arch.vintc; @@ -112,6 +130,14 @@ int domain_vintc_init(struct domain *d) break; } =20 + if ( !ret ) + { + d->arch.vintc->allocated_irqs =3D + xvzalloc_array(unsigned long, BITS_TO_LONGS(d->arch.vintc->irq= _nums)); + if ( !d->arch.vintc->allocated_irqs ) + ret =3D -ENOMEM; + } + return ret; } =20 @@ -129,4 +155,14 @@ void domain_vintc_deinit(struct domain *d) printk("vintc (ver:%d) isn't implemented\n", ver); break; } + + xvfree(d->arch.vintc->allocated_irqs); +} + +bool vintc_reserve_virq(const struct domain *d, unsigned int virq) +{ + if ( virq >=3D d->arch.vintc->irq_nums ) + return false; + + return !test_and_set_bit(virq, d->arch.vintc->allocated_irqs); } diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c index 25d329500212..4481ae23aa8e 100644 --- a/xen/arch/riscv/irq.c +++ b/xen/arch/riscv/irq.c @@ -12,11 +12,20 @@ #include #include #include +#include #include +#include =20 #include #include =20 +/* Describe an IRQ assigned to a guest */ +struct irq_guest +{ + struct domain *d; + unsigned int virq; +}; + static irq_desc_t irq_desc[NR_IRQS]; =20 static bool irq_validate_new_type(unsigned int curr, unsigned int new) @@ -192,6 +201,15 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int i= rq) if ( desc->handler->ack ) desc->handler->ack(desc); =20 + if ( desc->status & IRQ_GUEST ) + /* + * As at the moment APLIC + IMSIC is used for guest interrupts will + * be directly passed to guest. But if/when IMSIC won't be availab= le + * all interrupts will go through Xenand here an irq injection + * will be necessary to do. + */ + panic("unimplemented"); + if ( desc->status & IRQ_DISABLED ) goto out; =20 @@ -221,3 +239,160 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int = irq) spin_unlock(&desc->lock); irq_exit(); } + +static inline struct irq_guest *irq_get_guest_info(struct irq_desc *desc) +{ + ASSERT(spin_is_locked(&desc->lock)); + ASSERT(test_bit(_IRQ_GUEST, &desc->status)); + ASSERT(desc->action !=3D NULL); + + return desc->action->dev_id; +} + +static inline struct domain *irq_get_domain(struct irq_desc *desc) +{ + return irq_get_guest_info(desc)->d; +} + +void release_irq(unsigned int irq, const void *dev_id) +{ + struct irq_desc *desc; + unsigned long flags; + struct irqaction *action, **action_ptr; + + desc =3D irq_to_desc(irq); + + spin_lock_irqsave(&desc->lock,flags); + + action_ptr =3D &desc->action; +#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION + for ( ;; ) + { + action =3D *action_ptr; + if ( !action ) + { + printk(XENLOG_WARNING "Trying to free already-free IRQ %u\n", = irq); + spin_unlock_irqrestore(&desc->lock, flags); + return; + } + + if ( action->dev_id =3D=3D dev_id ) + break; + + action_ptr =3D &action->next; + } + + /* Found it - remove it from the action list */ + *action_ptr =3D action->next; +#else + action =3D *action_ptr; +#endif + + /* If this was the last action, shut down the IRQ */ + if ( !desc->action ) + { + desc->handler->shutdown(desc); + clear_bit(_IRQ_GUEST, &desc->status); + } + + spin_unlock_irqrestore(&desc->lock,flags); + + /* Wait to make sure it's not being used on another CPU */ + do { smp_mb(); } while ( test_bit(_IRQ_INPROGRESS, &desc->status) ); + + if ( action->free_on_release ) + xvfree(action); +} + +/* Route an IRQ to a specific guest */ +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname) +{ + struct irqaction *action; + struct irq_guest *info; + struct irq_desc *desc; + unsigned long flags; + int retval =3D 0; + + desc =3D irq_to_desc(irq); + + action =3D xvmalloc(struct irqaction); + if ( !action ) + return -ENOMEM; + + info =3D xvmalloc(struct irq_guest); + if ( !info ) + { + xvfree(action); + return -ENOMEM; + } + + info->d =3D d; + info->virq =3D virq; + + action->dev_id =3D info; + action->name =3D devname; + action->free_on_release =3D 1; + + spin_lock_irqsave(&desc->lock, flags); + + /* + * If the IRQ is already used by someone + * - If it's the same domain -> Xen doesn't need to update the IRQ de= sc. + * For safety check if we are not trying to assign the IRQ to a + * different vIRQ. + * - Otherwise -> For now, don't allow the IRQ to be shared between + * Xen and domains. + */ + if ( desc->action !=3D NULL ) + { + if ( test_bit(_IRQ_GUEST, &desc->status) ) + { + struct domain *ad =3D irq_get_domain(desc); + + if ( d !=3D ad ) + { + printk(XENLOG_G_ERR "IRQ %u is already used by domain %u\n= ", + irq, ad->domain_id); + retval =3D -EBUSY; + } + else if ( irq_get_guest_info(desc)->virq !=3D virq ) + { + printk(XENLOG_G_ERR + "d%u: IRQ %u is already assigned to vIRQ %u\n", + d->domain_id, irq, irq_get_guest_info(desc)->virq); + retval =3D -EBUSY; + } + } + else + { + printk(XENLOG_G_ERR "IRQ %u is already used by Xen\n", irq); + retval =3D -EBUSY; + } + goto out; + } + + retval =3D _setup_irq(desc, 0, action); + if ( retval ) + goto out; + + retval =3D intc_route_irq_to_guest(desc, IRQ_NO_PRIORITY); + + spin_unlock_irqrestore(&desc->lock, flags); + + if ( retval ) + { + release_irq(desc->irq, info); + goto free_info; + } + + return 0; + + out: + spin_unlock_irqrestore(&desc->lock, flags); + xvfree(action); + free_info: + xvfree(info); + + return retval; +} --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:05 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251446; x=1778856246; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+FxagSDdgrsLo5AXSdCU3JK7SOuU6ZhFjOmJK7bJpIQ=; b=Atxru7vTqxSEynVdkYkJYvhIcriXjIBzStCSnxcuF0gvfnJKoc8YNxufbr9ad4VZum 6YIvNiXlVfFxpYnsEZXP5LL9vb++BzKRf1nDNMsczXqwyMxkUmBU0bfr8WexYtq+JMy5 PwYXWOfKJnnWEYpAKczCk9snAIwCiVIlS0wvkSMg9NxeONaJncYNWmWdMB1vYzQyCRYf ilouPAuX7b+/nZ44QoCXhH7xnhaK1RnGdOfrgs3K3WQLfceOUQ5rkaRZUYq74uCZ/dWf nTGxvt3irAQcufQjacuEXbcN8amXXVqTtta76OMlU9JeMMw8sS3Xqd8JbunUj0ZCC7Ut KfiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251446; x=1778856246; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=+FxagSDdgrsLo5AXSdCU3JK7SOuU6ZhFjOmJK7bJpIQ=; b=AsWiLvD0MOYnLHbL7g3cMeicxila+XZ7yUZHWXeSIC2SgNJi88epo14CNFVkLPdFV0 uDcXVjP+xZKMY3Lw5SQdYKeyStw18BhSU7lgox9ZLGf5MZHUFWDZ1Nk4YolfRwrQGdME E9ygYSbTmSsymnIc1cSK+JVIhHdHjQV/1ZI8vSI6lYhj0+A5SGSqZf6yODbTzsfpsFWD 2NDfU9eVKBAdTmoRfBt/CxoyG3Y5isQLZQqXzzObHL3Oa15WzeSt82pJqOOaCupCznOZ xwdbB6HMOeGZhnvZNTDYetT8VJtlUO1FJjc9EFqTzLU4HH7tNlL4NTLZnReyuoLBfV8/ F4Xg== X-Gm-Message-State: AOJu0YzyixuTw/OFIEt+PM8WJ8MR69MuphtEfrZjGe/z4Fm6lPryMH8R rHv8IlN080NLw+8szz/JQIXfNQOLA9v4IzqQfFh2qJHmtJ8C/6lInBDbIACvaw== X-Gm-Gg: Acq92OE8tHbzAhNnl+WqMbO0HyrVm5n2NFNXYkS8mQnJ9BUOEXpXhjuv9XI59sr+sK0 MJCZ5n5agbRR9GnSE9MDYRUl75qboOwuaeIEWXq4mm74jj+lVHLXk5jaBlHb8A0caalZJwrGSC6 is7yQ5etGsHZuLyYyAltxfNDS6Ak0AfrqIaGtE8MIonTX25fQg1BjQlhLFo56Lpj1ifC7BqEQBH y+1H2+/52TA/AoY8jRA+znKCBJYKTNsEAOtySoMMJh7JxNqI+Uf7tM+fAzFyU5y8K9L5TRWXr5D /RbUVEHzZwTbiqbxW6Eo8FfRmO5A541d6orp4qCp8sZd++ZJWbaezdcYNsj101XVV0Lyu9zYa5j RSbetNUQZfe04j8pbZBP+UWoZ0vGJOlJq7qGFAQV2rdq621Gdd/AcwlQtEzIwM2n3N9HtRcmmFp GMTENGnFwYT3mF+K2PlS7HnA/i2SJt8QI/ztQJZtMbT5ohciPzilOUSIBxajuNVyykyQ== X-Received: by 2002:a17:907:709:b0:bb7:beb9:b6d5 with SMTP id a640c23a62f3a-bc56da16349mr853129766b.39.1778251446224; Fri, 08 May 2026 07:44:06 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 20/26] xen/riscv: add missing APLIC register offsets, masks to asm/aplic.h. Date: Fri, 8 May 2026 16:43:22 +0200 Message-ID: <736349477470f316da7020c4c1c7e92e37470d31.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778251447-28678C48-FCBD3EF2/10/73395122804 X-purgate-type: spam X-purgate-size: 2205 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251475941154100 Content-Type: text/plain; charset="utf-8" These definitions are required for correct decoding of APLIC MMIO accesses and target configuration, and will be used by both the physical and virtual APLIC implementations. No functional change is intended by this patch; it only centralises hardware definitions that were previously missing. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/include/asm/aplic.h | 35 ++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/as= m/aplic.h index b42b159496b8..e418fc53433b 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,11 @@ =20 #include =20 +#define APLIC_REG_OFFSET_MASK 0x3fff +#define APLIC_TARGET_IPRIO_MASK 0xff +#define APLIC_TARGET_GUEST_IDX_SHIFT 12 +#define APLIC_TARGET_EIID_MASK 0x7ff + #define APLIC_DOMAINCFG_RO80 (0x80U << 24) #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) @@ -26,6 +31,36 @@ #define APLIC_SOURCECFG_SM_LEVEL_HIGH 0x6 #define APLIC_SOURCECFG_SM_LEVEL_LOW 0x7 =20 +#define APLIC_DOMAINCFG 0x0000 +#define APLIC_SOURCECFG_BASE 0x0004 +#define APLIC_SOURCECFG_LAST 0x0ffc + +#define APLIC_SMSICFGADDR 0x1bc8 +#define APLIC_SMSICFGADDRH 0x1bcc + +#define APLIC_SETIP_BASE 0x1c00 +#define APLIC_SETIP_LAST 0x1c7c +#define APLIC_SETIPNUM 0x1cdc + +#define APLIC_CLRIP_BASE 0x1d00 +#define APLIC_CLRIP_LAST 0x1d7c +#define APLIC_CLRIPNUM 0x1ddc + +#define APLIC_SETIE_BASE 0x1e00 +#define APLIC_SETIE_LAST 0x1e7c +#define APLIC_SETIENUM 0x1edc + +#define APLIC_CLRIE_BASE 0x1f00 +#define APLIC_CLRIE_LAST 0x1f7c +#define APLIC_CLRIENUM 0x1fdc + +#define APLIC_SETIPNUM_LE 0x2000 + +#define APLIC_GENMSI 0x3000 + +#define APLIC_TARGET_BASE 0x3004 +#define APLIC_TARGET_LAST 0x3ffc + #define APLIC_TARGET_HART_IDX_SHIFT 18 =20 #define APLIC_IDC_SIZE 32 --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251478; cv=none; d=zohomail.com; s=zohoarc; b=jboyPcCxSCvrkcwHumdYli17yH7vWIiCZ9s0k92uNV1CEDbgKpjjs7qfGIVpXO3ZDGmh5Df9I7+E/tLJXJENklqt3ybmsuLLNZ6ROIn9wjSd+88gE/g6gBpyM768MT9sh/AVYKxYKj+tAAn8P17HGgOClP4z07uu/IP6RYJ1uZI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251478; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ypGqeSMIpsEAtUnq5oo0oPjqpPE9yld9wwOBLOaULws=; b=DMtr5dfWiPjZaHmXBw9u35I8gqa+45BHxYvymTLt7Vy8MxfUJLVt769KLijaTjgZyjewe6hutZYR/Sz7ZEjsQxBTBDpI99oQK0zodil144P4PmWbjUipphEzGBxTvJ2VJu8c2TkzqccN+EYhC5+FDurBdswj1F6dsO8Qr7E5LHM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 177825147846810.368100665195357; Fri, 8 May 2026 07:44:38 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303805.1577155 (Exim 4.92) (envelope-from ) id 1wLMR4-0002bn-Gb; Fri, 08 May 2026 14:44:14 +0000 Received: by outflank-mailman (output) from mailman id 1303805.1577155; Fri, 08 May 2026 14:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR3-0002Wz-GC; Fri, 08 May 2026 14:44:13 +0000 Received: by outflank-mailman (input) for mailman id 1303805; Fri, 08 May 2026 14:44:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQz-0001g9-9w for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQy-007XaD-LF for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:08 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a0-2eae-0a2a0a5409dd-0a2a450197ec-16 for ; Fri, 08 May 2026 16:44:08 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6b8-c1f2-0a2a45010019-d155da35b4a7-3 for ; Fri, 08 May 2026 16:44:08 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bc1f3a393c0so315224166b.0 for ; Fri, 08 May 2026 07:44:08 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:07 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251448; x=1778856248; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ypGqeSMIpsEAtUnq5oo0oPjqpPE9yld9wwOBLOaULws=; b=RZVmaaXSsI1eouCkJO+DfP8NVU1jHQbBU+v6wpGdRMAut6BMS9BHFC/tVzbAao7lEc GXEwlZ3FMr8R3yxZtJzdAdiaIHnbfqtXNAC8IXp2XnkJ4Q4kuwshJAC4MtofjhnhxlIE MPCb+SnqjO3MicnCugnecqX50Z9hwZzOxoMW6TxX1qNNqbvJCr40/qZaUglipmUwG7SX W+iJ5sY6BTvEBAVuxkDI6+S95m6LSfwsiWxiGCgOnLN+CCfEAAg9ykyyh+pAJHS9IXpL ET6jfqIm87Uw52eyucnShjqtqJVrYJRDtM9JQgpKRfSc8RqDCc5N1Yv0TotTQys+W+5p U3VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251448; x=1778856248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ypGqeSMIpsEAtUnq5oo0oPjqpPE9yld9wwOBLOaULws=; b=l+mYpHLUbgH7JRTGurJSgPd9ZBqrXLd0JGLSxbK2uFc8y782lLcxnO94bwmwpq4RLA 3FetMk/pb4l9D8OgmQAipwi4fSYiADkmov55sc9dn1blRGSClCjp2bMnMxR/PG65zyGi hjDydiAsJLzC7yrD/5rSEvfQyE98lzjQQalxvxFGW34DIYmhhPn/0bo7P0YW038LJSSi UZe8l+ub7OwlmxO9dDb2l3/RqQyjrs6aVYJ+gjoBmdwMdPqTFB4FBDqmZJOxsxO8NKVm Nwgew8FWCvyr4+a2wb9oIQFldx/DgTizv8KAOw9ry9GMOhtCuMzbRHuSDXc+Y79flwjo lzIg== X-Gm-Message-State: AOJu0YyuntDJYNxbR6ZPW5eYhBESVDDkQQ9NlxbkbYI81tT8GNkRAB1B fv0sycMLZMUG7KRT6O8rMCyQf22MyWF8tMuxZcKZJnUeqZbvfv4lcJpQReuR0w== X-Gm-Gg: AeBDietpzsnQFEtwELna2yTA+s1YlqtzSP5O+MqNRXkbNtI4sLxxelT8wM7tRlCxojv bc4pCQ5urvqnmeJJEzLE/MRd66+6J5P9A6DD8ef8FVJNH0qsoOcDC0+Dy9vFi0RWcRTm5Olw8nY N47jFQpQ0VnkstsDbs2t0wUF5KC38zPu+J9SnGL4C1ptvwu9Kp/37H6PYTUeYuP9NGT1pebOa2x NIWpnLbfDjsXQnOIJ6e5BhN6QdqaDn3S2dlJyG+wmJHLOwPS/SHL2Dxo4rCEbCbHsg3WtDk9mMb Ra2N8UP28jO9M1X3CHiF4/sourFEQVYQNVy+JwH+uj7feH+0P2LUd1mVMXWo9hPJFGMtLCtJdUa wXaZ4GZL3VzLMe+ABYx0ofaUOWbXLyStFKkuObqh49hmSRskQ8XVTZskNJFOeEBa8lbvFXUNfik 3x/EXPcm+KiP5Ks/HkxGRne/BWEdK9wPYNCy/LchdiYIB+9q0YiUQk0A9EmQEfzBkUMg== X-Received: by 2002:a17:906:7944:b0:bb7:be3b:ba3e with SMTP id a640c23a62f3a-bc56e01902emr696376966b.45.1778251447589; Fri, 08 May 2026 07:44:07 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 21/26] xen/riscv: implement virtual APLIC MMIO emulation Date: Fri, 8 May 2026 16:43:23 +0200 Message-ID: <434e0be590bc0550e143836edff7e8e1e96b28c1.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1778251448-B5D41FF4-6A9FE513/10/73395122804 X-purgate-type: spam X-purgate-size: 16474 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251479732158500 Content-Type: text/plain; charset="utf-8" Guests running under Xen program interrupt routing by writing to APLIC MMIO registers. Xen must intercept these accesses to enforce interrupt isolation between domains and to translate guest routing intent into the underlying physical MSI topology. Writes are gated by the domain's authorised interrupt bitmap so that a guest cannot affect interrupts it does not own. TARGET register writes additionally require translation of the hart and IMSIC guest-file indices from virtual to physical, as the APLIC uses these fields directly to compute the MSI delivery address. Delegation (APLIC_SOURCECFG_D) is not yet supported. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - Merge the following patches into one: xen/riscv: add vaplic access check: - Add check that address is properly aligned. - Check vaplic range intead of APLIC one. - Return bool from vaplic_is_access instead of int. xen/riscv: emulate guest writes to virtual APLIC MMIO - Drop CALC_REG_VALUE. - Use unsigned int instead of uin32_t for offset. - s/.../subtracting in the comment. - start one line comments from the upper case. - Check the value before being written to sourcecfg register. - 'unsigned int' for loop index. - Omit unneessary braces. - s/vaplic_update_target/aplic_msi_target_gen. - Use IMSIC_MMIO_PAGE_SHIFT instead of 12 in aplic_msi_target_gen(). - Drop explicit usage of APLIC register in store function. - Drop APLIC_REG_{GET,SET} macros and introudce APLIC specific funtci= ons. - Ignore write to SOURCECFG_BASE when value is out-of-range. - Drop ASSERT(!target_vcpu) inside handler of targer register setting, just avoid such writings + debug message. - domain_crash() instead of panic() in the case of default case. - Drop ASSERT() in APLIC_SOURCE_CFG_BASE case and use domain_crash() instead. xen/riscv: emulate guest reads from virtual APLIC MMIO: - s/regval_to_irqn/regindx_to_irqn. - pass to to_vaplic() a domain instead of vintc. - add check that load access is aligned. - instead of panic() just crash a domain(). - use 'unsigned int' for local variable offset. - Return 0 in the case APLIC_CLRIE_BASE ...APLIC_CLRIE_LAST reading to follow AIA spec. - Drop explicit usage of physical APLIC registers. --- xen/arch/riscv/aplic.c | 25 +++ xen/arch/riscv/include/asm/aplic.h | 9 + xen/arch/riscv/include/asm/intc.h | 10 +- xen/arch/riscv/include/asm/vaplic.h | 3 + xen/arch/riscv/vaplic.c | 289 +++++++++++++++++++++++++++- 5 files changed, 333 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 1c8fd0145eb2..1976733dfbaa 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -40,6 +40,31 @@ static struct intc_info __ro_after_init aplic_info =3D { .hw_version =3D INTC_APLIC, }; =20 +uint32_t aplic_hw_read_reg(unsigned int offset, uint32_t mask) +{ + unsigned long flags; + uint32_t val; + + ASSERT(offset < aplic.size); + + spin_lock_irqsave(&aplic.lock, flags); + val =3D readl((void __iomem *)((uintptr_t)aplic.regs + offset)) & mask; + spin_unlock_irqrestore(&aplic.lock, flags); + + return val; +} + +void aplic_hw_write_reg(unsigned int offset, uint32_t value) +{ + unsigned long flags; + + ASSERT(offset < aplic.size); + + spin_lock_irqsave(&aplic.lock, flags); + writel(value, (void __iomem *)((uintptr_t)aplic.regs + offset)); + spin_unlock_irqrestore(&aplic.lock, flags); +} + static void __init aplic_init_hw_interrupts(void) { unsigned int i; diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/as= m/aplic.h index e418fc53433b..7905db9876d4 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,8 @@ =20 #include =20 +#define APLIC_NUM_REGS 32 + #define APLIC_REG_OFFSET_MASK 0x3fff #define APLIC_TARGET_IPRIO_MASK 0xff #define APLIC_TARGET_GUEST_IDX_SHIFT 12 @@ -24,6 +26,8 @@ #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) =20 +#define APLIC_SOURCECFG_D BIT(10, U) + #define APLIC_SOURCECFG_SM_INACTIVE 0x0 #define APLIC_SOURCECFG_SM_DETACH 0x1 #define APLIC_SOURCECFG_SM_EDGE_RISE 0x4 @@ -71,6 +75,8 @@ #define APLIC_SIZE(nr_cpus) (APLIC_MIN_SIZE + \ APLIC_SIZE_ALIGN(APLIC_IDC_SIZE * (nr_cpu= s))) =20 +#define APLIC_SETCLR_OFFSET_MASK ((32 * sizeof(uint32_t)) - 1) + struct aplic_regs { uint32_t domaincfg; /* 0x0000 */ uint32_t sourcecfg[1023]; /* 0x0004 */ @@ -114,4 +120,7 @@ struct aplic_regs { uint32_t target[1023]; /* 0x3008 */ }; =20 +uint32_t aplic_hw_read_reg(unsigned int offset, uint32_t mask); +void aplic_hw_write_reg(unsigned int offset, uint32_t value); + #endif /* ASM_RISCV_APLIC_H */ diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 1ff992b6c20b..641c83125a5b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -64,7 +64,15 @@ struct vintc_ops { int (*vcpu_init)(struct vcpu *v); =20 /* Check if a address is virtual interrupt controller MMIO */ - int (*is_access)(const struct vcpu *v, unsigned long addr); + bool (*is_access)(const struct vcpu *v, unsigned long addr); + + /* Emulate load to virtual interrupt controller MMIOs */ + int (*emulate_load)(const struct vcpu *vcpu, unsigned long addr, + uint32_t *out); + + /* Emulate store to virtual interrupt controller MMIOs */ + int (*emulate_store)(const struct vcpu *vcpu, unsigned long addr, + uint32_t in); }; =20 struct vintc { diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/a= sm/vaplic.h index 630ca14657f2..0fa690fcb2d7 100644 --- a/xen/arch/riscv/include/asm/vaplic.h +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -26,6 +26,9 @@ struct vaplic_regs { struct vaplic { struct vintc vintc; struct vaplic_regs regs; + + paddr_t regs_start; + paddr_t regs_size; }; =20 int domain_vaplic_init(struct domain *d); diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index 3f967464335a..57c3433ba03b 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -26,6 +26,283 @@ =20 #define FDT_VAPLIC_INT_CELLS 2 =20 +#define AUTH_IRQ_BIT(d, irqn) ( \ + ((irqn) <=3D (d)->arch.vintc->irq_nums) && \ + test_bit(irqn, (d)->arch.vintc->allocated_irqs) ) + +#define regindx_to_irqn(reg_val) ((reg_val) / sizeof(uint32_t)) + +static inline uint32_t generate_auth_mask(const struct domain *d, + unsigned int irqsn) +{ + if ( irqsn >=3D DIV_ROUND_UP(d->arch.vintc->irq_nums, + sizeof(uint32_t) * BITS_PER_BYTE) ) + { + dprintk(XENLOG_DEBUG, "incorrect irqsn(%d) is passed\n", irqsn); + + return 0U; + } + + return *((uint32_t *)d->arch.vintc->allocated_irqs + irqsn); +} + +static int vaplic_emulate_load(const struct vcpu *vcpu, + const unsigned long addr, uint32_t *out) +{ + const struct domain *d =3D vcpu->domain; + const struct vaplic *vaplic =3D to_vaplic(d); + const unsigned int offset =3D addr & APLIC_REG_OFFSET_MASK; + uint32_t auth_mask; + unsigned int i; + + switch ( offset ) + { + case APLIC_DOMAINCFG: + *out =3D vaplic->regs.domaincfg; + + return 0; + + case APLIC_SETIPNUM: + case APLIC_SETIPNUM_LE: + case APLIC_CLRIPNUM: + case APLIC_SETIENUM: + case APLIC_CLRIENUM: + case APLIC_CLRIE_BASE ... APLIC_CLRIE_LAST: + /* + * Based on the RISC-V AIA spec a read of these registers + * always returns zero + */ + *out =3D 0; + + return 0; + + case APLIC_SETIP_BASE ... APLIC_SETIP_LAST: + case APLIC_CLRIP_BASE ... APLIC_CLRIP_LAST: + case APLIC_SETIE_BASE ... APLIC_SETIE_LAST: + i =3D regindx_to_irqn(offset & APLIC_SETCLR_OFFSET_MASK); + auth_mask =3D generate_auth_mask(d, i); + + break; + + case APLIC_TARGET_BASE ... APLIC_TARGET_LAST: + /* + * As target registers start for 1: + * 0x3000 genmsi + * 0x3004 target[1] + * 0x3008 target[2] + * ... + * 0x3FFC target[1023] + * It is necessary to calculate an interrupt number by substracting + * of APLIC_GENMSI instead of APLIC_TARGET_BASE. + */ + i =3D regindx_to_irqn(offset - APLIC_GENMSI); + + if ( !AUTH_IRQ_BIT(d, i) ) + { + *out =3D 0; + + return 0; + } + + auth_mask =3D ~0U; + + break; + + default: + gdprintk(XENLOG_WARNING, "Unhandled APLIC read at offset %#x\n", + offset); + + domain_crash(vcpu->domain); + + return -EINVAL; + } + + *out =3D aplic_hw_read_reg(offset, auth_mask); + + return 0; +} + +static uint32_t aplic_msi_target_gen(const struct vcpu *target_vcpu, + uint32_t base_val) +{ + const struct imsic_config *imsic =3D imsic_get_config(); + unsigned int guest_id =3D vcpu_guest_file_id(target_vcpu); + unsigned long hart_id =3D cpuid_to_hartid(target_vcpu->processor); + unsigned long group_index; + unsigned int hhxw =3D imsic->group_index_bits; + unsigned int lhxw =3D imsic->hart_index_bits; + unsigned int hhxs =3D imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT= * 2; + unsigned long base_ppn =3D imsic->msi[hart_id].base_addr >> IMSIC_MMIO= _PAGE_SHIFT; + + group_index =3D (base_ppn >> (hhxs + IMSIC_MMIO_PAGE_SHIFT)) & (BIT(hh= xw, UL) - 1); + + base_val &=3D APLIC_TARGET_EIID_MASK; + base_val |=3D guest_id << APLIC_TARGET_GUEST_IDX_SHIFT; + base_val |=3D hart_id << APLIC_TARGET_HART_IDX_SHIFT; + base_val |=3D group_index << (lhxw + APLIC_TARGET_HART_IDX_SHIFT); + + return base_val; +} + +static int cf_check vaplic_emulate_store(const struct vcpu *vcpu, + unsigned long addr, uint32_t valu= e) +{ + int rc =3D -EINVAL; + const struct domain *d =3D vcpu->domain; + unsigned int offset =3D addr & APLIC_REG_OFFSET_MASK; + + switch ( offset ) + { + case APLIC_SETIP_BASE ... APLIC_SETIP_LAST: + case APLIC_CLRIP_BASE ... APLIC_CLRIP_LAST: + case APLIC_SETIE_BASE ... APLIC_SETIE_LAST: + case APLIC_CLRIE_BASE ... APLIC_CLRIE_LAST: + { + unsigned int irqn =3D regindx_to_irqn(offset & APLIC_SETCLR_OFFSET= _MASK); + value &=3D generate_auth_mask(d, irqn); + + break; + } + + case APLIC_SOURCECFG_BASE ... APLIC_SOURCECFG_LAST: + if ( value & APLIC_SOURCECFG_D ) + { + rc =3D -EOPNOTSUPP; + + dprintk(XENLOG_ERR, "APLIC_SOURCECFG_D isn't supported\n"); + + goto fail; + } + + /* + * As sourcecfg register starts from 1: + * 0x0000 domaincfg + * 0x0004 sourcecfg[1] + * 0x0008 sourcecfg[2] + * ... + * 0x0FFC sourcecfg[1023] + * It is necessary to calculate an interrupt number by subtracting + * of APLIC_DOMAINCFG instead of APLIC_SOURCECFG_BASE. + */ + if ( !AUTH_IRQ_BIT(d, regindx_to_irqn(offset - APLIC_DOMAINCFG)) ) + /* Interrupt not enabled, ignore it */ + return 0; + + if ( value > APLIC_SOURCECFG_SM_LEVEL_LOW ) + { + gdprintk(XENLOG_ERR, + "value(%u) is incorrect for sourcecfg register\n", va= lue); + + return 0; + } + + break; + + case APLIC_TARGET_BASE ... APLIC_TARGET_LAST: + { + struct vcpu *target_vcpu =3D NULL; + + /* + * Look at vaplic_emulate_load() for explanation why + * APLIC_GENMSI is subtracted. + */ + if ( !AUTH_IRQ_BIT(d, regindx_to_irqn(offset - APLIC_GENMSI)) ) + /* Interrupt not enabled, ignore it */ + return 0; + + for ( unsigned int i =3D 0; i < vcpu->domain->max_vcpus; i++ ) + { + struct vcpu *v =3D vcpu->domain->vcpu[i]; + + if ( v->vcpu_id =3D=3D (value >> APLIC_TARGET_HART_IDX_SHIFT) ) + { + target_vcpu =3D v; + break; + } + } + + if ( !target_vcpu ) + { + dprintk(XENLOG_ERR, "Invalid vCPU id in target register\n"); + + /* Ignore such writings */ + return 0; + } + + value =3D aplic_msi_target_gen(target_vcpu, value); + + break; + } + + case APLIC_SETIPNUM: + case APLIC_SETIPNUM_LE: + case APLIC_CLRIPNUM: + case APLIC_SETIENUM: + case APLIC_CLRIENUM: + if ( !value || !AUTH_IRQ_BIT(d, value) ) + return 0; + + break; + + case APLIC_DOMAINCFG: + /* + * TODO: + * The domaincfg register has this format: + * bits 31:24 read-only 0x80 + * bit 8 IE + * bit 7 read-only 0 + * bit 2 DM (WARL) + * bit 0 BE (WARL) + * + * The most interesting bit for us is IE(Interrupt Enable) bit. + * At the moment, at least, Linux doesn't use domaincfg.IE bit to + * disable interrupts globally, but if one day someone will use it + * then extra actions should be done. + */ + + printk_once("%s: Ignore writes to domaincfg as it is set by aplic " + " during initialization in Xen\n", __func__); + + return 0; + + default: + goto fail; + } + + aplic_hw_write_reg(offset, value); + + return 0; + + fail: + domain_crash(vcpu->domain, + "Unhandled APLIC write at offset %#x (value %#x)\n", offs= et, + value); + + return rc; +} + +static bool cf_check vaplic_is_access(const struct vcpu *vcpu, + unsigned long addr) +{ + const struct vaplic *vaplic =3D to_vaplic(vcpu->domain); + paddr_t start =3D vaplic->regs_start; + paddr_t end =3D vaplic->regs_start + vaplic->regs_size; + + if ( addr & 0x3 ) + { + dprintk(XENLOG_DEBUG, + "APLIC MMIO address should be properly aligned\n"); + + return false; + } + + /* check if it is an APLIC access */ + if ( start <=3D addr && addr < end ) + return true; + + return false; +} + static int cf_check vcpu_vaplic_init(struct vcpu *v) { int rc =3D 0; @@ -54,19 +331,24 @@ static int cf_check vcpu_vaplic_init(struct vcpu *v) =20 static int __init cf_check vaplic_make_domu_dt_node(struct kernel_info *ki= nfo) { + struct domain *d =3D kinfo->bd.d; int res =3D 0; void *fdt =3D kinfo->fdt; unsigned int msi_parent_phandle; char vaplic_name[128]; paddr_t aplic_addr =3D GUEST_APLIC_S_BASE; - paddr_t aplic_size =3D APLIC_SIZE(kinfo->bd.d->max_vcpus); + paddr_t aplic_size =3D APLIC_SIZE(d->max_vcpus); const __be32 reg[] =3D { cpu_to_be32(aplic_addr >> 32), cpu_to_be32(aplic_addr), cpu_to_be32(aplic_size >> 32), cpu_to_be32(aplic_size), }; - struct vintc *vintc =3D kinfo->bd.d->arch.vintc; + struct vintc *vintc =3D d->arch.vintc; + struct vaplic *vaplic =3D to_vaplic(d); + + vaplic->regs_start =3D GUEST_APLIC_S_BASE; + vaplic->regs_size =3D aplic_size; =20 res =3D snprintf(vaplic_name, sizeof(vaplic_name), "/soc/aplic@%x", GUEST_APLIC_S_BASE); @@ -121,6 +403,9 @@ static const struct vintc_init_ops __initdata init_ops = =3D { =20 static const struct vintc_ops vintc_ops =3D { .vcpu_init =3D vcpu_vaplic_init, + .is_access =3D vaplic_is_access, + .emulate_store =3D vaplic_emulate_store, + .emulate_load =3D vaplic_emulate_load, }; =20 int __init domain_vaplic_init(struct domain *d) --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:08 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251449; x=1778856249; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2I+oddooa9AtYM/3fWA2kwT7rhEB1jpQvIHH/BXdEDw=; b=OjABRNRkgfw2DLXeTrM74ciDwTGdhFQXE7aXPSju8zPbT6JU9KLj0RyGsU71Z7tkXo 1YxVwbMNLkPUNsaBA4WqxDjI8/xEg1PV7yOM7ltp0E0RLQXsE8lkjVaS4JqI66QlmgvH 2dHPNuawWCe70ITi69GXqi49AhZfs2/PzsLi6jRNWj9eASc88F2s2RU8tn8UafUWGu6N QFfDtULQ0TYNXa3yNcH7dtrdhz6PdYF+ckvHrSENlkOj8QUdcqAr9Drjz9/7StqI4yLU uNXRpCyy2ODkOfy+KvbB5H9if3t/UnWIt1TTISS3yoKLwNORySvsmBmp/eHD3Xy5QvFj SuXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251449; x=1778856249; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=2I+oddooa9AtYM/3fWA2kwT7rhEB1jpQvIHH/BXdEDw=; b=gFah+JctzMYdhTqcxGT/ZvZqrTEoa5LvFu/J391NmqKOEOoiIgWkNwgiOYg4Ag+goj zWnF+HR3XHzurI5nKPt/Gw0D0bGP8rs4pbRHUOTXxacuUwws0RkPoFWYYExNlbpamt7O EZ+dQSSxsRUZ2kG+Qpqk/7bv8kP2V38yBUccqnDCjhEvy4iFnPxoUxFmrkZQo8OozTWo q+xgrw+PVkVPdWMwu7Mc0q+6ik2fI7AYTS/5FA1vYKzkLgn90ezDrw48ZhN0tYynV6UC c7H88Br9bzLmJM1k1BVc/NdQ0mNtc29qmSrysunos6VyON/43o+Po8bnSOl1d7EKNA7W +O0A== X-Gm-Message-State: AOJu0Yyqk+irlkdoFhqBO7rc39X61sn+omstqtLP9ADrPfgehxjw4xRQ hJvYuu3Y0/twLJCRUhFyhqkjpEWEdNFT1EOY59D4sBg3VpeAaIbgQqyDT0M9uQ== X-Gm-Gg: AeBDietR6Q6kr+ptO94MkWqvfQxhS59PQT6K65GRY+cpV9XeiQ4gdbfEtH99ZZIlLRO ogv/G2gKxx61RfUs5f+6wYbwgwZtp0lSngdj/iRPo8wmggR2mzAa+Qxr9JFWDrwFu/acS9GdhhE FptOwycuBXh8AO/ppmNwNDYqNdgDgj+mAbQ5o5QnBYIJxDWqdrP1KUtuFmpTtwBODqa9Z2SiOYk GNAST0RE5DjIdUJ5SiUBlV/GX18DvBnqEmccH6kqyXfPNKr2A7W1MEo3LdfT4YK5w4ewxkOPIqw zkxLS47phMMYG4NZE0JxMDnqUjxnbJ0brpZcXNQRD9ReDfFOYdAErMkTLAud4JEZXlCifoBE9le 5FYtC/bN5s2VlR7iWHdroU3He+Q4+gsWnd04u68lBl2OMhWo/Xe/w2ON2GCepstae49YypVARaP FgHpT8Se+nX+tYRgco3oRB0rmJSEb8/ZEgDx0dYLw2T1saa2bRXSB2oneMqmgen1JcNLPi/sL19 ULF X-Received: by 2002:a17:906:ef0c:b0:bc3:5164:bc1 with SMTP id a640c23a62f3a-bc56ad30ebfmr785929066b.10.1778251448965; Fri, 08 May 2026 07:44:08 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 22/26] xen/riscv: implement init_intc_phandle() Date: Fri, 8 May 2026 16:43:24 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1778251449-28F753FF-0A2F673C/10/73395122804 X-purgate-type: spam X-purgate-size: 1316 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251483618158500 Content-Type: text/plain; charset="utf-8" Implement init_intc_phandle() to read phandle of interrupt controller node and save it in kernel->phandle_intc for the future usage during creation of guest interrupt controller node. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/dom0less-build.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index 4cc00012aa8d..a1fa51b996a7 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -4,9 +4,26 @@ #include #include #include +#include =20 #include =20 +int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, + const int node_next, const void *pfdt) +{ + if ( dt_node_cmp(name, "intc") =3D=3D 0 ) + { + uint32_t phandle_intc =3D fdt_get_phandle(pfdt, node_next); + + if ( phandle_intc !=3D 0 ) + kinfo->phandle_intc =3D phandle_intc; + + return 0; + } + + return 1; +} + int __init make_arch_nodes(struct kernel_info *kinfo) { /* No RISC-V specific nodes need to be made, at the moment. */ --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251479; cv=none; d=zohomail.com; s=zohoarc; b=F3SJeHYRI4+HHtomLgMFqk1k0kpxgn+wxV2J3nldJIUPvb9Ov1Icec6uofkzfQ4XvKk9k345EHKJh3UoA0CiaEyE9q5x9WlTNpaPGeUnS9yt6CGn5psdYu42lFb8PKZLrZXNF0kYMr/ogBt5czK6KSZUKfWE/ukJC1LIvzjg9Ss= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251479; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ertjGZ7ExX36oGia4x9/eFNEbUiupI/fuIemGmFcgEY=; b=Ef4LoCZQ00UeqTB03WP508AjQKGMf+JtXZqPe9iejFC2X7STrjlLeIOREfek8IdnOIojJ1dfCWjXeBmIt6YIEqalh88EzcrylNh0PHDu5KpSmGu6+ndDfF5S0UbDQXy8mMjNGU3NK+32+5orCwM2A8pcWN2HsgWVD2S0YDL8zsU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778251479207251.97932498755517; Fri, 8 May 2026 07:44:39 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303811.1577172 (Exim 4.92) (envelope-from ) id 1wLMR8-0003Up-TA; Fri, 08 May 2026 14:44:18 +0000 Received: by outflank-mailman (output) from mailman id 1303811.1577172; Fri, 08 May 2026 14:44:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR7-0003Pi-Gw; Fri, 08 May 2026 14:44:17 +0000 Received: by outflank-mailman (input) for mailman id 1303811; Fri, 08 May 2026 14:44:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR1-0002Ba-UH for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR1-007XaD-9g for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:11 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-32 for ; Fri, 08 May 2026 16:44:11 +0200 Received: from [209.85.218.44] (helo=mail-ej1-f44.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bb-af86-0a2a45020019-d155da2cd8c6-3 for ; Fri, 08 May 2026 16:44:11 +0200 Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-bad54961385so338805566b.2 for ; Fri, 08 May 2026 07:44:11 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:10 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251450; x=1778856250; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ertjGZ7ExX36oGia4x9/eFNEbUiupI/fuIemGmFcgEY=; b=VGt9nPTk2Xc+KduTDtcjO6CemAQvzMsOwyAA90KbWOPp7YDzI+uzEkfCr/6DmYtjA7 hIitIcKdv0RlfpInpEaGPA2sgQ5kyO5hIlQVOA+ZFLaPgLfN0D8I8UnMHPMV2EfEuA06 eDOx6pIFx5dF1zG/tiksO/oXFEov3RRNrIdu20Y6hZqCjrGfYPuBMayqlZDg9s/f/vrD 5AXhNeva/yGcfu0LPPhn/XhwLRFrcSm1ycRCN+ca1Na5uEGbs/q20MAr7mYqZw47IXLi IJxIpL8XeVCeWHYj6n18kEctmYkCpCLYxsmG4k0Ryv/pmUvY/ADOEahIRuWFS2j0zH0D LYCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251450; x=1778856250; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ertjGZ7ExX36oGia4x9/eFNEbUiupI/fuIemGmFcgEY=; b=KOahV26yWyUhqI/c2kFTyl2dwWWW71iBb/GDZeQCEQjGPSY7OhFXpwxtZK059K67/0 NGbeppTfzARETkRq5a0gHT8nyY7j7by8F7fIAdBeIz6bYTpxu1TtAw4vdndQk7loGIgM UcRDhc4F7ry6k6NE10y/ys7nyxNOecIGasRTsZCxqV+4+DMued7yCJq0sUtJBZKU3xwU rueSHkGltFqYJey1zip0RQWpP1WEA9tc2u9Zgx1wMlXXUWqWKsOjnNvgu+DHDAM3DnkZ NuZJ+6pbLscIdmm+9UZ9uTyYc7vZIkgEfZWejsD0ig1BXktpLHVsu/LMqJnThGa90yoG Ncxw== X-Gm-Message-State: AOJu0YxYvjsD1kw1RlysXvxbVu0CLAuQCS0glCK5YFCbeesZBrhS0twX 8c8qZGz7m8tcvzeimhgkpVKQC+t/y/mhnTAmKoRfNyZADd/uoNSge6cmyfzt9Q== X-Gm-Gg: AeBDievFQqWARrxi52wjBstJACzmIY0id+9DJq1YeJtL3ZvR+/ipF7kiqZlJlw8VxMH yUiGzIBQxWLQO54kwQ+ZQ6fNKGjbWFA1XK32c9SqWbMug9l/lbuj2rG5zU+iS85EtR9RUZetw2y VcO4lgmvXJsFUmy7QveM2UOl2aYh+OB14P1TqsmTxWF9rDuUtZjNaFTjC1BLD9P+wB6/JBsdPp/ bK6zZeNJ39TWqCq/nJg5y3rYSSKhpcVjNDsWGtWt0/NRz0ZW0T3tJIBdTRADgK0l8AdWhOmPrNz 9LRlyG5wjedti9tM+B53y0aNsyY7Zwsxc63OQjGT6hNfyErVEALuGw0/+eBi44UN/zi4okefPKy RGKdZnOtGFZn7ZF18WAmZnfRddYaz6vzfKqJlM/SK6QTb4ifMwRQzpTSOBwD2G/FHo9g0k7yaSa k82/KD+es4IBk6tR+wc14eTV571viHaAKX/tGdJ1t6MPZ3l3MNXyYF7HAzLGeqIWbypTYWu+yO9 ADu X-Received: by 2002:a17:907:c308:b0:bbe:7709:5a8a with SMTP id a640c23a62f3a-bc56ae2ca2dmr824426166b.7.1778251450322; Fri, 08 May 2026 07:44:10 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 23/26] xen/riscv: initialize RCU, scheduler, and system domains in start_xen() Date: Fri, 8 May 2026 16:43:25 +0200 Message-ID: <824f8624bf920d0e7f558a07ace58bfc18a44788.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1778251451-80D7F161-705ECF3C/10/73395122804 X-purgate-type: spam X-purgate-size: 1383 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251481984154100 Content-Type: text/plain; charset="utf-8" Wire up the missing early-boot initialization steps in start_xen(). The scheduler must be initialized prior to do_initcalls() because cpupool_create_pool() is called during initcalls; without it, BUG_ON(IS_ERR(pool)) is triggered inside cpupool_create_pool(). Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. Several patches were folded into one. --- xen/arch/riscv/setup.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 56a0907a855f..c3e98733ebc3 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -6,9 +6,12 @@ #include #include #include +#include #include #include #include +#include +#include #include #include #include @@ -156,12 +159,21 @@ void __init noreturn start_xen(unsigned long bootcpu_= id, =20 timer_init(); =20 + rcu_init(); + + setup_system_domains(); + local_irq_enable(); =20 console_init_postirq(); =20 guest_mm_init(); =20 + scheduler_init(); + set_current(idle_vcpu[0]); + + do_initcalls(); + printk("All set up\n"); =20 machine_halt(); --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251487; cv=none; d=zohomail.com; s=zohoarc; b=i/Vt1YXEVhXIjH5yvv+ZPX3KGWvLMrBMYVoF2ccJm2UxtBdb3Uc0+afzk85somzzeE93asYqVTcKTn2DDVoTqS/cje+j9Oos8I3RBTjPJ1Y3llyJE1vDu6SFEctBmeypMaL204QqKaDF2aaRiP9PWIskNHa+yg8pyjiNwKevZtY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251487; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=E4BfOntXbfM6hbvWE7lSKCrx+ZAzvsim2jXEiAgi4uM=; b=Pn7coY75/zp+sKlxLATSvwmUPK3L+Y/i9ZBzzynXadHXB2j08eKP1fIaP4cXVZ6xaGdZPdNVL0NT+QVu1U6RyUvPsLwk7hGvksLBODrb7OeshBTlnGymfN0vQPa1EJVKFQytAskvN7I7JD6wzpNemb0jqfHbk13RFHwQ0FrJTDQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778251486915782.1480632792519; Fri, 8 May 2026 07:44:46 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303819.1577177 (Exim 4.92) (envelope-from ) id 1wLMRA-0003p6-76; Fri, 08 May 2026 14:44:20 +0000 Received: by outflank-mailman (output) from mailman id 1303819.1577177; Fri, 08 May 2026 14:44:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR9-0003jz-5g; Fri, 08 May 2026 14:44:19 +0000 Received: by outflank-mailman (input) for mailman id 1303819; Fri, 08 May 2026 14:44:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR3-0002WB-Cl for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR2-005krU-OQ for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:12 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a6-bab6-0a2a0a5309dd-0a2a450581d0-44 for ; Fri, 08 May 2026 16:44:12 +0200 Received: from [209.85.208.45] (helo=mail-ed1-f45.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bc-aaa8-0a2a45050019-d155d02dd96c-3 for ; Fri, 08 May 2026 16:44:12 +0200 Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-67c566cb519so3921629a12.3 for ; Fri, 08 May 2026 07:44:12 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:11 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251452; x=1778856252; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=E4BfOntXbfM6hbvWE7lSKCrx+ZAzvsim2jXEiAgi4uM=; b=Eli6dke/Yb1Gcx949CcdjOP/2aG8KObUrHpa74thBJonYsWK0lmZdCz10zCyVbs0OL g8T49CwCiG+HORGXrs3QvN3SnVaKPknMXjMPDq+Ho2wmcAqsu08iS0B1cyVAMFWfpOAx XdRvTdL82LLAuUDOuv/ei2xPJIWOaGSm+hSNfbQGmTtFtx20hAon6M44Chek5szhz9US y5qiiFi8s9e/qP5DpudNgiGlJvW31bNAiaYC0Gw+UhCPkyffXdxfDZxOTImnrynLigqG b7yGNqPizXf4bJWJmZJRp2jWiIR/hHvzSBZRMDgjb8JC9uowcXJRWZVqSLq6pK8ouppN hCzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251452; x=1778856252; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=E4BfOntXbfM6hbvWE7lSKCrx+ZAzvsim2jXEiAgi4uM=; b=k6Q5rP11QqPQaRKYS5Gpoaf6SbgR6xWANhrbDyMXpam74dKz6rRQouKptyZcUjomeA xA22rJbIl/kwwNvKPnUDC/nt/5/trgAjMDExmiSZxSMBVmhN7FnC38PKpbSFhbvr/DoW 9wqSOpwy3ni6KX2sPLOi+EiebjvsB2PiaTs94EE5qWdaTIeoLRbUghecjDuYM8SaOgU6 OFC31otNMRzAcHnRuvbVr4Y2bF5ksB6fZIRgNAYFO4OrOuPFHavOfKBWpe5fdsoDsg+v elM3FuOyRQyrYpuIsiEq7r8s3Fdmv8+HD8yXBjtuwe6Kllv7nO9yFimubfujXMAp44W3 rCfQ== X-Gm-Message-State: AOJu0Yz/vZC9r9z4E5bGUTQa+kKxCUy10SLKOuZArZB6JKX5d6E5RyOq tegLz5pM+2J+7u92E3wwdZNgcR43W8QO22sV8CXUIlyDsupio5J6UzMnQBoshw== X-Gm-Gg: AeBDievk4hZXhKw8B/jXBAL+sHW8T8GTXc12tLrfob/2qAxNtmvGN6xzwL+bX5+yGog p1aJ7MDA2it0kOYlBC5FDCWjyrwnOTwTCOmqn1WbT8dZCvCSpda1ujC9KOPOOKFP+mYOX01K3q8 F19uwtcAsk1wmDcmWRkqAd/P4ak5oi0bsh0EN4J+HkDm5LqtF1dCNXFyz2TOIbbtz7scfNfeLOv lc/2Tl+oRxZBpxfV7F+0Dv2w99PH3jIvtZO8zLHzZHGTQQPjHXEUae3Fss41WxU+HoT8vSwRv02 a6OvMSKttI7+WSB27F5X68kJAFmUwf9j8x2yu79EitJl+B2fHkqeE7LmN6k9TKlXTN9MmQkFqGK Aeb/ADpF+ORLfE3sR3/EkowGRxFUnrJnIahPs+CO6lOT9FrhpwBEaRvhbjKj7yNsw/1UcT1t78k EoKx1jjaXgDWGtaobgCyp8le5/mvAh7uKadfxxw+U740n5chIAJ7OxQ6gsdoEUphXxZw== X-Received: by 2002:a17:907:1c97:b0:bc5:284:4abc with SMTP id a640c23a62f3a-bc56e602671mr783846766b.45.1778251451674; Fri, 08 May 2026 07:44:11 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 24/26] xen/riscv: provide init_vuart() Date: Fri, 8 May 2026 16:43:26 +0200 Message-ID: <6cf8cb552c146629375294861450b0e9619043d7.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1778251452-DAF6E443-554099D4/10/73395122804 X-purgate-type: spam X-purgate-size: 1328 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251487707158500 Content-Type: text/plain; charset="utf-8" For debug purpose is enough to have only print messages from guest what is now implemented in vsbi_legacy_ecall_handler(). For full guesst console support it will better to have something similar to [1], thereby there is nothing specific should be done, at least, for now and init_vuart() is provided to make dom0less code buildable. [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602041533440.317= 5371@ubuntu-linux-20-04-desktop/ Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index a1fa51b996a7..d1a51b92936a 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -8,6 +8,14 @@ =20 #include =20 +int __init init_vuart(struct domain *d, struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + /* Nothing to do at the moment */ + + return 0; +} + int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, const int node_next, const void *pfdt) { --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778251477; cv=none; d=zohomail.com; s=zohoarc; b=PbU+NYNJ88IeIPwVGSv2DpLQTB0xgQztbJfrOYXKXWqysjih34CoNjlreJ4/0ZJx+89/vYMqX26UAE2fsTzvZgsUO7iYlqv9bL7Mz/2SEMMaFR/u1XUBjdJXu/fa3pcpAdVfFD34uffksQbEQ64dl7btK0Td+gzowBsssud3pOo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778251477; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=h7g7YWRnnxNXf98txapITWcoUSeH2RyR+2XFUir70YQ=; b=dnDfEtqFI/YJQ/a0Dei/JIuPa0+7Wm/rHMeXk8dZZFX+KChfibj9Dh57hzFi0bY+hw5QZdOvjfxrTQ9pmqDtFHdIoDYjaAIPuPn5uVwuoQ2Y4+d2Plb7GU3x1xsHVFO5LG+SJPx3/JReq0ykqbh06wikRPyc9W53GTPog2/hb6s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778251477248935.6983949956468; Fri, 8 May 2026 07:44:37 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1303824.1577189 (Exim 4.92) (envelope-from ) id 1wLMRC-0004B3-26; Fri, 08 May 2026 14:44:22 +0000 Received: by outflank-mailman (output) from mailman id 1303824.1577189; Fri, 08 May 2026 14:44:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMRA-000427-SJ; Fri, 08 May 2026 14:44:20 +0000 Received: by outflank-mailman (input) for mailman id 1303824; Fri, 08 May 2026 14:44:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR4-0002gH-As for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR3-007XaD-M5 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:13 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-42 for ; Fri, 08 May 2026 16:44:13 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bd-af86-0a2a45020019-d155da35e4fd-3 for ; Fri, 08 May 2026 16:44:13 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bb91b426e40so355083466b.0 for ; Fri, 08 May 2026 07:44:13 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:12 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251453; x=1778856253; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h7g7YWRnnxNXf98txapITWcoUSeH2RyR+2XFUir70YQ=; b=h12DAhvTQDbofpF74lUVsmxOZwe9wnVk77ILIeESh7Qji9eKhUtMcy4H/BWJ/eh0nn aol6Q0ybCqepbbQLwVp1BTByU3U9zIlWj02xdzH9BtB+cEuLe9koYvq3j+xy6hlFn0AJ oJKDdvhsMO9klaYTAUhEDhEp8VQqbOo/uS2GHZty4pai0Igx8ndERFWPdyoMCy/6Ie4C 8ZXq/Gd/N1tNJk2CVwtT49UkCScshfRIcDgaMDRduTKY9KdEoFebTCX1gcN4VGgcHKjc fmeqT01m6dBlqQdMcNhfuAdcCQswShidbNFl/YcxF5kM+c1QLfDVGGRD6gSpZIQc1UOP sFSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251453; x=1778856253; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=h7g7YWRnnxNXf98txapITWcoUSeH2RyR+2XFUir70YQ=; b=RzobHA92PvPXQ672gQYcGmeEFwWw/jM9inPQdm+8Ptxx+57HGF9RVQqFekTwAwJR0G C7P2SqvtuR0Rb8fGZvMyWxol4W6EY5FNkUGgq9rc0fahSfQ0TVf1XoC5vQzGidHTcnE2 bLrJrNmsK11GF2PVqjp7bkhQAREuG6Q3WmsmVvVhqf+iJYpLJ3DePzcy1IHbJ3sKaq6E Vk+imVJ1YeUH6xrBcgK05QRPDxL+zRxQc6BUqBzGsw06cxnplT3kp2BIG2jvXCw1CZSX uMHvN8isD1Sik58MQpL+fhblCPoPOnv3EVPHr2IWlYl2zmJamSGdZ4bK+cicwdkpLLlO 9skQ== X-Gm-Message-State: AOJu0YxkzTcrI7QKtNAYDcnrR4WAEIonfXKDy4Bgh5vJA3QBtKG0Z5yZ i2WiBGN7RcADIrxdlFViuUszEAuHE3yWsoKXanMVmTkkhM50LY8X6UnTJfYV3A== X-Gm-Gg: AeBDievQt6hgFRSWWxBdWu4IjDKoApVuGUEzd7Sy0/1/Z3nbjQSnywIUL78Qchl8OdF UXNyHw/GK9KuBaYePscyKG7UFAK07WbFnl7SgnL31euIuYmszDQCKgLFUsFkGDZ1kMJyo/twxBe vnq7WSuCUpN1ixM+jagQBjw0Ej75l4jz5HsGj1VxwToLzckjpzgKnyF5D0FV7GkQeT19QbDNF8r u/WR5GQxvSFkbirl9l634DeElO/EUAJiUkDVFkHXO6Nk/zCzXWm9wEKFKI80w/QAtP6lN3jwrg7 LAaw6KfF4OACqQP2ltclrjgJBOAG9CGTmshvsqnhiq6yzzPRSJdgc4AyDBfz4KhFFBdL+zG21Oa BMEo7PDcpPr/B6Y+8H8f1YuGQ2Htfc/BJE+hWAXKL7PLrnkPU3i0ELwpL7X0kLJrydJh8cSU0nz U3vhfazLz4BMZfQJgfiA4DmtEgePOKWZ/5ujMfaHcJVL5F0pD3JGoJUm5DfjdmJFT0gw== X-Received: by 2002:a17:907:9689:b0:bc3:782c:da7a with SMTP id a640c23a62f3a-bc56a6470ddmr787193566b.5.1778251452799; Fri, 08 May 2026 07:44:12 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Doug Goldstein , Stefano Stabellini , Alistair Francis , Connor Davis Subject: [PATCH v2 25/26] xen/riscv: add initial dom0less infrastructure support Date: Fri, 8 May 2026 16:43:27 +0200 Message-ID: <0b52530fe7287ed8600b1877b573b5cd0168634a.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1778251453-8276A161-AB215660/10/73395122804 X-purgate-type: spam X-purgate-size: 5370 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778251477669158500 Content-Type: text/plain; charset="utf-8" Enable dom0less support for RISC-V by selecting HAS_DOM0LESS and providing the minimal architecture hooks required by the common dom0less infrastructure. Add stub implementations for architecture-specific helpers used when building domains from the device tree. These currently perform no additional work but allow the generic dom0less code to build and run on RISC-V. Introduce max_init_domid as a runtime variable rather than a constant so that it can be updated during dom0less domain creation. Provide missing helpers and definitions required by the domain construction code, including domain bitness helpers and the p2m_set_allocation() prototype. Additionally define the guest magic memory region in the public RISC-V interface. As HAS_DOM0LESS is selected for RISC-V now it could be a compilation issue if CONFIG_STATIC_MEMORY=3Dy as guest_physmap_add_pages() isn't yet provided. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Move declaration of p2m_set_allocation() to p2m-common.h. - Add __initdata for max_init_domid and drop initalizer for it. - Add CONFIG_STATIC_MEMORY=3Dn to CI's randconfig to avoid compilation error because of guest_physmap_add_pages() isn't provided. - Select HAS_DOMAIN_TYPE for RISC-V and drop things which were introduced when HAS_DOMAIN_TYPE doesn't exist. --- automation/gitlab-ci/build.yaml | 1 + xen/arch/riscv/Kconfig | 2 ++ xen/arch/riscv/dom0less-build.c | 6 ++++++ xen/arch/riscv/domain-build.c | 13 +++++++++++++ xen/arch/riscv/include/asm/guest-layout.h | 3 +++ xen/arch/riscv/include/asm/setup.h | 4 +++- xen/arch/riscv/setup.c | 2 ++ 7 files changed, 30 insertions(+), 1 deletion(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.y= aml index f05895729147..3c3e7cb356a4 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -805,6 +805,7 @@ debian-13-riscv64-gcc: CONFIG_GRANT_TABLE=3Dn CONFIG_LIVEPATCH=3Dn CONFIG_QEMU_PLATFORM=3Dy + CONFIG_STATIC_MEMORY=3Dn CONFIG_VM_EVENT=3Dn CONFIG_XSM=3Dn =20 diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 48520588fe40..d8a348c0cf07 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -6,6 +6,8 @@ config RISCV select GENERIC_BUG_FRAME select GENERIC_UART_INIT select HAS_DEVICE_TREE_DISCOVERY + select HAS_DOM0LESS + select HAS_DOMAIN_TYPE select HAS_EX_TABLE select HAS_PMAP select HAS_UBSAN diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c index d1a51b92936a..b5390175538a 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -102,3 +102,9 @@ int __init arch_parse_dom0less_node(struct dt_device_no= de *node, =20 return 0; } + +int __init arch_handle_passthrough_prop(struct kernel_info *kinfo, + struct dt_device_node *node) +{ + return 0; +} diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 02b293239142..a70306434fc9 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -158,9 +158,22 @@ int __init make_cpus_node(const struct domain *d, stru= ct kernel_info *kinfo) return fdt_end_node(fdt); } =20 +int __init construct_hwdom(struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + return -EOPNOTSUPP; +} + int __init make_timer_node(const struct kernel_info *kinfo) { /* There is no need for timer node for RISC-V. */ =20 return 0; } + +int __init make_hypervisor_node(struct domain *d, + const struct kernel_info *kinfo, + int addrcells, int sizecells) +{ + return -EOPNOTSUPP; +} diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/inc= lude/asm/guest-layout.h index b16ec79c3786..81cc87545054 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -24,4 +24,7 @@ #define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } #define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } =20 +#define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000) +#define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000) + #endif /* ASM_RISCV_GUEST_LAYOUT_H */ diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/as= m/setup.h index 9dbd3a8cbef7..416d2301dcde 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,11 +5,13 @@ =20 #include =20 +#include + struct domain; struct dt_device_node; struct rangeset; =20 -#define max_init_domid (0) +extern domid_t max_init_domid; =20 void setup_mm(void); =20 diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index c3e98733ebc3..b8fa004cbf25 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -33,6 +33,8 @@ #include #include =20 +domid_t __initdata max_init_domid; + /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); --=20 2.54.0 From nobody Sat May 30 11:15:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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No rmb() is needed on the do_IRQ() side because desc->status is read under a spinlock, which implies an acquire barrier. No barrier is needed in aplic_irq_disable() because the hardware disables the interrupt before the status is updated, so do_IRQ() cannot fire, and spin_unlock() makes the updated value visible. Fixes: d4676a1398bc5 ("xen/riscv: implementation of aplic and imsic operati= ons") Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/riscv/aplic.c | 5 +++++ xen/arch/riscv/irq.c | 3 --- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 1976733dfbaa..7933a00772a8 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -161,6 +161,9 @@ static void cf_check aplic_irq_enable(struct irq_desc *= desc) =20 spin_lock(&aplic.lock); =20 + desc->status &=3D ~IRQ_DISABLED; + wmb(); + /* Enable interrupt in IMSIC */ imsic_irq_enable(desc->irq); =20 @@ -189,6 +192,8 @@ static void cf_check aplic_irq_disable(struct irq_desc = *desc) /* Disable interrupt in IMSIC */ imsic_irq_disable(desc->irq); =20 + desc->status |=3D IRQ_DISABLED; + spin_unlock(&aplic.lock); } =20 diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c index 4481ae23aa8e..f9c10a7c9faf 100644 --- a/xen/arch/riscv/irq.c +++ b/xen/arch/riscv/irq.c @@ -145,9 +145,6 @@ int setup_irq(unsigned int irq, unsigned int irqflags, = struct irqaction *new) desc->handler->set_affinity(desc, cpumask_of(smp_processor_id())); =20 desc->handler->startup(desc); - - /* Enable irq */ - desc->status &=3D ~IRQ_DISABLED; } =20 err: --=20 2.54.0