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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:03 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144344; x=1778749144; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ElKZ0H6u/sSoXuky68q5cjnp17vaVqQmV7qTVsC1O8w=; b=XAueRDBVOniME+t2o7j9YqeJvqQdzKajUlr2rc4WITOfbKzQCQ5p66mrwjyVSYhpCv ACPvdWAr41sqPunhIh5IAoSyIpbM3DqKa4eAKgPUd9v09I1s8gOd74m+ejbOh7EPQ5v9 saMKo2GENGJOa3QRWVAQI+Sd1bNzTV+i11/BJNwdfN+eZMu5HKmqob6IBjg+T/CTfdtm dsVK/IdQytQFScY00oORXkXRfZbIQ3xIqT1o8XCMbs1oq6Z1MJNwkQ2J3XuR7Fhsuk0t cikfbxxoMcekpUueCTNcLkFM9bg2UB+ScI9pZ2Yeyh5LkYtHaB1aVpzbU1mhFCcTpdPA H2ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144344; x=1778749144; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ElKZ0H6u/sSoXuky68q5cjnp17vaVqQmV7qTVsC1O8w=; b=XU1hoNUieTgwu+d52eT1/uhZBEI1bjjvll13z0ZTBj4iHWMilrP+VDjLYT2s/+MtvU bD82QNnNZaWLssM0Wu1OtUCG84B2wu7vjVW1DF/RUK9pVDWtJvd2gGiJ/BXOF9m2F7HT 4Zdnjom2/pFpIsSE6wuS+mGE/DDq2FquQxjXIqHTw+vYfrMGJ+GjENFd0u1hWAWbWEyM NfvLlKyi5yLjRyeXAjTIPETOIViAXPhLdoW8/NWbMRQB9gDaARvBtB72Swz1Vd+0/5e1 OH2znqrUR801XaCcxt0PbZ+WkzfJKjT50r1V2A5Rc5z5zNLHD4e7yCWJ566mHSYZFOxw t8HQ== X-Gm-Message-State: AOJu0YwM1aVZkzPmyS/fPsWAhBLNMHJcY0XiPQlv3Zu4/i1W8xRm++7w mZjEZjD6gjbntnBZVOJn3wXGFxngaKAvdoGLwLltMUeliLSCFoM846+0c20V/Q== X-Gm-Gg: AeBDietYABACMO+/w+OfP0G3kH5KwPOXdtSMjMoVkvW+bmh+Cj02ANynOEd3uT0I6Qw HjVI+9GSAnixurztPKzpWcB9xF+F8p2A31dSGomt9jfwh/z9lTubVdfD6dM/ydZuqkI+QOsIpiQ mgp4LgBVaRHedO/Gr/KNAMAkl8/NkFh4koAiFcSSucZr7O4noljX5j98kQIciOWpqORWRwzsHIU JQSuJ1JIMWYyl+DRMf+v0JzI2dyyd58cXIU27JrqJmK3q6HNA3Eom037Me+/j5TO7N7eAdCsRDf 6fnL3cXYps1dOePH3/J62IfJF8+T5pTVsmFlh3XbXdPk7ojXNZeQeE//3dzyfC6rJS2H/UVHw9y 5gYCNxHguFAygyC/jmMKDHAYQgBE2NU5fbLZOCSuBGwR6/W1aokiNZ4aGoSID7mk2Q2hFgyNgk4 zlL9iAfB2GAor78Ecne5NgcgDnjZbfBi3xtxVE4gBRIzlik8E5wV9fr2va7W/jqnJlM2jRnYdP0 frmw4oOv6nMpXpbKkG71XWAyg== X-Received: by 2002:a17:907:3cc7:b0:bc4:aafa:65cf with SMTP id a640c23a62f3a-bc56c92bfc1mr415473166b.16.1778144343898; Thu, 07 May 2026 01:59:03 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Luca Fancellu Subject: [PATCH v5 01/11] xen: arm: fix len type for guest copy functions Date: Thu, 7 May 2026 10:58:40 +0200 Message-ID: <6f629fe2e194382534d3b1e2400b753c43ccb04b.1778140240.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1778144345-AEF58FF4-33AE15F9/10/73395122804 X-purgate-type: spam X-purgate-size: 5531 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778144365266158500 Content-Type: text/plain; charset="utf-8" Widen the len argument of copy_to_guest_phys_flush_dcache() and the copy_to_guest_phys_cb typedef from unsigned int to unsigned long, as the function can be used to copy large blobs such as the initrd which may exceed 4GB. Update the internal copy_guest() len argument to unsigned long accordingly. Change the type for local variable size in copy_guest() to avoid compilation error because of type mismatch. raw_* wrappers above copy_guest() keep returning unsigned long to avoid type narrowing; it is not an issue for raw_*'s len argument to remain 'unsigned int' since the assignment to copy_guest()'s wider unsigned long parameter is safe and there is no raw_* users who are using a value bigger than what can fit into 'unsigned int'. Fixes: 2986481b3d9e6 ("xen/arm: guest_copy: Extend the prototype to pass th= e vCPU") Fixes: 5302bd490bea7 ("xen/arm: Introduce copy_to_guest_phys_flush_dcache") Fixes: d07b7369aa65b ("xen/common: dom0less: introduce common domain-build.= c") Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Reviewed-by: Luca Fancellu Acked-by: Michal Orzel --- Changes in v5: - Add Review-by: Reviewed-by: Luca Fancellu --- Changes in v4: - Add Fixes: tags. - Add "arm:" prefix to commit subject. - Add Reviewed-by: Jan Beulich . - Avoid using of min_t. --- Changes in v3: - Correct the declaration of copy_to_guest_phys_cb() instead of return 'unsigned int' to be in sync with len argument, the type of len argument is changed on 'unsigned long' as initrd could be pretty big and also its size is stroed in 'paddr_t' which is 'unsigned long'. - Update copy_guest() prototype to avoid trancation bug for len argument. - Revert prototype changes for raw_* wrappers above copy_guest() as they should keep returning unsigned long to avoid type narrowing; it is not an issue for raw_*'s len argument to remain 'unsigned int' since the assignment to copy_guest()'s wider unsigned long parameter is safe. - Change the type for local variable size in copy_guest() to avoid compilation error because of type mismatch. - Add Reported-by: Jan Beulich --- Changes in v2: - New patch. --- --- xen/arch/arm/guestcopy.c | 6 +++--- xen/arch/arm/include/asm/guest_access.h | 2 +- xen/include/xen/fdt-domain-build.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/guestcopy.c b/xen/arch/arm/guestcopy.c index fdb06422b8e9..86f1c9d0e318 100644 --- a/xen/arch/arm/guestcopy.c +++ b/xen/arch/arm/guestcopy.c @@ -53,7 +53,7 @@ static struct page_info *translate_get_page(copy_info_t i= nfo, uint64_t addr, return page; } =20 -static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned long le= n, copy_info_t info, unsigned int flags) { /* XXX needs to handle faults */ @@ -65,7 +65,7 @@ static unsigned long copy_guest(void *buf, uint64_t addr,= unsigned int len, while ( len ) { void *p; - unsigned int size =3D min(len, (unsigned int)PAGE_SIZE - offset); + unsigned long size =3D min(len, PAGE_SIZE + 0UL - offset); struct page_info *page; =20 page =3D translate_get_page(info, addr, flags & COPY_linear, @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void = __user *from, unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, paddr_t gpa, void *buf, - unsigned int len) + unsigned long len) { return copy_guest(buf, gpa, len, GPA_INFO(d), COPY_to_guest | COPY_ipa | COPY_flush_dcache); diff --git a/xen/arch/arm/include/asm/guest_access.h b/xen/arch/arm/include= /asm/guest_access.h index 18c88b70d7ec..c13cbec55b65 100644 --- a/xen/arch/arm/include/asm/guest_access.h +++ b/xen/arch/arm/include/asm/guest_access.h @@ -14,7 +14,7 @@ unsigned long raw_clear_guest(void *to, unsigned int len); unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, paddr_t gpa, void *buf, - unsigned int len); + unsigned long len); =20 int access_guest_memory_by_gpa(struct domain *d, paddr_t gpa, void *buf, uint32_t size, bool is_write); diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domai= n-build.h index 9465a1021fe3..671486c1c837 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -48,7 +48,7 @@ static inline int get_allocation_size(paddr_t size) typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d, paddr_t gpa, void *buf, - unsigned int len); + unsigned long len); =20 void initrd_load(struct kernel_info *kinfo, copy_to_guest_phys_cb cb); --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:04 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144346; x=1778749146; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zc+/+WleWFSSpgrbZyRd8P0UB3Xb83BOo+6OlRzrn70=; b=CC8UBS6Zy2QL7cIqe6RcQJfEPkAYFSy+Fv6UxgljNiHPOhhCJNK4T0vmxMF1l+X8xX 51wgz9qCpj2WOwxlBvrlflDS3O9dObR46KUU/d7mnM4se/uLQ0T4JUhG6JU+Kukry+d3 AuYPKugzTGdIIx678ZstFSXTQn0NF4o7SZs6rfIhqvUFl86W7T5/GlgMFzDZEG2yqG8N /MsBtjn6Xb8VL4PAuJhyzOCRzTflz6Aj4fxnL5iZFEl26WwlUIZEbmCq48l7c6KnXvZU LBYescws0h1vhoySPVZaIR7Shdb9PpYk8Ad5/FhIs0pbzVL+I0l8c17pjX3/5jTvK+xd rRIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144346; x=1778749146; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=zc+/+WleWFSSpgrbZyRd8P0UB3Xb83BOo+6OlRzrn70=; b=hnTDetYd3KowvrYeV5HQiQAyx3oEPIybVB9BacPbiuqpNcH0ZOp85jcvtBOnLtL8vc HZMaqzSRJzUGjvMcnILfz47PZJtTb/ut7e0by82E3Pk+8ygDHMUMLeT2NKEgIPyJHFEY N7soqYcy2QHsmgajrKYmy/vQQrZwma3LmOQjSuWRFQhZIgi5H/owigdVDUD2wKYEFFWI ptEM5JQsf4tlITNEWfrOCDXqrr2wFnDlohjpDSo/IAJ/latB1arFpAJG49e80Y0oqHgS +5mhfkF02Gp5w14omL6Pjyb1xWtNDSlkAyXbTAvwu5nyvml8rgAvF0LYfNcyjEY8GWtH Od8A== X-Gm-Message-State: AOJu0Yxxg0CJb1c4k6HbXBs8DD7fLzfUk6WFiG7S87b8DJbcFp0vk9RB 08ZP5nMZ59Yts+AGeZ3+CH1f+EBNQ5dCujkAkZ02kuHsepymNXJ9TioqhSKalQ== X-Gm-Gg: AeBDietuIs20j1if5GSAcribvIpTRDssi/MUvP6mRDoXSbvAgttv/3hynMTJ9cx87bG lPaUAxNTd2S+mSei0DleJ5neKjf63qK6bbce4ZHXZuA7U4z3gnMHFdUzQukxUGOz0XgCVJLpz/M 6oCwjXzjKyZkuxdxw0FaZR7cBsxdQ07LxcARYW2xptXOeOba7Im/dKFMBcMTc2KkJPGnJbgBles UpQuQ1Zm/eAUb8FwS2MxCY8EDSQl4529nKSQojHbB4EQ1jJvyIgJgMtPc0Gb2PkHT4+KryB8tl9 0vzPvTD5MhBKXr7ww7htBQd9zMXhrkZOP3U6VGkJcRmH88379g1F9I8VhPv+ZLu/J0X1TStr70d 1QSR7d86G6KEA7V0m63x9LTeR2ghX5LlgQ3R1F4xWylJV9bdirsgj1PPxOddRFDQRxlw4HFAEOx 1qcO6M/lIdr2PHbS+ZRO9x3bt+Lb2x5cAV8SwyMnq4kIht3xze4qUV3x6gtbQ3nxGjS9ji68lMa BZs X-Received: by 2002:a17:907:c18:b0:bb8:b536:55dd with SMTP id a640c23a62f3a-bc56d713f3bmr418780266b.41.1778144345375; Thu, 07 May 2026 01:59:05 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Luca Fancellu Subject: [PATCH v5 02/11] xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() Date: Thu, 7 May 2026 10:58:41 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1778144346-72B778B7-8E0966E5/10/73395122804 X-purgate-type: spam X-purgate-size: 8345 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778144368349154100 Content-Type: text/plain; charset="utf-8" The helper kernel_zimage_probe() is referenced from common code (xen/common/device-tree/kernel.c), but its name is tied to the zImage format which is specific to Arm (from architectures supported by Xen). Other architectures supported by Xen, such as RISC-V, do not use the zImage format and instead rely on other kernel image types (e.g. Image or compressed Image variants: Image.gz, etc). Using "zimage" in the name is therefore misleading in architecture-independent code. Rename kernel_zimage_probe() to kernel_image_probe() and update the associated structure field from "zimage" to "image" to reflect that the code handles generic kernel images rather than the zImage format specifically. No functional change intended. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko Acked-by: Michal Orzel Reviewed-by: Luca Fancellu --- Changes in v5: - s/zimage/image in some comments. --- Changes in v3-4: - Nothing changed. Only rebase. --- Changes in v2: - new patch. --- --- xen/arch/arm/kernel.c | 50 ++++++++++++++++----------------- xen/common/device-tree/kernel.c | 2 +- xen/include/xen/fdt-kernel.h | 6 ++-- 3 files changed, 29 insertions(+), 29 deletions(-) diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index 9395b5af8745..b72585b7fed3 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -101,8 +101,8 @@ static paddr_t __init kernel_zimage_place(struct kernel= _info *info) paddr_t load_addr; =20 #ifdef CONFIG_HAS_DOMAIN_TYPE - if ( (info->type =3D=3D DOMAIN_64BIT) && (info->zimage.start =3D=3D 0)= ) - return mem->bank[0].start + info->zimage.text_offset; + if ( (info->type =3D=3D DOMAIN_64BIT) && (info->image.start =3D=3D 0) ) + return mem->bank[0].start + info->image.text_offset; #endif =20 /* @@ -111,19 +111,19 @@ static paddr_t __init kernel_zimage_place(struct kern= el_info *info) * and above 32MiB. Load it as high as possible within these * constraints, while also avoiding the DTB. */ - if ( info->zimage.start =3D=3D 0 ) + if ( info->image.start =3D=3D 0 ) { paddr_t load_end; =20 load_end =3D mem->bank[0].start + mem->bank[0].size; load_end =3D MIN(mem->bank[0].start + MB(128), load_end); =20 - load_addr =3D load_end - info->zimage.len; + load_addr =3D load_end - info->image.len; /* Align to 2MB */ load_addr &=3D ~((2 << 20) - 1); } else - load_addr =3D info->zimage.start; + load_addr =3D info->image.start; =20 return load_addr; } @@ -131,8 +131,8 @@ static paddr_t __init kernel_zimage_place(struct kernel= _info *info) static void __init kernel_zimage_load(struct kernel_info *info) { paddr_t load_addr =3D kernel_zimage_place(info); - paddr_t paddr =3D info->zimage.kernel_addr; - paddr_t len =3D info->zimage.len; + paddr_t paddr =3D info->image.kernel_addr; + paddr_t len =3D info->image.len; void *kernel; int rc; =20 @@ -215,7 +215,7 @@ int __init kernel_uimage_probe(struct kernel_info *info, return -EOPNOTSUPP; } =20 - info->zimage.start =3D be32_to_cpu(uimage.load); + info->image.start =3D be32_to_cpu(uimage.load); info->entry =3D be32_to_cpu(uimage.ep); =20 /* @@ -224,20 +224,20 @@ int __init kernel_uimage_probe(struct kernel_info *in= fo, * independent image. That means Xen is free to load such an image at * any valid address. */ - if ( info->zimage.start =3D=3D 0 ) + if ( info->image.start =3D=3D 0 ) printk(XENLOG_INFO "No load address provided. Xen will decide where to load it= .\n"); else printk(XENLOG_INFO "Provided load address: %"PRIpaddr" and entry address: %"PR= Ipaddr"\n", - info->zimage.start, info->entry); + info->image.start, info->entry); =20 /* * If the image supports position independent execution, then user can= not * provide an entry point as Xen will load such an image at any approp= riate * memory address. Thus, we need to return error. */ - if ( (info->zimage.start =3D=3D 0) && (info->entry !=3D 0) ) + if ( (info->image.start =3D=3D 0) && (info->entry !=3D 0) ) { printk(XENLOG_ERR "Entry point cannot be non zero for PIE image.\n"); @@ -257,13 +257,13 @@ int __init kernel_uimage_probe(struct kernel_info *in= fo, if ( rc ) return rc; =20 - info->zimage.kernel_addr =3D mod->start; - info->zimage.len =3D mod->size; + info->image.kernel_addr =3D mod->start; + info->image.len =3D mod->size; } else { - info->zimage.kernel_addr =3D addr + sizeof(uimage); - info->zimage.len =3D len; + info->image.kernel_addr =3D addr + sizeof(uimage); + info->image.len =3D len; } =20 info->load =3D kernel_zimage_load; @@ -287,9 +287,9 @@ int __init kernel_uimage_probe(struct kernel_info *info, * header. In other words if the user provides a uImage header on top = of * zImage or zImage64 header, Xen uses the attributes of uImage header= only. * Thus, Xen uses uimage.load attribute to determine the load address = and - * zimage.text_offset is ignored. + * image.text_offset is ignored. */ - info->zimage.text_offset =3D 0; + info->image.text_offset =3D 0; #endif =20 return 0; @@ -338,10 +338,10 @@ static int __init kernel_zimage64_probe(struct kernel= _info *info, if ( (end - start) > size ) return -EINVAL; =20 - info->zimage.kernel_addr =3D addr; - info->zimage.len =3D end - start; - info->zimage.text_offset =3D zimage.text_offset; - info->zimage.start =3D 0; + info->image.kernel_addr =3D addr; + info->image.len =3D end - start; + info->image.text_offset =3D zimage.text_offset; + info->image.start =3D 0; =20 info->load =3D kernel_zimage_load; =20 @@ -389,10 +389,10 @@ static int __init kernel_zimage32_probe(struct kernel= _info *info, } } =20 - info->zimage.kernel_addr =3D addr; + info->image.kernel_addr =3D addr; =20 - info->zimage.start =3D start; - info->zimage.len =3D end - start; + info->image.start =3D start; + info->image.len =3D end - start; =20 info->load =3D kernel_zimage_load; =20 @@ -403,7 +403,7 @@ static int __init kernel_zimage32_probe(struct kernel_i= nfo *info, return 0; } =20 -int __init kernel_zimage_probe(struct kernel_info *info, paddr_t addr, +int __init kernel_image_probe(struct kernel_info *info, paddr_t addr, paddr_t size) { int rc; diff --git a/xen/common/device-tree/kernel.c b/xen/common/device-tree/kerne= l.c index 28096121a52d..cfa27464f0fc 100644 --- a/xen/common/device-tree/kernel.c +++ b/xen/common/device-tree/kernel.c @@ -235,7 +235,7 @@ int __init kernel_probe(struct kernel_info *info, if ( rc && rc !=3D -EINVAL ) return rc; =20 - rc =3D kernel_zimage_probe(info, mod->start, mod->size); + rc =3D kernel_image_probe(info, mod->start, mod->size); =20 return rc; } diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 86a37a13048b..8cd1670c2c6f 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -63,7 +63,7 @@ struct kernel_info { paddr_t text_offset; /* 64-bit Image only */ #endif paddr_t start; /* Must be 0 for 64-bit Image */ - } zimage; + } image; }; =20 #ifdef CONFIG_HAS_DOMAIN_TYPE @@ -113,7 +113,7 @@ kernel_info_get_mem_const(const struct kernel_info *kin= fo) * Probe the kernel to detemine its type and select a loader. * * Sets in info: - * ->load hook, and sets loader specific variables ->zimage + * ->load hook, and sets loader specific variables ->image */ int kernel_probe(struct kernel_info *info, const struct dt_device_node *do= main); =20 @@ -133,7 +133,7 @@ void kernel_load(struct kernel_info *info); =20 int kernel_decompress(struct boot_module *mod, uint32_t offset); =20 -int kernel_zimage_probe(struct kernel_info *info, paddr_t addr, paddr_t si= ze); +int kernel_image_probe(struct kernel_info *info, paddr_t addr, paddr_t siz= e); =20 /* * uImage isn't really used nowadays thereby leave kernel_uimage_probe() --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Signed-off-by: Oleksii Kurochko Reviewed-by: Luca Fancellu Acked-by: Michal Orzel --- Changes in v5: - Add Reviewed-by: Luca Fancellu . --- Changes in v2-v4: - Nothing changed. Only rebase. --- xen/arch/arm/include/asm/setup.h | 3 --- xen/include/xen/bootinfo.h | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/se= tup.h index 899e33925ca4..0d29b46ea52b 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -43,9 +43,6 @@ int acpi_make_efi_nodes(void *fdt, struct membank tbl_add= []); void create_dom0(void); =20 void discard_initial_modules(void); -void fw_unreserved_regions(paddr_t s, paddr_t e, - void (*cb)(paddr_t ps, paddr_t pe), - unsigned int first); =20 void init_pdx(void); void setup_mm(void); diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index f834f1957155..dbf492c2e36e 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -210,4 +210,8 @@ static inline struct membanks *membanks_xzalloc(unsigne= d int nr, return banks; } =20 +void fw_unreserved_regions(paddr_t s, paddr_t e, + void (*cb)(paddr_t ps, paddr_t pe), + unsigned int first); + #endif /* XEN_BOOTINFO_H */ --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778144370; cv=none; d=zohomail.com; s=zohoarc; b=IpdGEJENHClr4NiVIl8viTnc48efLSSz2/nHiC/g3ykigGgQXDdcvICTLRwA6CXJ7Lo+LIH5gmt9DutODcQ6xS05yYTUIJo9KLwvUn7rwdFF4yIR1NEnGyUsxS7gPt3qmu0oEFwJdN3K+dFiaiVNAfz7Gdx6BW9sjaU1vOzHhi4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778144370; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=yM+vLILbE6Jc00UTwsrRi/KBPqAZVlEYVO70OjvNObQ=; b=fQ72/ojhJs+rxivFSpiIMFnlCsZJpJak6KNX63/cYU8IZqsV8mQoQZvrsK4ExVKsCg398SXmhWKGFiqn5f0H69lrKyYVHwBBibtvdq0zyL/VmUAcaaWCLcni7cKqCKdKqPm3tD7Vj9DY8GVk8bBbFFSsoQPppxZn3JJVOyGvs0Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778144370460600.5811622600685; Thu, 7 May 2026 01:59:30 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1302332.1576310 (Exim 4.92) (envelope-from ) id 1wKuZc-00030T-4o; Thu, 07 May 2026 08:59:12 +0000 Received: by outflank-mailman (output) from mailman id 1302332.1576310; Thu, 07 May 2026 08:59:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZb-0002zR-Vn; Thu, 07 May 2026 08:59:11 +0000 Received: by outflank-mailman (input) for mailman id 1302332; Thu, 07 May 2026 08:59:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZa-0002q9-Jj for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZa-00CM1g-0R for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:10 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5457-5cb7-0a2a0a5109dd-0a2a45019b40-36 for ; Thu, 07 May 2026 10:59:09 +0200 Received: from [209.85.218.49] (helo=mail-ej1-f49.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc545d-c1f2-0a2a45010019-d155da31a8e7-3 for ; Thu, 07 May 2026 10:59:09 +0200 Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-bc1f0830f44so329054066b.0 for ; Thu, 07 May 2026 01:59:09 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Replace the ARM-specific macro in asm/domain.h with a common static inline in a new dedicated header, xen/domain-layout.h. xen/domain.h would be the natural home, but placing it there would require including xen/paging.h (for paging_mode_translate()) and xen/sched.h (for is_hardware_domain()), which would introduce circular dependencies. A separate header that callers opt into avoids this. Adjust the implementation to take paging_mode_translate() into account so it works correctly for all architectures, including x86. Some extra details about implementation [2] and [3]. To avoid the following compilation issue: In file included from ./include/xen/paging.h:4, from ./include/xen/domain-layout.h:6, from common/device-tree/domain-build.c:4: ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 17 | void paging_free_page(struct domain *d, struct page_info *pg); add the forward declaration of struct page_info to RISC-V's asm/paging.h. [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359= 097@ubuntu-linux-20-04-desktop/ [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.314= 8344@ubuntu-linux-20-04-desktop/ [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.314= 8344@ubuntu-linux-20-04-desktop/ Suggested-by: Stefano Stabellini Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich Acked-by: Michal Orzel Reviewed-by: Luca Fancellu --- Changes in v5: - Add /* SPDX-License-Identifier: GPL-2.0-only */ to xen/domain-layout.h. - s/__XEN_DOMAIN_LAYOUT_H__/XEN_DOMAIN_LAYOUT_H. - Drop inclusion of xen/domain.h as it is included in xen/sched.h. - Add forward declaration of page_info in asm/paging.h to fix compilation issue occured after drop inclusion of xen/domain.h. - Add Acked-by: Jan Beulich . --- Changes in v4: - Update the comment above domain_use_host_layout(). --- Changes in v3: - Make argument of domain_use_host_layout() const. - Create a separate header to avoid circular heder dependecy and making domain_use_host_layour() as static inline. - Rework domain_use_host_layout() to be protected by paging_mode_translate= (). - Update the commit message. --- Changes in v2: - Drop ifdef around defintion of domain_use_host_layout() as it was suggested generic version. It could be returned back when the real use case for it will appear. - Add Suggested-by: and update the commit message. - Make domain_use_host_layout() function instead of macros to avoid ciclular header dependecies. Look at more details in the commit message. --- xen/arch/arm/domain_build.c | 1 + xen/arch/arm/include/asm/domain.h | 14 -------------- xen/arch/arm/vgic-v3.c | 1 + xen/arch/riscv/include/asm/paging.h | 1 + xen/common/device-tree/domain-build.c | 1 + xen/include/xen/domain-layout.h | 28 +++++++++++++++++++++++++++ 6 files changed, 32 insertions(+), 14 deletions(-) create mode 100644 xen/include/xen/domain-layout.h diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index ad665cd3c045..1efddc60ef0a 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2,6 +2,7 @@ #include #include #include +#include #include #include #include diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/d= omain.h index b24f02d269be..46a5cdc0c800 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -18,20 +18,6 @@ struct hvm_domain uint64_t params[HVM_NR_PARAMS]; }; =20 -/* - * Is the domain using the host memory layout? - * - * Direct-mapped domain will always have the RAM mapped with GFN =3D=3D MF= N. - * To avoid any trouble finding space, it is easier to force using the - * host memory layout. - * - * The hardware domain will use the host layout regardless of - * direct-mapped because some OS may rely on a specific address ranges - * for the devices. - */ -#define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ - is_hardware_domain(d)) - struct vtimer { struct vcpu *v; int irq; diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 77aab5c3c293..77517c303061 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -10,6 +10,7 @@ */ =20 #include +#include #include #include #include diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/a= sm/paging.h index c1d225d02b50..e487c89a4ccd 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -4,6 +4,7 @@ #include =20 struct domain; +struct page_info; =20 int paging_domain_init(struct domain *d); =20 diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree= /domain-build.c index c51520ebadf9..6949203dacdc 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ =20 #include +#include #include #include #include diff --git a/xen/include/xen/domain-layout.h b/xen/include/xen/domain-layou= t.h new file mode 100644 index 000000000000..cc5e56c9da47 --- /dev/null +++ b/xen/include/xen/domain-layout.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef XEN_DOMAIN_LAYOUT_H +#define XEN_DOMAIN_LAYOUT_H + +#include +#include + +/* + * Is a domain using the host memory layout? + * + * domain_use_host_layout() is always False for PV domains (including Dom0= ). + * + * Direct-mapped domains (autotranslated domains with memory allocated + * contiguously and mapped 1:1 so that GFN =3D=3D MFN) must use the host + * memory layout since GFN =3D=3D MFN by definition. + * + * The hardware domain will use the host layout (regardless of + * direct-mapped) because some OS may rely on specific address ranges + * for the devices. + */ +static inline bool domain_use_host_layout(const struct domain *d) +{ + return paging_mode_translate(d) && + (is_domain_direct_mapped(d) || is_hardware_domain(d)); +} + +#endif /* XEN_DOMAIN_LAYOUT_H */ --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778144374; cv=none; d=zohomail.com; s=zohoarc; b=DFHagAcwSoOau3sPfp/DDAE3VIdDmxcpWcPV6ic156TXR/HJtyadTRexYwW2rwABccpuv7mLyWQ8BOeuJgln9eC0D9uj6Uf5Mt7swAMW4DwshaBroM1d1PqOmDuZWyb6nEBKj24vSMQqUjTAH3s0y+J/yUDuN/OQb8aPDSRp1hU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778144374; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=aRsnnevu9J7EHdsbqnkGstxc8WDNRA7C/OR2k/OqOes=; b=Dwgkn7aGxXfJ/963Pxowo2SeAaJIyko/bq2PLF6NK1f3WczWkTTtrCxSftOiXsN/tEwDL7OWHJ45xtoUeCFQpItxNcJf0GfABi/GfYsiehU+rTP+P2EQ9ppSEM/Ho9MbMfKJB5cLgG3yVLF0bLCJq9BOmHVSDcATAZx2pu2kBrg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778144374023431.9494636428684; Thu, 7 May 2026 01:59:34 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1302333.1576322 (Exim 4.92) (envelope-from ) id 1wKuZd-0003LG-DE; Thu, 07 May 2026 08:59:13 +0000 Received: by outflank-mailman (output) from mailman id 1302333.1576322; Thu, 07 May 2026 08:59:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZd-0003L1-8K; Thu, 07 May 2026 08:59:13 +0000 Received: by outflank-mailman (input) for mailman id 1302333; Thu, 07 May 2026 08:59:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZb-0002t8-Lg for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZb-00CM1g-2P for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:11 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc544c-5cb7-0a2a0a5109dd-0a2a4504a78a-46 for ; Thu, 07 May 2026 10:59:11 +0200 Received: from [209.85.208.52] (helo=mail-ed1-f52.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc545e-1dec-0a2a45040019-d155d034d04a-3 for ; Thu, 07 May 2026 10:59:11 +0200 Received: by mail-ed1-f52.google.com with SMTP id 4fb4d7f45d1cf-67179ed133dso641972a12.2 for ; Thu, 07 May 2026 01:59:11 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:09 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144350; x=1778749150; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aRsnnevu9J7EHdsbqnkGstxc8WDNRA7C/OR2k/OqOes=; b=VZDDzy87ZqmYpTAR3Yf7Jp3GqcWI9w6fIIsRTMYXUhqovRhJ0I5BXNaF0zOxjKijQq PNmac2nU65sagx+iEyTjDtqUsnqnKJjzPREQbiFEZWLOMUSyQAUr910ymrd4YkHZA7SJ FM+9r13FRMlMx1uEGsJlqxr/AcI9sNgLbmRP3vid/H+pmODKMqzlMQbZcCfuV+iAZ81w 7LyuKDfIsLq5OppPeFywWjemaya4BGfIHdGQCdGrIE2UwB4D7hMMj4L8JYu1212g6yzL dh++zcdJD9YnPhlTF5D2ltOZu2EPKan2t24edr13VJcHYhnCAO4TuortR/6Gbka/MTWA U/fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144350; x=1778749150; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=aRsnnevu9J7EHdsbqnkGstxc8WDNRA7C/OR2k/OqOes=; b=sjXcGJpNyJKQkcnSbgI26c6eICpUMPsM5FFstLUzgUJHACFH0aeGnfzfl/6F9owFPZ 4oP9fTJ9OH3b9ndDCV+3H32IxJfFIBjgr/rSB9RWQjQ7Kxq7UIQpgF0RO0UV0hD3JlID Q8sc6mml805PKNvE2T2VKQcLCwDPxwcsA9Da8FP9APgqPDDgNjs6sysHhSyFZX7lGE1I ZOS1KqD59TnR4kUC47jwrMJDL0dGStj7xffjBcXihlprtde9hXdaFj7UNX53UDo6rkoF pGSGF6hv9QKvRlGZYTyQf0fuVNEGu/kyXnFACJUOzHPEy9jrJSXntJDav+dXrUvHu9tf G4hg== X-Gm-Message-State: AOJu0YyAg5VzxWYlACL5zTibdCAjQh2cLSQMSWpYy+JIwHsUx2kQd0fW bMT3KdvcuZ7AY1D/BN5tyAkXo9wQOuerhu/1nMB2WBUQzCwSHtwJvjV44RkKng== X-Gm-Gg: AeBDiesr4qKWDiUpEmcLZxY/k7bm7nO7dvawQ01h7wEONL2OBPynR6TD8OumveTRqPS k3DP9FQoMSvd7uct0wCjMaEpYBUFELShQUefYMdSmnVLz5W+FDCptFl6ff+DFImsSuTWnPPZaaI SAcXsRySV1MEflZs1xcmk6MTvvZ72u2B71omcvctNJcOE0/hbnz0X/776YbMlAhlkljW29YzqEH 4U2COsSrMts7HcxS01m0ffhHkekrm98YRK82kPppcPAHOKJbxMmos0Kr+oc1OIounYjJaUT+7yD o2HauPoV4Gl8pVwjCqbSaIA8lDsolWo8W+kQzpg7IPfEc76qa9avQSWE8rATWY6+2P4JROILs2F EJ3kxug487ReZV4eFyDLTumJJnJKxzJI7Wp/l4WoK/owyhzh9yWKlk/cM4gM/tFaua0GTB/tNuE 0oT5NaUBgqHFy/b6MOR2MOyLTT+5CLE2owDL1UIOXDpXWa1K3BxtNF9RIM5mxRlgs010FiGwJXe VmA+xLl6rnNVns= X-Received: by 2002:a17:907:930b:b0:bc1:1716:2e9c with SMTP id a640c23a62f3a-bc56b1272a7mr400444166b.16.1778144350078; Thu, 07 May 2026 01:59:10 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Luca Fancellu , Jan Beulich Subject: [PATCH v5 05/11] xen/device-tree: use p2m_gpa_bits in common code Date: Thu, 7 May 2026 10:58:44 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1778144351-4197A3FF-E9835FCC/10/73395122804 X-purgate-type: spam X-purgate-size: 1927 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778144376439154100 Content-Type: text/plain; charset="utf-8" The IPA terminology is Arm-specific, so rename p2m_ipa_bits to p2m_gpa_bits to use architecture-neutral naming in xen/common/device-tree/ code. No functional changes. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Luca Fancellu Acked-by: Michal Orzel --- Changes in v5: - Rephraze commit subject. - Reviewed-by: Luca Fancellu . --- Changes in v4: - Nothing changed only rebase. --- Changes in v3: - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of changes clearer and keep using Arm-specific terminolgy inside Arm code. --- Changes in v2: - New patch. --- --- xen/arch/arm/include/asm/p2m.h | 2 ++ xen/common/device-tree/domain-build.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..7957dbd96e57 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -14,6 +14,8 @@ /* Holds the bit size of IPAs in p2m tables. */ extern unsigned int p2m_ipa_bits; =20 +#define p2m_gpa_bits p2m_ipa_bits + #define MAX_VMID_8_BIT (1UL << 8) #define MAX_VMID_16_BIT (1UL << 16) =20 diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree= /domain-build.c index 6949203dacdc..2a760b007b57 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -221,7 +221,7 @@ int __init find_unallocated_memory(const struct kernel_= info *kinfo, } =20 start =3D 0; - end =3D (1ULL << p2m_ipa_bits) - 1; + end =3D (1ULL << p2m_gpa_bits) - 1; res =3D rangeset_report_ranges(unalloc_mem, PFN_DOWN(start), PFN_DOWN(= end), cb, free_regions); if ( res ) --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778144370; cv=none; d=zohomail.com; s=zohoarc; b=hZ9hNOATn3VSMpY18OByLxWTiQl4yvorrvwVsOlDplk5FaBZ6iPznrwYvGxK/sTj1Z1jd2PSZ/+X4103445DverrtVuQZKdPvgaGU39GWFfRbXUsZ2nE1XhAoI8p0W1pCVBfMuyyMI1slp2WxGc5Dg2q4Kn59xIbPXyW7Dw6dOU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778144370; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=wGQ7zO8AKfHP1ag+tsRcXVHwApXHfJapq9I/qFco5NE=; b=OT6lJK14sZtGJePyZLNznyxOAhF1oo22DEFft7ofdXTnX5BQL690wtV5Z/tAnSDPNKICVNx4dnCbwsOuzXoCcFQ1O7k5dAnk2NAi93QGduKSFYQNwnBLBbligGU+1w135/JAqCmKTWxkXAyZx6NoK32eOvkF7nFlHCNJydF5NYI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778144370389266.34201505791; Thu, 7 May 2026 01:59:30 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1302336.1576330 (Exim 4.92) (envelope-from ) id 1wKuZf-0003ft-K4; Thu, 07 May 2026 08:59:15 +0000 Received: by outflank-mailman (output) from mailman id 1302336.1576330; Thu, 07 May 2026 08:59:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZf-0003fe-H9; Thu, 07 May 2026 08:59:15 +0000 Received: by outflank-mailman (input) for mailman id 1302336; Thu, 07 May 2026 08:59:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZd-0003LL-Gs for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZc-002yCt-Sp for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:12 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545c-2eae-0a2a0a5409dd-0a2a4508d59a-10 for ; Thu, 07 May 2026 10:59:12 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5460-63b5-0a2a45080019-d155da2bcd56-3 for ; Thu, 07 May 2026 10:59:12 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bb962ce4dcfso87521966b.1 for ; Thu, 07 May 2026 01:59:12 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:10 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144352; x=1778749152; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wGQ7zO8AKfHP1ag+tsRcXVHwApXHfJapq9I/qFco5NE=; b=jf/i/+rDqRPS5qI4SAfOdsRF1r5QN2gNCYxHQELqmI2ZZg8Rsb53/D3Ip+UTOCQcS5 CfXtUDO7e4+FdnWLChhjcjvUbg61o7yLnL4Ba5w9iEUnbVwpuRg8nLhWKoLIodCm+uOq mIYjZTdf3SXed18DglZG8pEY8grbL5bYUPw/24lC/4gkTHIJPX8w1WEsRTm/kFoqaY6l aFrVKe8AAr4HWj6BvKRNgT0+Iwj6O1/RD43Wf9eXJUI9vC36X5ji2KIXXeUx44K9pQc4 DyGDPGy0CvpH80EHEdaamqhJ9p/ZMc3JVjVtPFEBEVYrHk3FKH+YBMxLgnUe2yXYG6GW LqDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144352; x=1778749152; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=wGQ7zO8AKfHP1ag+tsRcXVHwApXHfJapq9I/qFco5NE=; b=LrViiuvETZVScqRUCoTxeUTXhSpdrQ9+rb9pUjFkMFzHodmztqONg7bsfnqymy9Axf rS1lAZF+wvxanvk8Li6UGlTc0BNPlErutSLwiMGG/rDnutIvp+3Us4+nJ6TZKH5umrua GMV1E+UmJdWUgpuw3UKlWlt+4FkQU+8v7HfXeNck+uUeJysO0VFDxvjLLoL0uMcD5i5W k7+NcACX7QmCN2mZjMkry1eQxCFRx+alCjM4bMl9AU6FgMfAXX6Tiy9h1kf0uVdyg/vi w+vJl86eTvvnB0oDji8AUb6Kzr14iczts/bMRSSGQd5NHw7NLdZKMyy6FRxwt8uELVJw RwZw== X-Gm-Message-State: AOJu0Yx2ZQ9z6y/Cjcp+BKtsow6ZsbJQLPODVTqOGlH4RJoS4BHss2Rm DFzgmn8VkPplDqzq1An2Q0EXJglP++Yqf2yYjPV58LXGk8DjXPvMreqGFcSkHA== X-Gm-Gg: AeBDievIuMwkYYm2oLehyGfMySXZQwnnWrzjCiPVtJ5XYM4ciebV1toxoS2CX/wzMbf Mjtlq7Q0ZWI1FikTEnwSxEVDXwy6d7DzS1LEstmxUMDcb89rAV9n5Y7dtAzCDtkgER4W8qOf4MM 3smdKmj8bedXTCdUjxsvW3B4dVWQW02Xu6piUlfOym0lTYCpEytZ4lA2VA+c4pSiWeT87ZFUd6e 4Fcxg9AeXaKYeUjkOgLlkVQQbDbVbUhLao2uuVL5f98lZ9OTXu2LE7kBUVx0dFzYKdsCa1o9Lny +gUJVANqN3fH7y5IQYGtg02T8M89JtY6gCTUjYkT2qay0sUnI7yIPx5qj3r9ujPDkdGXUBd+zQR TMfvQkoHihpBGxwaDqP7I14sBtTlR+28q8e0vlqAZjGsIiNP7axz1D02AQM8TERitBMdVYG69GK tmwJjkFT4x7JOzTS1g5i08xz9XHaxApqrlrEMFcsFytbGIgc3PXIJo8mQeD9Qn6wo8z1VRQacfv NJt X-Received: by 2002:a17:907:1ca8:b0:bc3:783f:1da9 with SMTP id a640c23a62f3a-bc56d13123amr367776966b.33.1778144351614; Thu, 07 May 2026 01:59:11 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 06/11] xen/riscv: implement copy_to_guest_phys() Date: Thu, 7 May 2026 10:58:45 +0200 Message-ID: <90ff94daad0c3910b1398a7bd956f0d0bd6a2041.1778140240.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1778144352-B7D7BDB1-F2C646D4/10/73395122804 X-purgate-type: spam X-purgate-size: 6574 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778144371420158501 Content-Type: text/plain; charset="utf-8" Introduce copy_to_guest_phys() for RISC-V, based on the Arm implementation. Add a generic copy_guest() helper for copying to and from guest physical (and potentially virtual addresses in the future), and implement translate_get_page() to translate a guest physical address into a struct page_info via the domain p2m. Compared to the Arm code: - Drop COPY_flush_dcache(), as no such use cases exist on RISC-V. - Do not implement the linear mapping case, which is currently unused. - Use PAGE_OFFSET() to initialize the local offset variable in copy_guest(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Avoid using of min_t. (sync with Arm) - Add Acked-by: Jan Beulich . --- Changes in v3: - s/if (page =3D=3D NULL)/if ( !page ). - Drop " - offset" for unmap_domain_page() inside copy_guest() function. unmap_domain_page() is expected to mask (or something similar) the page offset bits. - Change some types for functions as copy_to_guest_phys_cb function pointer prototype was changed too in the prev. commit. --- Changes in v2: - Use BIT() instead of open-coding. - Rename COPY_ipa to COPY_gpa. - Rename COPY_linear to COPY_gva. - Use BUG_ON(linear) instead if (lineer) + BUG_ON. - Rename arg liner to gva for translate_get_page(). - Update translate_get_page() to properly handling write argument. - Return unsigned int for copy_guest() and copy_to_guest_phys() as len function parameter is only 'unsigned int'. - Reformat function arguments for alignment --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/guestcopy.c | 116 ++++++++++++++++++++++ xen/arch/riscv/include/asm/guest_access.h | 7 ++ 3 files changed, 124 insertions(+) create mode 100644 xen/arch/riscv/guestcopy.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 04f02ad89cba..cfc3fdf7d208 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -4,6 +4,7 @@ obj-y +=3D domain.o obj-$(CONFIG_EARLY_PRINTK) +=3D early_printk.o obj-y +=3D entry.o obj-y +=3D extable.o +obj-y +=3D guestcopy.o obj-y +=3D imsic.o obj-y +=3D intc.o obj-y +=3D irq.o diff --git a/xen/arch/riscv/guestcopy.c b/xen/arch/riscv/guestcopy.c new file mode 100644 index 000000000000..8a89212e0bea --- /dev/null +++ b/xen/arch/riscv/guestcopy.c @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +#define COPY_from_guest 0U +#define COPY_to_guest BIT(0, U) +#define COPY_gpa 0U +#define COPY_gva BIT(1, U) + +typedef union +{ + struct + { + struct vcpu *v; + } gva; + + struct + { + struct domain *d; + } gpa; +} copy_info_t; + +#define GVA_INFO(vcpu) ((copy_info_t) { .gva =3D { vcpu } }) +#define GPA_INFO(domain) ((copy_info_t) { .gpa =3D { domain } }) + +static struct page_info *translate_get_page(copy_info_t info, uint64_t add= r, + bool gva, bool write) +{ + p2m_type_t p2mt; + struct page_info *page; + + /* + * Not implemented yet. + * + * If gva =3D=3D true, the operation will likely require a struct vcpu + * rather than just a struct domain. For this reason copy_info_t is + * already passed here instead of only struct domain. + */ + BUG_ON(gva); + + page =3D get_page_from_gfn(info.gpa.d, paddr_to_pfn(addr), &p2mt, P2M_= ALLOC); + + if ( !page ) + return NULL; + + if ( write ? p2mt !=3D p2m_ram_rw : !p2m_is_ram(p2mt) ) + { + put_page(page); + return NULL; + } + + return page; +} + +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned long le= n, + copy_info_t info, unsigned int flags) +{ + unsigned int offset =3D PAGE_OFFSET(addr); + + BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t)); + BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t)); + + while ( len ) + { + void *p; + unsigned long size =3D min(len, PAGE_SIZE + 0UL - offset); + struct page_info *page; + + page =3D translate_get_page(info, addr, flags & COPY_gva, + flags & COPY_to_guest); + if ( !page ) + return len; + + p =3D __map_domain_page(page); + p +=3D offset; + if ( flags & COPY_to_guest ) + { + /* + * buf will be NULL when the caller request to zero the + * guest memory. + */ + if ( buf ) + memcpy(p, buf, size); + else + memset(p, 0, size); + } + else + memcpy(buf, p, size); + + unmap_domain_page(p); + put_page(page); + len -=3D size; + buf +=3D size; + addr +=3D size; + + /* + * After the first iteration, guest virtual address is correctly + * aligned to PAGE_SIZE. + */ + offset =3D 0; + } + + return 0; +} + +unsigned long copy_to_guest_phys(struct domain *d, paddr_t gpa, void *buf, + unsigned long len) +{ + return copy_guest(buf, gpa, len, GPA_INFO(d), + COPY_to_guest | COPY_gpa); +} diff --git a/xen/arch/riscv/include/asm/guest_access.h b/xen/arch/riscv/inc= lude/asm/guest_access.h index 7cd51fbbdead..8d679319ded0 100644 --- a/xen/arch/riscv/include/asm/guest_access.h +++ b/xen/arch/riscv/include/asm/guest_access.h @@ -2,6 +2,10 @@ #ifndef ASM__RISCV__GUEST_ACCESS_H #define ASM__RISCV__GUEST_ACCESS_H =20 +#include + +struct domain; + unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len); unsigned long raw_copy_from_guest(void *to, const void *from, unsigned len= ); unsigned long raw_clear_guest(void *to, unsigned int len); @@ -18,6 +22,9 @@ unsigned long raw_clear_guest(void *to, unsigned int len); #define guest_handle_okay(hnd, nr) (1) #define guest_handle_subrange_okay(hnd, first, last) (1) =20 +unsigned long copy_to_guest_phys(struct domain *d, paddr_t gpa, void *buf, + unsigned long len); + #endif /* ASM__RISCV__GUEST_ACCESS_H */ /* * Local variables: --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778144383; cv=none; d=zohomail.com; s=zohoarc; b=DjLl8bjIbbJ+6RdodU9FtEaPrEwQbdFFWB+BmKlpG65bil+qe/R1LsqW9haZ6hovEmww9Kq0P8qJQSAruI+KDd90vlpnXM4xgiYoe4DynRQBl+vaCl7xuYkYClQh72rwqAQsxmKER3YILEmaQCs/C5+sCCh6JiN4KxYxqMEOdnc= ARC-Message-Signature: i=1; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:12 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144354; x=1778749154; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b5JrowEde3AEZewOr27HDt+oy+DAfl7walW+rv1nHYY=; b=mP/nPJIEtGqWpm+tqvmLR/rbg1uXu455kUbVDjckrCUnhE7MIGSg1ABjd9/6vLBGlL J2bcdj/h040AGePpNnMvRS7+dkf7faWNY/8x8EQjGF7dV/PLMidL2FdbLNUnJRFLpddO /IkzLG7qVMpJPW/8VxYqqQlzFPe3fycUBoPA7kfflpb6eAZ6GoObN//kwV95+p8kABIU lxrEYl52riDBlwiLAsbJD8SSGmFuJwSnI4AopkNgId07ijTQJr2ZmlTtGRJk6fhOerLh fNr6QO2el+Tg+X7JljSL84L/5jtLkuiThgmaEbK/VVkOe3Ymr8WU+fGmNg2OHQyIxlV9 Tn0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144354; x=1778749154; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=b5JrowEde3AEZewOr27HDt+oy+DAfl7walW+rv1nHYY=; b=RU3MmjjvTJHIkitV/PI0ZpV+iDMs9sjC8NLEf9asT94ukD1xzlAsfylGwfOloxNo2P YEHlwGKdat0ps4Al5HtJWnXK5t9+3xxv0RkO5YLDE2ShiOYk3wiikBExazj/S+QB4yBt Y/cGKs+yF6z2NFeUD1DkUz4ng3jmGTDApXN926rPnVMz7PkK2vZT0UsZ7P9mB80PJqeP W6646SHGg4Li6axWLmck0BGL40JDMOHW85NbWPNpZqMjzKNcWWL5Q36p28BRv50fJBbN nI4AlBQNjT6CQn4YVBCVho5NlBvRDKP1hKMnMI3i2j8Wyj8g/fyBY2NpVsHuIKlxidId I9yQ== X-Gm-Message-State: AOJu0YyEOcx0aMCYfLdDRDln+DTSohfEa4RHujUjN3rKjqY2sadPeoAh O/BnvT1SNhNifuiGLMNZ0tvHTSXRJawwuM5nZSb29nF8XObErNRh58bHJgABhg== X-Gm-Gg: AeBDieuh+xY7M7A35w1dCLWTl80unv+DMh9epdFj5+pogNyFZpOPuDxZB5RfJQl5OPG mf4njd+xyLE9+0V9oYlBFM0mbYRPMWSCIwC73aFI65UTWW2QqP87r0v9xjUaXZbpSsjOEShv4HB UQ5Qom408PmGUmgGxfXbsHzTDcKjO2ObYs8lw9ZrdD3REWSwrhPyWziqfDSo7L9zdqJ/plc//3M fXSBaPNq0iCFahr58Vy+IndY079gu+sj/i6HD8UF29jtYacqBM1I3yutSYEeCukrT+eoU+kLbDL LrdS5mXUQudO+if6IPE0JK1QdTGLTkooM/pbA8Sktr76BMnO0ytDtuUmcvliWniENtP/q44+vr7 g4B9aEJtmuwrn2mzwWmthhU6jaLgtrgesN8sWdoE1wSxh+vvZAbKOtthhV3Otvk7FTp5SIHJMm/ og8Xha+3j6bt6po3e9Cgk4QV7SFhMtNF4qR2dsCogFnIL8GBMjlvg1NEBT33nhMKLbJfrdZmm28 GOO X-Received: by 2002:a17:906:99c1:b0:bc4:75be:62e3 with SMTP id a640c23a62f3a-bc56d137fc6mr400889466b.33.1778144352960; Thu, 07 May 2026 01:59:12 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 07/11] xen/riscv: add Linux kernel loading support Date: Thu, 7 May 2026 10:58:46 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1778144355-B715BFF4-9BCA9DAE/10/73395122804 X-purgate-type: spam X-purgate-size: 12546 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778144384547154100 Content-Type: text/plain; charset="utf-8" Introduce support for loading a Linux kernel Image which is got by uncompressing of Image.gz on RISC-V. kernel_image_load() and place_modules() currently call panic() on failure rather than returning an error. This is because the common kernel_load() in common/device-tree/kernel.c does not expect a return code. Handling errors gracefully would require a separate refactor. The implementation is based on the Xen Arm kernel loading code. text_offset is available for both 32-bit and 64-bit Image, so fix that. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Introduce MODULES_ALIGNMENT and use it inside place_modules(). - Add if() to avoid underflow when modbase is calculated in the case when modules would overlap the kernel. - Drop unnessary dprintk()s. - "&& size > effective_size" in kernel_image64_probe(). - Use 'size_t' for image_size in struct kernel_info to fit both RV32 and RV64. --- Changes in v4: - Update the patch subject: add "... Linux kernel ...". - Make bi variable unsigned. And use while() instead of for(). - Update the condition which calculates overlapping of kernel with modules. - Reject a malformed image before the loop to avoid wrapping load_addr + image_size in the per-bankcheck below. - Use mathematical representation to print ranges. - Use #error instead of just returning unsupported. - Update the comment above stuct image in kernel_image64_probe(). --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/config.h | 13 ++ xen/arch/riscv/kernel.c | 249 ++++++++++++++++++++++++++++ xen/include/xen/fdt-kernel.h | 11 +- 4 files changed, 272 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/kernel.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index cfc3fdf7d208..eecdcbc76867 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -8,6 +8,7 @@ obj-y +=3D guestcopy.o obj-y +=3D imsic.o obj-y +=3D intc.o obj-y +=3D irq.o +obj-y +=3D kernel.init.o obj-y +=3D mm.o obj-y +=3D p2m.o obj-y +=3D paging.o diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/a= sm/config.h index 0613de008b13..fd69057826e1 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -151,6 +151,19 @@ extern unsigned long phys_offset; /* =3D load_start - XEN_VIRT_START */ #endif =20 +/* + * KERNEL_LOAD_ADDR_ALIGNMENT is defined based on paragraph of + * "Kernel location" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location + */ +#if defined(CONFIG_RISCV_32) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(4) +#elif defined(CONFIG_RISCV_64) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(2) +#else +#error "Define KERNEL_LOAD_ADDR_ALIGNMENT" +#endif + #endif /* ASM__RISCV__CONFIG_H */ /* * Local variables: diff --git a/xen/arch/riscv/kernel.c b/xen/arch/riscv/kernel.c new file mode 100644 index 000000000000..8580cdb32d7a --- /dev/null +++ b/xen/arch/riscv/kernel.c @@ -0,0 +1,249 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ + +/* + * Machine word alignment could be useful for copying to be more efficient. + * There is no reason for now to have bigger module alignment. + */ +#define MODULES_ALIGNMENT sizeof(unsigned long) + +static void __init place_modules(struct kernel_info *info, paddr_t kernbas= e, + paddr_t kernend) +{ + const struct boot_module *mod =3D info->bd.initrd; + const struct membanks *banks =3D kernel_info_get_mem_const(info); + const paddr_t initrd_len =3D ROUNDUP(mod ? mod->size : 0, + MODULES_ALIGNMENT); + const paddr_t dtb_len =3D ROUNDUP(fdt_totalsize(info->fdt), + MODULES_ALIGNMENT); + const paddr_t modsize =3D initrd_len + dtb_len; + unsigned int bi =3D banks->nr_banks; + + if ( modsize < initrd_len ) + panic("Module size overflow: initrd + dtb size wraps paddr_t\n"); + + /* + * Place modules as high in RAM as possible, scanning banks from + * last to first so that the end of the last bank is preferred. + */ + while ( bi-- > 0 ) + { + const struct membank *bank =3D &banks->bank[bi]; + const paddr_t bank_end =3D bank->start + bank->size; + paddr_t modbase; + + if ( modsize > bank->size ) + continue; + + modbase =3D ROUNDDOWN(bank_end - modsize, MODULES_ALIGNMENT); + + if ( modbase < bank->start ) + continue; + + /* + * If modules would overlap the kernel, try placing them below it. + */ + if ( (modbase < ROUNDUP(kernend, MODULES_ALIGNMENT)) && + (modbase + modsize > kernbase) ) + { + /* Avoid underflow below */ + if ( kernbase < modsize ) + continue; + + modbase =3D ROUNDDOWN(kernbase - modsize, MODULES_ALIGNMENT); + if ( modbase < bank->start ) + continue; + } + + info->dtb_paddr =3D modbase; + info->initrd_paddr =3D modbase + dtb_len; + + return; + } + + panic("Unable to find suitable location for dtb+initrd\n"); +} + +static paddr_t __init kernel_image_place(struct kernel_info *info) +{ + paddr_t load_addr =3D INVALID_PADDR; + uint64_t image_size =3D info->image.image_size ?: info->image.len; + const struct membanks *banks =3D kernel_info_get_mem_const(info); + unsigned int nr_banks =3D banks->nr_banks; + unsigned int bi; + + /* + * At the moment, RISC-V's Linux kernel should be always position + * independent based on "Per-MMU execution" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution + * + * But just for the case when RISC-V's Linux kernel isn't position + * independent it is needed to take load address from + * info->image.start. + * + * If `start` is zero, the Image is position independent. + */ + if ( likely(!info->image.start) ) + { + for ( bi =3D 0; bi !=3D nr_banks; bi++ ) + { + const struct membank *bank =3D &banks->bank[bi]; + paddr_t bank_start =3D bank->start; + /* + * According to boot.rst kernel load address should be properly + * aligned: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-locat= ion + * + * As Image in this case is PIC we can ignore + * info->image.text_offset. + */ + paddr_t aligned_start =3D ROUNDUP(bank_start, KERNEL_LOAD_ADDR= _ALIGNMENT); + paddr_t bank_end =3D bank_start + bank->size; + paddr_t bank_size; + + if ( aligned_start > bank_end ) + continue; + + bank_size =3D bank_end - aligned_start; + + if ( image_size <=3D bank_size ) + { + load_addr =3D aligned_start; + break; + } + } + } + else + { + load_addr =3D info->image.start + info->image.text_offset; + + WARN_ON(!IS_ALIGNED(load_addr, KERNEL_LOAD_ADDR_ALIGNMENT)); + + /* + * Reject a malformed image before the loop to avoid wrapping + * load_addr + image_size in the per-bank check below by setting + * bi =3D nr_banks. + * + * image_size covers the kernel from _start (placed at load_addr = =3D + * start + text_offset) through _end. The alignment gap + * [start, load_addr) is padding and need not lie within a bank. + */ + bi =3D image_size <=3D (paddr_t)-1 - load_addr ? 0 : nr_banks; + for ( ; bi !=3D nr_banks; bi++ ) + { + const struct membank *bank =3D &banks->bank[bi]; + paddr_t bank_start =3D bank->start; + paddr_t bank_end =3D bank_start + bank->size; + + if ( (load_addr >=3D bank_start) && + (load_addr + image_size <=3D bank_end) ) + break; + } + } + + if ( bi =3D=3D nr_banks ) + panic("Failed to place kernel image in any memory bank\n"); + + info->entry =3D load_addr; + + return load_addr; +} + +static void __init kernel_image_load(struct kernel_info *info) +{ + int rc; + paddr_t load_addr =3D kernel_image_place(info); + paddr_t paddr =3D info->image.kernel_addr; + paddr_t len =3D info->image.len; + paddr_t effective_size =3D info->image.image_size ?: len; + void *kernel; + + place_modules(info, load_addr, load_addr + effective_size); + + printk("Loading Image from %"PRIpaddr" to [%"PRIpaddr",%"PRIpaddr")\n", + paddr, load_addr, load_addr + effective_size); + + kernel =3D ioremap_cache(paddr, len); + + if ( !kernel ) + panic("Unable to map kernel\n"); + + /* Move kernel to proper location in guest phys map */ + rc =3D copy_to_guest_phys(info->bd.d, load_addr, kernel, len); + + if ( rc ) + panic("Unable to copy kernel to proper guest location\n"); + + iounmap(kernel); +} + +/* Check if the image is a 64-bit Image */ +static int __init kernel_image64_probe(struct kernel_info *info, + paddr_t addr, paddr_t size) +{ + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rs= t */ + struct { + uint32_t code0; /* Executable code */ + uint32_t code1; /* Executable code */ + uint64_t text_offset; /* Image load offset, little endian */ + uint64_t image_size; /* Effective Image size, little endian */ + uint64_t flags; /* kernel flags, little endian */ + uint32_t version; /* Version of this header */ + uint32_t res1; /* Reserved */ + uint64_t res2; /* Reserved */ + uint64_t magic; /* Deprecated: Magic number, little endian= , "RISCV" */ + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05= " */ + uint32_t res3; /* Reserved for PE COFF offset */ + } image; + uint64_t effective_size; + + if ( size < sizeof(image) ) + return -EINVAL; + + copy_from_paddr(&image, addr, sizeof(image)); + + /* Magic v1 is deprecated and may be removed. Only use v2 */ + if ( le32_to_cpu(image.magic2) !=3D IMAGE64_MAGIC_V2 ) + return -EINVAL; + + effective_size =3D le64_to_cpu(image.image_size); + + if ( !effective_size ) + return -EINVAL; + + info->image.kernel_addr =3D addr; + /* Actual size in the binary file */ + info->image.len =3D size; + /* Total memory the kernel occupies at runtime */ + info->image.image_size =3D effective_size; + info->image.text_offset =3D le64_to_cpu(image.text_offset); + info->image.start =3D 0; + + info->load =3D kernel_image_load; + + return 0; +} + +int __init kernel_image_probe(struct kernel_info *info, paddr_t addr, + paddr_t size) +{ +#ifdef CONFIG_RISCV_64 + return kernel_image64_probe(info, addr, size); +#else +# error "Only 64-bit RISC-V is supported" +#endif +} diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 8cd1670c2c6f..00c37be101bf 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -59,8 +59,15 @@ struct kernel_info { struct { paddr_t kernel_addr; paddr_t len; -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) - paddr_t text_offset; /* 64-bit Image only */ +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) + /* + * ARM: 64-bit Image only. + * RISC-V: both 32-bit and 64-bit Images. + */ + paddr_t text_offset; +#endif +#if defined(CONFIG_RISCV) + size_t image_size; /* Effective size of Image */ #endif paddr_t start; /* Must be 0 for 64-bit Image */ } image; --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778144383; cv=none; d=zohomail.com; s=zohoarc; b=IATk3HSCLkWKIC9ihdn5mX1CNCbuo1kUrjAgk4B5D2/dXp/VJVzdVqeYKYMaqKTYdZg1E4/rNHaVfpfnnCl1xPmVQhocnv3wyTUn++kyjKDIelIBy7O5GkJM4y8k9ZH79ooFcIXbJDIXLeZqkCUVt+O0GSGT+Pyl5V4QmBZtZzE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778144383; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=qAuPJneSAYatfg2rA6nZoLGovOQ+ak9UxFQxy6EAhlE=; b=eEcOENGtS4FALWb5a8bMXhFtn/bd8vdBoDgLrfsHQ+U4wn9ZLB71V6Ue/8VN/EiAM1UY4XJcW7V/D37FVSlDOnzkqVDinIXkbsvF5Y4Om0g+OnXYNuI5SqhPtlbG2IsDjbuGQpx9g/pvsdoW9ss4fiPQn6KfyeEJOW5p7T6Yabs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1778144383095273.3909125890291; Thu, 7 May 2026 01:59:43 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1302339.1576346 (Exim 4.92) (envelope-from ) id 1wKuZi-00043V-U7; Thu, 07 May 2026 08:59:18 +0000 Received: by outflank-mailman (output) from mailman id 1302339.1576346; Thu, 07 May 2026 08:59:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZi-00042c-G5; Thu, 07 May 2026 08:59:18 +0000 Received: by outflank-mailman (input) for mailman id 1302339; Thu, 07 May 2026 08:59:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZh-0003up-04 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZg-005UsV-DG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:16 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545b-e002-0a2a0a5209dd-0a2a450a89e4-20 for ; Thu, 07 May 2026 10:59:16 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5464-56b3-0a2a450a0019-d155da29dc61-3 for ; Thu, 07 May 2026 10:59:16 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bc64ad08bf9so94019066b.0 for ; Thu, 07 May 2026 01:59:16 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:14 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144355; x=1778749155; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qAuPJneSAYatfg2rA6nZoLGovOQ+ak9UxFQxy6EAhlE=; b=U9LHd0LtVOgAvONLRvkRWjjHsPen9yAUYRqpdGDqBpVUHqnjWSQGJJzmi2LIB6rq+h hMiMrawrIF26S5wypjeOYX/PDNSYd6jDRo+Op/X+zzjYEgcUPQYfQZLtuFWFn4OTLvtA R39ezyzen35rMm+suF8ltT9nHQLNkouYbw1Ox7BPzOB+7e5Zc6zo7IVX/uMlgav4jkH3 Y8YewCwP/4e2ke+sWdubbwHqGR+wRWglEGStaKQC07y1kiuofV/LSkBronhxSSEGT6IP wX8xk0BSjsxDTxm2002d3kA7E9S+GszVLnMpjFnYgyrmbKOfJ85u3dSu3z8LvRi0/DRq oq2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144355; x=1778749155; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=qAuPJneSAYatfg2rA6nZoLGovOQ+ak9UxFQxy6EAhlE=; b=hIQCplKvSo4vUqlZsy4Xphwp/fROBMoZBLi3vSptAqrkpYpTPbQfgOJBFdj0vb/dfH RGvwLrq7IHbgI3/YgW/V1v2z/PNd3OMLJMDbwMxiYVNrmqWu3W2SLvhUOsoF3Kyg483x V4oCe9lMeB3XoxIAir9d6FwDE/cmTTBK2l53cnSYy4WMYYLzPquZ3vlHwVUPzpYg29Fw hIe7ZanvKTjMhpmSq1FGRISpFDr6sikrcSCBLJJ3jPrBMJfMpuQaks4H00urWc/EmvPR /0ElPuyOCK4QrRc6NnvIOhVb1xk6/S5LomjtHTe+jov7MLno4m9HhSjhwAPSczeYDPAC n92Q== X-Gm-Message-State: AOJu0Yz9vouZXtyDDZcqfPud/D+yKj1kijgp9WM7vXbXYgpXj0JqH+m9 2XEEh0ePFCKsMCktxplpzi0ql21wlwaneVY73Ujx2ASxaPYjkQMxArr9dbv5yg== X-Gm-Gg: AeBDievotDwIYX9praCoI/mXKotpVFhptSti0tttRM/FB9hhM/fKorHEIKEBDCw6/Ax fAW4I6scVfu5SawOCj3i0On9feHvF6pTKcs5jZSKsg1lMeK2WVKRPg5KhtBxoCHUrHoxbVM0B4Z jlOhlPBxUUuhW4E577iwpKixQikf3LzGXojCJEmAlGl0IBGuCy+ga/aF25/ZyeShGi5IbLxdxmQ YMmNAP66kPWMiERsX08K0U2QGssS1ujkxr3wKcoi3zEan2Egzp2G5x7tkWrk1k+g+DxIZZ3aZSo O07WbOQ2lZhTkGSBYia5BlwI6pl/iKiD2lj8rU4lCVZydUg1dAGP/S9w3gIi3vaXHVfEIjwkQ2c 8FQSP7v7SQPtV9vf79GwYGyoUmlw/SWTH88eh3MnquqzrBDWtkR2mV94Ti/wTg3bSeZrNbps9II XIzqUVukyjtfsFIhv6iM9jULQAoMs3IwAIDIeQzlTpFDrqzyp/uIt+M/QEakOcYCjCPL64yBnML bvv X-Received: by 2002:a17:906:ef0c:b0:ba8:8094:f7af with SMTP id a640c23a62f3a-bc56cb26ef7mr362000766b.18.1778144354954; Thu, 07 May 2026 01:59:14 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 08/11] xen/riscv: rework G-stage mode handling Date: Thu, 7 May 2026 10:58:47 +0200 Message-ID: <5a48ba01dad3a54b404524956fb39e7e3e673a93.1778140240.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1778144356-7E9888B7-399D1844/10/73395122804 X-purgate-type: spam X-purgate-size: 15692 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1778144385383158500 Content-Type: text/plain; charset="utf-8" Rework G-stage mode handling to make the selected mode descriptor reusable outside of p2m initialization, both for filling CPU nodes in the device tree passed to dom0less guests and for per-domain G-stage mode selection at domain creation time. Promote gstage_modes[] from a local __initconst variable inside gstage_mode_detect() to a file-scope static const array, and convert max_gstage_mode from an embedded struct (assigned by value) to a global const pointer into gstage_modes[]. This allows referencing both the mode identifier and the mode name after init without copying the descriptor. Remove get_max_supported_mode(); its callers now dereference max_gstage_mode->mode directly. Change struct p2m_domain::mode from an embedded gstage_mode_desc to a const pointer into gstage_modes[], so each domain shares the descriptor rather than carrying its own copy. Adjust the gstage_modes[] entries in three ways: - Use lowercase names without the "x4" suffix (e.g. "sv39" instead of "Sv39x4"). The DT mmu-type binding [1] does not include the suffix, so the name can now be passed directly to the guest without transformation. The suffix is appended only in the diagnostic printk, where it remains informative. - Use "none" for Bare mode (HGATP_MODE_OFF) to match the DT binding. - Change paging_levels to represent the root page-table level index (i.e. total paging levels minus one) rather than the total count. P2M_ROOT_LEVEL() now returns the correct VPN index directly, without requiring callers to subtract one or use hardcoded offsets. Add gstage_mode to xen_arch_domainconfig so the toolstack can request a specific G-stage mode at domain creation time. Introduce find_gstage_mode() to resolve a mode descriptor by HGATP_MODE_*, capping the result at max_gstage_mode to prevent requesting a mode the hardware does not support. Update p2m_init() to accept a xen_domctl_createdomain pointer and call find_gstage_mode() instead of hardcoding Sv39x4. Add arch_parse_dom0less_node() in a new dom0less-build.c to read the "mmu-type" DT property from a guest domain node and store it in boot_domain::create_cfg.arch.gstage_mode, falling back to maximum supported mode when the property is absent. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /Documentation/devicetree/bindings/riscv/cpus.yaml?h=3Dv6.19-rc3#n82 Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - update the comment inside arch_parse_dom0less_node() before return 0; - Code style fixes. - Compare pointers instead of fields in p2m_init() as they should point to= the same. - s/find_gstage_mode_by_bits/find_gstage_mode. --- --- Changes in v4: - Stray blank after * in declaration of find_gstage_mode(). - Refactor find_gstage_mode(). Now it is find_gstage_mode_by_bits(). - Add __ro_after_init for static local variable m in p2m_init. - s/ char gstage_mode[8];/unsigned char gstage_mode; in struct vcpu_guest_= context. - s/modes/gstage_modes in p2m.c. - Introduce P2M_EXTRA_BITS_AT_LEVEL and re-use P2M_ROOT_EXTRA_BITS to enco= de magic constant 2. --- Changes in v3: - New patch. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/dom0less-build.c | 71 ++++++++++++++++++ xen/arch/riscv/include/asm/p2m.h | 18 +++-- xen/arch/riscv/p2m.c | 121 +++++++++++++++++++++---------- xen/arch/riscv/vmid.c | 2 +- xen/include/public/arch-riscv.h | 5 ++ 6 files changed, 172 insertions(+), 46 deletions(-) create mode 100644 xen/arch/riscv/dom0less-build.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index eecdcbc76867..8f7fd625dddd 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y +=3D aplic.o obj-y +=3D cpufeature.o obj-y +=3D domain.o +obj-$(CONFIG_DOM0LESS_BOOT) +=3D dom0less-build.init.o obj-$(CONFIG_EARLY_PRINTK) +=3D early_printk.o obj-y +=3D entry.o obj-y +=3D extable.o diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-buil= d.c new file mode 100644 index 000000000000..a683972e9235 --- /dev/null +++ b/xen/arch/riscv/dom0less-build.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include + +int __init arch_parse_dom0less_node(struct dt_device_node *node, + struct boot_domain *bd) +{ + const char *mmu_type; + unsigned long bits; + const char *end; + + if ( dt_property_read_string(node, "mmu-type", &mmu_type) ) + { + dprintk(XENLOG_WARNING, "mmu-type property is missing in guest dom= ain " + "node. %s will be used as fallback\n", max_gstage_mode->na= me); + + bits =3D P2M_GFN_LEVEL_SHIFT(max_gstage_mode->paging_levels + 1); + + goto out; + } + + if ( !strcasecmp(mmu_type, "riscv,none") ) + { + dprintk(XENLOG_ERR, "Bare mode isn't supported by Xen\n"); + + return -EOPNOTSUPP; + } + + if ( strncasecmp(mmu_type, "riscv,sv", 8) ) + { + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_ty= pe); + + return -EINVAL; + } + + bits =3D simple_strtoul(mmu_type + 8, &end, 10); + if ( (*end !=3D '\0') || (end =3D=3D mmu_type + 8) ) + { + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_ty= pe); + + return -EINVAL; + } + + out: + if ( bits > (UINT8_MAX - P2M_ROOT_EXTRA_BITS) ) + { + dprintk(XENLOG_ERR, "gstage addr bits value overflows uint8\n"); + + return -EINVAL; + } + + /* + * The mmu-type property may specify any riscv,sv string, but only = the + * following are currently supported: + * - riscv,sv32 + * - riscv,sv39 + * - riscv,sv48 + * - riscv,sv57 + * Any other value will be rejected by find_gstage_mode(). + * + * P2M_ROOT_EXTRA_BITS is added because for G-stage mode, GPAs are + * extended by that many bits. + */ + bd->create_cfg.arch.gaddr_bits =3D bits + P2M_ROOT_EXTRA_BITS; + + return 0; +} diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/= p2m.h index 54ea67990f06..638c60ddc2f7 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -13,7 +13,7 @@ =20 #define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) #define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) -#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode.paging_levels) +#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode->paging_levels) =20 /* * According to the RISC-V spec: @@ -32,10 +32,13 @@ */ #define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl) =20 -#define P2M_ROOT_EXTRA_BITS(p2m, lvl) (2 * ((lvl) =3D=3D P2M_ROOT_LEVEL(p2= m))) +#define P2M_ROOT_EXTRA_BITS 2 + +#define P2M_LEVEL_EXTRA_BITS(p2m, lvl) \ + (P2M_ROOT_EXTRA_BITS * ((lvl) =3D=3D P2M_ROOT_LEVEL(p2m))) =20 #define P2M_PAGETABLE_ENTRIES(p2m, lvl) \ - (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(p2m, lvl), UL)) + (BIT(PAGETABLE_ORDER + P2M_LEVEL_EXTRA_BITS(p2m, lvl), UL)) =20 #define P2M_TABLE_OFFSET(p2m, lvl) (P2M_PAGETABLE_ENTRIES(p2m, lvl) - 1UL) =20 @@ -55,6 +58,8 @@ struct gstage_mode_desc { char name[8]; }; =20 +extern const struct gstage_mode_desc *max_gstage_mode; + /* Per-p2m-table state */ struct p2m_domain { /* @@ -68,7 +73,7 @@ struct p2m_domain { /* The root of the p2m tree. May be concatenated */ struct page_info *root; =20 - struct gstage_mode_desc mode; + const struct gstage_mode_desc *mode; =20 /* Back pointer to domain */ struct domain *domain; @@ -215,9 +220,10 @@ static inline bool arch_acquire_resource_check(struct = domain *d) } =20 void guest_mm_init(void); -unsigned char get_max_supported_mode(void); =20 -int p2m_init(struct domain *d); +struct xen_domctl_createdomain; + +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *confi= g); =20 static inline void p2m_write_lock(struct p2m_domain *p2m) { diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index adcf292a7092..f889978cf754 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -45,12 +45,28 @@ struct p2m_pte_ctx { unsigned int level; /* Paging level at which the PTE resides.= */ }; =20 -static struct gstage_mode_desc __ro_after_init max_gstage_mode =3D { - .mode =3D HGATP_MODE_OFF, - .paging_levels =3D 0, - .name =3D "Bare", +/* Values should be sorted by ->mode in this array */ +static const struct gstage_mode_desc gstage_modes[] =3D { + /* + * Based on the RISC-V spec: + * Bare mode is always supported, regardless of SXLEN. + * When SXLEN=3D32, the only other valid setting for MODE is Sv32. + * When SXLEN=3D64, three paged virtual-memory schemes are defined: + * Sv39, Sv48, and Sv57. + */ + { HGATP_MODE_OFF, 0, "none" }, +#ifdef CONFIG_RISCV_32 + { HGATP_MODE_SV32X4, 1, "sv32" }, +#else + { HGATP_MODE_SV39X4, 2, "sv39" }, + { HGATP_MODE_SV48X4, 3, "sv48" }, + { HGATP_MODE_SV57X4, 4, "sv57" }, +#endif }; =20 +const struct gstage_mode_desc *__ro_after_init max_gstage_mode =3D + &gstage_modes[0]; + static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); =20 static inline void p2m_free_metadata_page(struct p2m_domain *p2m, @@ -63,11 +79,6 @@ static inline void p2m_free_metadata_page(struct p2m_dom= ain *p2m, } } =20 -unsigned char get_max_supported_mode(void) -{ - return max_gstage_mode.mode; -} - /* * If anything is changed here, it may also require updates to * p2m_{get,set}_type(). @@ -148,41 +159,24 @@ static pte_t *p2m_get_root_pointer(struct p2m_domain = *p2m, gfn_t gfn) =20 static void __init gstage_mode_detect(void) { - static const struct gstage_mode_desc modes[] __initconst =3D { - /* - * Based on the RISC-V spec: - * Bare mode is always supported, regardless of SXLEN. - * When SXLEN=3D32, the only other valid setting for MODE is Sv3= 2. - * When SXLEN=3D64, three paged virtual-memory schemes are defin= ed: - * Sv39, Sv48, and Sv57. - */ -#ifdef CONFIG_RISCV_32 - { HGATP_MODE_SV32X4, 2, "Sv32x4" } -#else - { HGATP_MODE_SV39X4, 3, "Sv39x4" }, - { HGATP_MODE_SV48X4, 4, "Sv48x4" }, - { HGATP_MODE_SV57X4, 5, "Sv57x4" }, -#endif - }; - - for ( unsigned int mode_idx =3D ARRAY_SIZE(modes); mode_idx-- > 0; ) + for ( unsigned int mode_idx =3D ARRAY_SIZE(gstage_modes); mode_idx-- >= 0; ) { - unsigned long mode =3D modes[mode_idx].mode; + unsigned long mode =3D gstage_modes[mode_idx].mode; =20 csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK)); =20 if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) =3D=3D mode ) { - max_gstage_mode =3D modes[mode_idx]; + max_gstage_mode =3D &gstage_modes[mode_idx]; =20 break; } } =20 - if ( max_gstage_mode.mode =3D=3D HGATP_MODE_OFF ) + if ( max_gstage_mode->mode =3D=3D HGATP_MODE_OFF ) panic("Xen expects that G-stage won't be Bare mode\n"); =20 - printk("Max supported G-stage mode is %s\n", max_gstage_mode.name); + printk("Max supported G-stage mode is %sx4\n", max_gstage_mode->name); =20 csr_write(CSR_HGATP, 0); =20 @@ -283,7 +277,7 @@ static void clear_and_clean_page(struct page_info *page= , bool clean_dcache) unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid) { return MASK_INSR(mfn_x(page_to_mfn(p2m->root)), HGATP_PPN_MASK) | - MASK_INSR(p2m->mode.mode, HGATP_MODE_MASK) | + MASK_INSR(p2m->mode->mode, HGATP_MODE_MASK) | MASK_INSR(vmid, HGATP_VMID_MASK); } =20 @@ -331,8 +325,35 @@ static int p2m_alloc_root_table(struct p2m_domain *p2m) return 0; } =20 -int p2m_init(struct domain *d) +static const struct gstage_mode_desc *find_gstage_mode( + unsigned char gpa_bits) +{ + ASSERT(gstage_modes[0].mode =3D=3D HGATP_MODE_OFF); + + for ( unsigned int i =3D 1; i < ARRAY_SIZE(gstage_modes); i++ ) + { + unsigned int lvl =3D gstage_modes[i].paging_levels + 1; + unsigned int bits =3D P2M_GFN_LEVEL_SHIFT(lvl) + P2M_ROOT_EXTRA_BI= TS; + + if ( gpa_bits =3D=3D bits ) + { + if ( gstage_modes[i].mode > max_gstage_mode->mode ) + return NULL; + return &gstage_modes[i]; + } + } + + return NULL; +} + +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *confi= g) { + /* + * TODO: This static is a temporary constraint: all guests must use the + * same MMU mode because p2m_gpa_bits is not yet per-domain. + * Drop this once per-domain p2m_gpa_bits is introduced. + */ + static const struct gstage_mode_desc __ro_after_init *m =3D &gstage_mo= des[0]; struct p2m_domain *p2m =3D p2m_get_hostp2m(d); =20 /* @@ -341,6 +362,33 @@ int p2m_init(struct domain *d) */ p2m->domain =3D d; =20 + if ( !config ) + { + dprintk(XENLOG_ERR, "NULL config is passed\n"); + return -EINVAL; + } + + p2m->mode =3D find_gstage_mode(config->arch.gaddr_bits); + + if ( !p2m->mode ) + { + dprintk(XENLOG_ERR, + "Unsupported or unavailable gstage addr bits: %u\n", + config->arch.gaddr_bits); + + return -EINVAL; + } + + if ( m->mode =3D=3D HGATP_MODE_OFF ) + m =3D p2m->mode; + + if ( m !=3D p2m->mode ) + { + dprintk(XENLOG_ERR, + "Mode should be the same for all guests at the moment\n"); + return -EINVAL; + } + paging_domain_init(d); =20 rwlock_init(&p2m->lock); @@ -362,11 +410,6 @@ int p2m_init(struct domain *d) # error "Add init of p2m->clean_dcache" #endif =20 - /* TODO: don't hardcode used for a domain g-stage mode. */ - p2m->mode.mode =3D HGATP_MODE_SV39X4; - p2m->mode.paging_levels =3D 2; - safe_strcpy(p2m->mode.name, "Sv39x4"); - return 0; } =20 @@ -1304,7 +1347,7 @@ static mfn_t p2m_get_entry(struct p2m_domain *p2m, gf= n_t gfn, { unsigned int level =3D P2M_ROOT_LEVEL(p2m); unsigned int gfn_limit_bits =3D - P2M_LEVEL_ORDER(level + 1) + P2M_ROOT_EXTRA_BITS(p2m, level); + P2M_LEVEL_ORDER(level + 1) + P2M_LEVEL_EXTRA_BITS(p2m, level); pte_t entry, *table; int rc; mfn_t mfn =3D INVALID_MFN; diff --git a/xen/arch/riscv/vmid.c b/xen/arch/riscv/vmid.c index 8fbcd500f24d..11c7e9d6d6c8 100644 --- a/xen/arch/riscv/vmid.c +++ b/xen/arch/riscv/vmid.c @@ -52,7 +52,7 @@ static DEFINE_PER_CPU(struct vmid_data, vmid_data); static unsigned int vmidlen_detect(void) { unsigned int vmid_bits; - unsigned char gstage_mode =3D get_max_supported_mode(); + unsigned char gstage_mode =3D max_gstage_mode->mode; =20 /* * According to the RISC-V Privileged Architecture Spec: diff --git a/xen/include/public/arch-riscv.h b/xen/include/public/arch-risc= v.h index 360d8e6871ba..1990a1eb748c 100644 --- a/xen/include/public/arch-riscv.h +++ b/xen/include/public/arch-riscv.h @@ -56,6 +56,11 @@ typedef struct vcpu_guest_context vcpu_guest_context_t; DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 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The variable is initialised to PADDR_BITS and narrowed in p2m_init() to the GPA width of the selected G-stage mode, allowing an external entity (e.g. an IOMMU) to restrict it further if needed. p2m_gpa_bits is a global rather than a per-domain value, which is acceptable for now because all domains are required to use the same G-stage MMU mode, as dom0less common code allocates it per all domains. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Update initialization of p2m_gpa_bits and the comment above. - Rework how p2m_gpa_bits is limited. - Update the commit message. --- Changes in v2: - New patch. --- --- xen/arch/riscv/include/asm/p2m.h | 3 +++ xen/arch/riscv/p2m.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/= p2m.h index 638c60ddc2f7..0d1dace1a0d8 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -47,6 +47,9 @@ #define P2M_LEVEL_MASK(p2m, lvl) \ (P2M_TABLE_OFFSET(p2m, lvl) << P2M_GFN_LEVEL_SHIFT(lvl)) =20 +/* Holds the bit size of GPAs in p2m tables */ +extern unsigned int p2m_gpa_bits; + #define paddr_bits PADDR_BITS =20 /* Get host p2m table */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index f889978cf754..703b9f4d2540 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -11,6 +11,8 @@ #include #include =20 +#include + #include #include #include @@ -67,6 +69,12 @@ static const struct gstage_mode_desc gstage_modes[] =3D { const struct gstage_mode_desc *__ro_after_init max_gstage_mode =3D &gstage_modes[0]; =20 +/* + * Set to the maximum configured support for GPA bits, so the number of GPA + * bits can be restricted by an external entity (e.g. IOMMU). + */ +unsigned int __ro_after_init p2m_gpa_bits =3D PADDR_BITS; + static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); =20 static inline void p2m_free_metadata_page(struct p2m_domain *p2m, @@ -355,6 +363,7 @@ int p2m_init(struct domain *d, const struct xen_domctl_= createdomain *config) */ static const struct gstage_mode_desc __ro_after_init *m =3D &gstage_mo= des[0]; struct p2m_domain *p2m =3D p2m_get_hostp2m(d); + unsigned int gpa_bits; =20 /* * "Trivial" initialisation is now complete. Set the backpointer so t= he @@ -410,6 +419,12 @@ int p2m_init(struct domain *d, const struct xen_domctl= _createdomain *config) # error "Add init of p2m->clean_dcache" #endif =20 + gpa_bits =3D P2M_GFN_LEVEL_SHIFT(p2m->mode->paging_levels + 1) + + P2M_ROOT_EXTRA_BITS; + + if ( gpa_bits < p2m_gpa_bits ) + p2m_gpa_bits =3D gpa_bits; + return 0; } =20 --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1778144380; cv=none; d=zohomail.com; s=zohoarc; b=GWw4k//SKp5uF2gi/tOjF9bvp/fd/rmS+TsiVJdofzkzkmRuA9uIic70dEVuEOSaZiuWuu2frBmSG6auBAXV2xUrvQH1AiZNLUdzRk9DLQmHX5Y/hJbb/20OVNTmtqPfowkWy5qnNzuyHFjs0qJdwfQxNCE0OwfoliqXsjSK7Fc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778144380; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=x4xx6/9HjQw0qDDPVFVAifvL6T1Uk5lWG9wv0V6Tryc=; b=FdxaWqsovt0YvzmwcG1IdeQDNGSb44pT569efVZsKA6RZbAQZqkac9js16qG6FHlEUHh0b+YW5nSDGXC/booS1Rpv5wIQLepIcwyJMlTdRW2HH9UnmiHdAcy1ZSKOtSLDXbmALn9F255xIxWQK+oV+9/Y7aq2TWTHJsCxx4a6rQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 177814437999971.25141309379865; Thu, 7 May 2026 01:59:39 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1302344.1576367 (Exim 4.92) (envelope-from ) id 1wKuZl-0004qn-V0; Thu, 07 May 2026 08:59:21 +0000 Received: by outflank-mailman (output) from mailman id 1302344.1576367; Thu, 07 May 2026 08:59:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZl-0004q1-Ka; Thu, 07 May 2026 08:59:21 +0000 Received: by outflank-mailman (input) for mailman id 1302344; Thu, 07 May 2026 08:59:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZj-0004BH-EO for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZi-005UsV-RG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:18 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545f-e002-0a2a0a5209dd-0a2a4501ca64-46 for ; Thu, 07 May 2026 10:59:18 +0200 Received: from [209.85.208.46] (helo=mail-ed1-f46.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5466-c1f2-0a2a45010019-d155d02ecdcd-3 for ; Thu, 07 May 2026 10:59:18 +0200 Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-67c1e0229acso818406a12.1 for ; Thu, 07 May 2026 01:59:18 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The reason for 2 banks is that there is typically always a use case for low memory under 4 GB, but the bank under 4 GB ends up being small because there are other things under 4 GB it can conflict with (interrupt controller, PCI BARs, etc.). So a second bank is added above that MMIO region (starting at 8 GiB) to provide the remaining RAM; the gap between the two banks also exercises code paths handling discontiguous memory. For Sv32 guests (34-bit GPA, 16 GiB addressable), bank0 provides 2 GB (2=E2=80=934 GB) and the first 8 GB of bank1 (8=E2=80=9316 GB) is accessibl= e. Extended regions are useful for RISC-V: they could be used to provide a "space" for Linux to map grant mappings. Despite the fact that for every guest MMU mode the GPA could be up to 56 bits wide (except Sv32 whose GPA is 34 bits), the combined size of both banks is limited to 1018 GB as it is more than enough for most use cases. Add inclusion of asm/guest-layout.h to asm/domain.h to make dom0less common code build happy. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Move GUEST_RAM*-related defines to asm/p2m.h instead of public header. --- Changes in v2: - New patch. --- --- xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/guest-layout.h | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 xen/arch/riscv/include/asm/guest-layout.h diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index 6c48bf13111d..6044ce0feee0 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -7,6 +7,7 @@ #include #include =20 +#include #include #include =20 diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/inc= lude/asm/guest-layout.h new file mode 100644 index 000000000000..68d95a09394c --- /dev/null +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -0,0 +1,23 @@ +#ifndef ASM_RISCV_GUEST_LAYOUT_H +#define ASM_RISCV_GUEST_LAYOUT_H + +#include + +#define GUEST_RAM_BANKS 2 + +/* + * The way to find the extended regions (to be exposed to the guest as unu= sed + * address space) relies on the fact that the regions reserved for the RAM + * below are big enough to also accommodate such regions. + */ +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2G= B */ +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) + +#define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016 GB of RAM @ = 8GB */ +#define GUEST_RAM1_SIZE xen_mk_ullong(0xFE00000000) + +/* TODO: allocate these all dynamically */ +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } + +#endif /* ASM_RISCV_GUEST_LAYOUT_H */ --=20 2.54.0 From nobody Tue May 26 03:29:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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So enable it. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v5: - Nothing changed. Only rebase. --- Changes in v3: - Add Acked-by: Jan Beulich . --- Changes in v2: - Move introduction of p2m_ipa_bits to separate patch. - Move to separate patch introduction of guest banks constansts. --- --- xen/arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index a5e87c1757f7..41426c205292 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -1,5 +1,6 @@ config RISCV def_bool y + select DOMAIN_BUILD_HELPERS select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME select GENERIC_UART_INIT --=20 2.54.0