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charset="utf-8" From: Jan Beulich ... as far as we presently use them in the codebase. Signed-off-by: Jan Beulich Signed-off-by: Teddy Astie --- I don't know to which extend Reviewed-by applies as I only applied Andrew's proposal. xen/include/xen/lib/x86/cpu-policy.h | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86= /cpu-policy.h index f94f23e159..8772ef80e3 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -121,7 +121,32 @@ struct cpu_policy uint64_t :64, :64; /* Leaf 0x3 - PSN. */ uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ - uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ + + /* Leaf 0x6 - Therm/Perf. */ + bool :1, + turbo:1, + arat:1, + :1, + :1, + :1, + :1, + hwp:1, + hwp_notification:1, + hwp_activity_window:1, + hwp_epp:1, + hwp_plr:1, + :1, + hdc:1, + :1, + :1, + hwp_peci:1, + :1, + :1, + hw_feedback:1; + uint32_t :32; /* b */ + bool aperfmperf:1; + uint32_t :32; /* d */ + uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ uint64_t :64, :64; /* Leaf 0x8 - rsvd */ uint64_t :64, :64; /* Leaf 0x9 - DCA */ --=20 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From nobody Thu Jan 8 12:33:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass header.i=teddy.astie@vates.tech; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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charset="utf-8" xenpm doesn't provide any interesting usable features outside of x86, skip building it if we are not x86. Suggested-by: Jan Beulich Signed-off-by: Teddy Astie Acked-by: Anthony PERARD --- CHANGELOG.md | 3 +++ tools/misc/Makefile | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 3aaf598623..1fa58ce848 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -16,6 +16,9 @@ The format is based on [Keep a Changelog](https://keepach= angelog.com/en/1.0.0/) deprecated in Xen 4.7 and noted not to work correctly with AMD CPUs f= rom 2011 onwards. =20 + - Removed xenpm on non-x86 platforms as it doesn't actually provide anyth= ing + useful outside of x86. + ## [4.21.0](https://xenbits.xenproject.org/gitweb/?p=3Dxen.git;a=3Dshortlo= g;h=3DRELEASE-4.21.0) - 2025-11-19 =20 ### Changed diff --git a/tools/misc/Makefile b/tools/misc/Makefile index c26e544e83..672df02c3b 100644 --- a/tools/misc/Makefile +++ b/tools/misc/Makefile @@ -23,13 +23,13 @@ INSTALL_SBIN-$(CONFIG_X86) +=3D xen-lowmemd INSTALL_SBIN-$(CONFIG_X86) +=3D xen-mceinj INSTALL_SBIN-$(CONFIG_X86) +=3D xen-memshare INSTALL_SBIN-$(CONFIG_X86) +=3D xen-mfndump +INSTALL_SBIN-$(CONFIG_X86) +=3D xenpm INSTALL_SBIN-$(CONFIG_X86) +=3D xen-ucode INSTALL_SBIN-$(CONFIG_X86) +=3D xen-vmtrace INSTALL_SBIN +=3D xencov INSTALL_SBIN +=3D xenhypfs INSTALL_SBIN +=3D xenlockprof INSTALL_SBIN +=3D xenperf -INSTALL_SBIN +=3D xenpm INSTALL_SBIN +=3D xenwatchdogd INSTALL_SBIN +=3D xen-access INSTALL_SBIN +=3D xen-livepatch --=20 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From nobody Thu Jan 8 12:33:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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charset="utf-8" Intel provide CPU sensors through "DTS" MSRs. As these MSR are core-specific (or package-specific), we can't reliably fetch them from Dom0 directly. Expose these MSR (if supported) through XENPF_resource_op so that it is accessible through hypercall. Suggested-by: Jan Beulich Signed-off-by: Teddy Astie Reviewed-by: Jan Beulich --- xen/arch/x86/include/asm/msr-index.h | 3 +++ xen/arch/x86/platform_hypercall.c | 6 ++++++ xen/include/xen/lib/x86/cpu-policy.h | 2 +- 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/as= m/msr-index.h index df52587c85..b92a278611 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -115,6 +115,9 @@ #define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) #define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) =20 +#define MSR_TEMPERATURE_TARGET 0x000001a2 +#define MSR_PACKAGE_THERM_STATUS 0x000001b1 + #define MSR_FRED_RSP_SL0 0x000001cc #define MSR_FRED_RSP_SL1 0x000001cd #define MSR_FRED_RSP_SL2 0x000001ce diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hype= rcall.c index 79bb99e0b6..2f84494759 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -86,6 +87,11 @@ static bool msr_read_allowed(unsigned int msr) =20 case MSR_MCU_OPT_CTRL: return cpu_has_srbds_ctrl; + =20 + case MSR_IA32_THERM_STATUS: + case MSR_TEMPERATURE_TARGET: + case MSR_PACKAGE_THERM_STATUS: + return host_cpu_policy.basic.dts; } =20 if ( ppin_msr && msr =3D=3D ppin_msr ) diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86= /cpu-policy.h index 8772ef80e3..0362f1cb24 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -123,7 +123,7 @@ struct cpu_policy uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ =20 /* Leaf 0x6 - Therm/Perf. */ - bool :1, + bool dts:1, turbo:1, arat:1, :1, --=20 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From nobody Thu Jan 8 12:33:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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charset="utf-8" get-intel-temp allows querying the per-core CPU temperature and per-package one on Intel processors (as usual Dom0 drivers cannot work due to misalignment between Dom0 vCPU and pCPUs). Signed-off-by: Teddy Astie --- CHANGELOG.md | 3 ++ tools/misc/xenpm.c | 113 ++++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 115 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 1fa58ce848..f55d77016c 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,6 +9,9 @@ The format is based on [Keep a Changelog](https://keepachan= gelog.com/en/1.0.0/) ### Changed =20 ### Added + - On x86: + - Introduce get-intel-temp to xenpm to query CPU temperatures on Intel + platforms. =20 ### Removed - On x86: diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c index 682d092479..5a411b5a30 100644 --- a/tools/misc/xenpm.c +++ b/tools/misc/xenpm.c @@ -32,11 +32,14 @@ =20 #include =20 +#include + #define MAX_PKG_RESIDENCIES 12 #define MAX_CORE_RESIDENCIES 8 =20 static xc_interface *xc_handle; static unsigned int max_cpu_nr; +static xc_physinfo_t physinfo; =20 /* help message */ void show_help(void) @@ -93,6 +96,7 @@ void show_help(void) " units default to \= "us\" if unspecified.\n" " truncates un-repre= sentable values.\n" " 0 lets the hardwar= e decide.\n" + " get-intel-temp [cpuid] get Intel CPU temperatur= e of or all\n" " start [seconds] start collect Cx/Px stat= istics,\n" " output after CTRL-C or S= IGINT or several seconds.\n" " enable-turbo-mode [cpuid] enable Turbo Mode for pr= ocessors that support it.\n" @@ -1354,6 +1358,113 @@ void enable_turbo_mode(int argc, char *argv[]) errno, strerror(errno)); } =20 +static int fetch_dts_temp(xc_interface *xch, uint32_t cpu, bool package, i= nt *temp) +{ + xc_resource_entry_t entries[] =3D { + { .idx =3D package ? MSR_PACKAGE_THERM_STATUS : MSR_IA32_THERM_STA= TUS }, + { .idx =3D MSR_TEMPERATURE_TARGET }, + }; + struct xc_resource_op ops =3D { + .cpu =3D cpu, + .entries =3D entries, + .nr_entries =3D ARRAY_SIZE(entries), + }; + int tjmax; + + int ret =3D xc_resource_op(xch, 1, &ops); + + switch ( ret ) + { + case -1: + /* xc_resource_op returns -1 in out of memory scenarios */ + return -ENOMEM; + case 0: + /* This CPU isn't online or can't query this MSR */ + return -ENODATA; + case 1: + { + /* + * The CPU doesn't support MSR_TEMPERATURE_TARGET, we assume it's = 100 + * which is correct aside a few selected Atom CPUs. Check Linux + * kernel's coretemp.c for more information. + */ + static bool has_reported_once =3D false; + + if ( !has_reported_once ) + { + fprintf(stderr, "MSR_TEMPERATURE_TARGET is not supported, assu= me " + "tjmax =3D 100, readings may be incorrect.\n"); + has_reported_once =3D true; + } + + tjmax =3D 100; + break; + } + case 2: + { + tjmax =3D (entries[1].val >> 16) & 0xff; + break; + } + default: + if ( ret > 0 ) + { + fprintf(stderr, "Got unexpected xc_resource_op return value: %= d", + ret); + return -EINVAL; + } + return ret; + } + + *temp =3D tjmax - ((entries[0].val >> 16) & 0xff); + return 0; +} + +static void get_intel_temp(int argc, char *argv[]) +{ + int temp =3D -1, cpu =3D -1; + unsigned int socket; + bool has_data =3D false; + + if ( argc > 0 ) + parse_cpuid(argv[0], &cpu); + + if ( cpu !=3D -1 ) + { + if ( !fetch_dts_temp(xc_handle, cpu, false, &temp) ) + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + else + printf("No data\n"); + return; + } + + /* Per socket measurement */ + for ( socket =3D 0, cpu =3D 0; cpu < max_cpu_nr; + socket++, cpu +=3D physinfo.cores_per_socket * physinfo.threads_= per_core ) + { + if ( !fetch_dts_temp(xc_handle, cpu, true, &temp) ) + { + has_data =3D true; + printf("Package%u: %d=C2=B0C\n", socket, temp); + } + } + + if ( has_data ) + /* Avoid inserting a trailing line if we have nothing */ + printf("\n"); + + for ( cpu =3D 0; cpu < max_cpu_nr; cpu +=3D physinfo.threads_per_core ) + { + if ( fetch_dts_temp(xc_handle, cpu, false, &temp) ) + continue; + + has_data =3D true; + printf("CPU%d: %d=C2=B0C\n", cpu, temp); + } + + if ( !has_data ) + printf("No data\n"); +} + void disable_turbo_mode(int argc, char *argv[]) { int cpuid =3D -1; @@ -1618,12 +1729,12 @@ struct { { "set-max-cstate", set_max_cstate_func}, { "enable-turbo-mode", enable_turbo_mode }, { "disable-turbo-mode", disable_turbo_mode }, + { "get-intel-temp", get_intel_temp }, }; =20 int main(int argc, char *argv[]) { int i, ret =3D 0; - xc_physinfo_t physinfo; int nr_matches =3D 0; int matches_main_options[ARRAY_SIZE(main_options)]; =20 --=20 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech