The patch series is based on: xen/riscv: introduce identity mapping [1] which haven't been merged yet. The patch series provides a basic implementation of exception handling. It can do only basic things such as decode a cause of an exception, save/restore registers and execute "wfi" instruction if an exception can not be handled. To verify that exception handling works well it was implemented macros from <asm/bug.h> such as BUG/WARN/run_in_exception/assert_failed. The implementation of macros is used "ebreak" instruction and set up bug frame tables for each type of macros. Also it was implemented register save/restore to return and continue work after WARN/run_in_exception. Not all functionality of the macros was implemented as some of them require hard-panic the system which is not available now. Instead of hard-panic 'wfi' instruction is used but it should be definitely changed in the neareset future. It wasn't implemented show_execution_state() and stack trace discovering as it's not necessary now. [1] https://lore.kernel.org/xen-devel/177ad805a6508cf4adc9f54c20333ebcf12c333b.1691507564.git.oleksii.kurochko@gmail.com/ --- Changes in V8: - Update the commit message of the cover letter. - Remove the patch with an introduction of dummy asm/bug.h and introduce normal asm/bug.h - Fix typo in return string from decode_reserved_interrupt_cause - Add "Acked-by: Alistair Francis <alistair.francis@wdc.com>" for the patch "xen/riscv: introduce decode_cause() stuff" - Remove Pointless initializer of id in do_bug_frame(). - Make bug_frames[] array constant in do_bug_frame(). - Remove cast_to_bug_frame(addr). - Rename is_valig_bugaddr to is_valid_bug_insn(). - Add check that read_instr is used only on Xen code - Update the commit message. --- Changes in V7: - Update the depenency ( mentioned in the cover letter message ) of the current patch series. - clean up comments. - code style fixes. - move definition of cast_to_bug_frame() from patch 4 to 5. --- Changes in V6: - Update the cover letter message: the patch set is based on MMU patch series. - Introduce new patch with temporary printk functionality. ( it will be removed when Xen common code will be ready ) - Change early_printk() to printk(). - Remove usage of LINK_TO_LOAD() due to the MMU being enabled first. - Add additional explanatory comments. - Remove patch "xen/riscv: initialize boot_info structure" from the patch series. --- Changes in V5: - Rebase on top of [1] and [2] - Add new patch which introduces stub for <asm/bug.h> to keep Xen compilable as in the patch [xen/riscv: introduce decode_cause() stuff] is used header <xen/lib.h> which requires <asm/bug.h>. - Remove <xen/error.h> from riscv/traps/c as nothing would require inclusion. - decode_reserved_interrupt_cause(), decode_interrupt_cause(), decode_cause, do_unexpected_trap() were made as static they are expected to be used only in traps.c - Remove "#include <xen/types.h>" from <asm/bug.h> as there is no any need in it anymore - Update macros GET_INSN_LENGTH: remove UL and 'unsigned int len;' from it - Remove " include <xen/bug.h>" from risc/setup.c. it is not needed in the current version of the patch - change an argument type from vaddr_t to uint32_t for is_valid_bugaddr and introduce read_instr() to read instruction properly as the length of qinstruction can be either 32 or 16 bits. - Code style fixes - update the comments before do_bug_frame() in riscv/trap.c - [[PATCH v4 5/5] automation: modify RISC-V smoke test ] was dropped as it was provided more simple solution by Andrew. CI: Simplify RISCV smoke testing - Refactor is_valid_bugaddr() function. - 2 new patches ([PATCH v5 {1-2}/7]) were introduced, the goal of which is to recalculate addresses used in traps.c, which can be linker time relative. It is needed as we don't have enabled MMU yet. --- Changes in V4: - Rebase the patch series on top of new version of [introduce generic implementation of macros from bug.h] patch series. - Update the cover letter message as 'Early printk' was merged and the current one patch series is based only on [introduce generic implementation of macros from bug.h] which hasn't been commited yet. - The following patches of the patch series were merged to staging: [PATCH v3 01/14] xen/riscv: change ISA to r64G [PATCH v3 02/14] xen/riscv: add <asm/asm.h> header [PATCH v3 03/14] xen/riscv: add <asm/riscv_encoding.h header [PATCH v3 04/14] xen/riscv: add <asm/csr.h> header [PATCH v3 05/14] xen/riscv: introduce empty <asm/string.h> [PATCH v3 06/14] xen/riscv: introduce empty <asm/cache.h> [PATCH v3 07/14] xen/riscv: introduce exception context [PATCH v3 08/14] xen/riscv: introduce exception handlers implementation [PATCH v3 10/14] xen/riscv: mask all interrupts - Fix addressed comments in xen-devel mailing list. --- Changes in V3: - Change the name of config RISCV_ISA_RV64IMA to RISCV_ISA_RV64G as instructions from Zicsr and Zifencei extensions aren't part of I extension any more. - Rebase the patch "xen/riscv: introduce an implementation of macros from <asm/bug.h>" on top of patch series [introduce generic implementation of macros from bug.h] - Update commit messages --- Changes in V2: - take the latest riscv_encoding.h from OpenSBI, update it with Xen related changes, and update the commit message with "Origin:" tag and the commit message itself. - add "Origin:" tag to the commit messag of the patch [xen/riscv: add <asm/csr.h> header]. - Remove the patch [xen/riscv: add early_printk_hnum() function] as the functionality provided by the patch isn't used now. - Refactor prcoess.h: move structure offset defines to asm-offsets.c, change register_t to unsigned long. - Refactor entry.S to use offsets defined in asm-offsets.C - Rename {__,}handle_exception to handle_trap() and do_trap() to be more consistent with RISC-V spec. - Merge the pathc which introduces do_unexpected_trap() with the patch [xen/riscv: introduce exception handlers implementation]. - Rename setup_trap_handler() to trap_init() and update correspondingly the patches in the patch series. - Refactor bug.h, remove bug_instr_t type from it. - Refactor decode_trap_cause() function to be more optimization-friendly. - Add two new empty headers: <cache.h> and <string.h> as they are needed to include <xen/lib.h> which provides ARRAY_SIZE and other macros. - Code style fixes. --- Oleksii Kurochko (6): xen/riscv: introduce temporary printk stuff xen/riscv: introduce <asm/bug.h> xen/riscv: introduce decode_cause() stuff xen/riscv: introduce trap_init() xen/riscv: implement do_bug_frame() xen/riscv: test basic handling stuff xen/arch/riscv/early_printk.c | 168 +++++++++++++++++++++ xen/arch/riscv/include/asm/bug.h | 37 +++++ xen/arch/riscv/include/asm/traps.h | 1 + xen/arch/riscv/setup.c | 20 +++ xen/arch/riscv/traps.c | 234 ++++++++++++++++++++++++++++- xen/arch/riscv/xen.lds.S | 10 ++ 6 files changed, 469 insertions(+), 1 deletion(-) create mode 100644 xen/arch/riscv/include/asm/bug.h -- 2.41.0 The patch introdcuces printk related stuff which should be deleted after Xen common code will be available. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> --- Changes in V8: - only rebase was done. --- Changes in V7: - only rebase was done. --- Changes in V6: - the patch was introduced in the current patch series (V6) --- xen/arch/riscv/early_printk.c | 168 ++++++++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) diff --git a/xen/arch/riscv/early_printk.c b/xen/arch/riscv/early_printk.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/early_printk.c +++ b/xen/arch/riscv/early_printk.c @@ -XXX,XX +XXX,XX @@ void early_printk(const char *str) str++; } } + +/* + * The following #if 1 ... #endif should be removed after printk + * and related stuff are ready. + */ +#if 1 + +#include <xen/stdarg.h> +#include <xen/string.h> + +/** + * strlen - Find the length of a string + * @s: The string to be sized + */ +size_t (strlen)(const char * s) +{ + const char *sc; + + for (sc = s; *sc != '\0'; ++sc) + /* nothing */; + return sc - s; +} + +/** + * memcpy - Copy one area of memory to another + * @dest: Where to copy to + * @src: Where to copy from + * @count: The size of the area. + * + * You should not use this function to access IO space, use memcpy_toio() + * or memcpy_fromio() instead. + */ +void *(memcpy)(void *dest, const void *src, size_t count) +{ + char *tmp = (char *) dest, *s = (char *) src; + + while (count--) + *tmp++ = *s++; + + return dest; +} + +int vsnprintf(char* str, size_t size, const char* format, va_list args) +{ + size_t i = 0; /* Current position in the output string */ + size_t written = 0; /* Total number of characters written */ + char* dest = str; + + while ( format[i] != '\0' && written < size - 1 ) + { + if ( format[i] == '%' ) + { + i++; + + if ( format[i] == '\0' ) + break; + + if ( format[i] == '%' ) + { + if ( written < size - 1 ) + { + dest[written] = '%'; + written++; + } + i++; + continue; + } + + /* + * Handle format specifiers. + * For simplicity, only %s and %d are implemented here. + */ + + if ( format[i] == 's' ) + { + char* arg = va_arg(args, char*); + size_t arglen = strlen(arg); + + size_t remaining = size - written - 1; + + if ( arglen > remaining ) + arglen = remaining; + + memcpy(dest + written, arg, arglen); + + written += arglen; + i++; + } + else if ( format[i] == 'd' ) + { + int arg = va_arg(args, int); + + /* Convert the integer to string representation */ + char numstr[32]; /* Assumes a maximum of 32 digits */ + int numlen = 0; + int num = arg; + size_t remaining; + + if ( arg < 0 ) + { + if ( written < size - 1 ) + { + dest[written] = '-'; + written++; + } + + num = -arg; + } + + do + { + numstr[numlen] = '0' + num % 10; + num = num / 10; + numlen++; + } while ( num > 0 ); + + /* Reverse the string */ + for (int j = 0; j < numlen / 2; j++) + { + char tmp = numstr[j]; + numstr[j] = numstr[numlen - 1 - j]; + numstr[numlen - 1 - j] = tmp; + } + + remaining = size - written - 1; + + if ( numlen > remaining ) + numlen = remaining; + + memcpy(dest + written, numstr, numlen); + + written += numlen; + i++; + } + } + else + { + if ( written < size - 1 ) + { + dest[written] = format[i]; + written++; + } + i++; + } + } + + if ( size > 0 ) + dest[written] = '\0'; + + return written; +} + +void printk(const char *format, ...) +{ + static char buf[1024]; + + va_list args; + va_start(args, format); + + (void)vsnprintf(buf, sizeof(buf), format, args); + + early_printk(buf); + + va_end(args); +} + +#endif + -- 2.41.0 Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> --- Changes in V8: - new patch. It was introduced instead of dummy asm/bug.h introduction. --- xen/arch/riscv/include/asm/bug.h | 37 ++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 xen/arch/riscv/include/asm/bug.h diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h new file mode 100644 index XXXXXXX..XXXXXXX --- /dev/null +++ b/xen/arch/riscv/include/asm/bug.h @@ -XXX,XX +XXX,XX @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2012 Regents of the University of California + * Copyright (C) 2021-2023 Vates + * + */ +#ifndef _ASM_RISCV_BUG_H +#define _ASM_RISCV_BUG_H + +#ifndef __ASSEMBLY__ + +#define BUG_INSTR "ebreak" + +/* + * The base instruction set has a fixed length of 32-bit naturally aligned + * instructions. + * + * There are extensions of variable length ( where each instruction can be + * any number of 16-bit parcels in length ). + * + * Compressed ISA is used now where the instruction length is 16 bit and + * 'ebreak' instruction, in this case, can be either 16 or 32 bit ( + * depending on if compressed ISA is used or not ) + */ +#define INSN_LENGTH_MASK _UL(0x3) +#define INSN_LENGTH_32 _UL(0x3) + +#define BUG_INSN_32 _UL(0x00100073) /* ebreak */ +#define BUG_INSN_16 _UL(0x9002) /* c.ebreak */ +#define COMPRESSED_INSN_MASK _UL(0xffff) + +#define GET_INSN_LENGTH(insn) \ + (((insn) & INSN_LENGTH_MASK) == INSN_LENGTH_32 ? 4 : 2) \ + +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_RISCV_BUG_H */ -- 2.41.0 The patch introduces stuff needed to decode a reason of an exception. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> --- Changes in V8: - fix typo in return string from decode_reserved_interrupt_cause - add Acked-by: Alistair Francis <alistair.francis@wdc.com> --- Changes in V7: - Nothing changed. Only rebase. --- Changes in V6: - Remove usage of LINK_TO_LOAD() due to the MMU being enabled first. - Change early_printk() to printk() --- Changes in V5: - Remove <xen/error.h> from riscv/traps/c as nothing would require inclusion. - decode_reserved_interrupt_cause(), decode_interrupt_cause(), decode_cause, do_unexpected_trap() were made as static they are expected to be used only in traps.c - use LINK_TO_LOAD() for addresses which can be linker time relative. --- Changes in V4: - fix string in decode_reserved_interrupt_cause() --- Changes in V3: - Nothing changed --- Changes in V2: - Make decode_trap_cause() more optimization friendly. - Merge the pathc which introduces do_unexpected_trap() to the current one. --- xen/arch/riscv/traps.c | 84 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 83 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -XXX,XX +XXX,XX @@ * * RISC-V Trap handlers */ + +#include <xen/lib.h> + +#include <asm/csr.h> +#include <asm/early_printk.h> #include <asm/processor.h> #include <asm/traps.h> -void do_trap(struct cpu_user_regs *cpu_regs) +static const char *decode_trap_cause(unsigned long cause) +{ + static const char *const trap_causes[] = { + [CAUSE_MISALIGNED_FETCH] = "Instruction Address Misaligned", + [CAUSE_FETCH_ACCESS] = "Instruction Access Fault", + [CAUSE_ILLEGAL_INSTRUCTION] = "Illegal Instruction", + [CAUSE_BREAKPOINT] = "Breakpoint", + [CAUSE_MISALIGNED_LOAD] = "Load Address Misaligned", + [CAUSE_LOAD_ACCESS] = "Load Access Fault", + [CAUSE_MISALIGNED_STORE] = "Store/AMO Address Misaligned", + [CAUSE_STORE_ACCESS] = "Store/AMO Access Fault", + [CAUSE_USER_ECALL] = "Environment Call from U-Mode", + [CAUSE_SUPERVISOR_ECALL] = "Environment Call from S-Mode", + [CAUSE_MACHINE_ECALL] = "Environment Call from M-Mode", + [CAUSE_FETCH_PAGE_FAULT] = "Instruction Page Fault", + [CAUSE_LOAD_PAGE_FAULT] = "Load Page Fault", + [CAUSE_STORE_PAGE_FAULT] = "Store/AMO Page Fault", + [CAUSE_FETCH_GUEST_PAGE_FAULT] = "Instruction Guest Page Fault", + [CAUSE_LOAD_GUEST_PAGE_FAULT] = "Load Guest Page Fault", + [CAUSE_VIRTUAL_INST_FAULT] = "Virtualized Instruction Fault", + [CAUSE_STORE_GUEST_PAGE_FAULT] = "Guest Store/AMO Page Fault", + }; + + if ( cause < ARRAY_SIZE(trap_causes) && trap_causes[cause] ) + return trap_causes[cause]; + return "UNKNOWN"; +} + +static const char *decode_reserved_interrupt_cause(unsigned long irq_cause) +{ + switch ( irq_cause ) + { + case IRQ_M_SOFT: + return "M-mode Software Interrupt"; + case IRQ_M_TIMER: + return "M-mode Timer Interrupt"; + case IRQ_M_EXT: + return "M-mode External Interrupt"; + default: + return "UNKNOWN IRQ type"; + } +} + +static const char *decode_interrupt_cause(unsigned long cause) +{ + unsigned long irq_cause = cause & ~CAUSE_IRQ_FLAG; + + switch ( irq_cause ) + { + case IRQ_S_SOFT: + return "Supervisor Software Interrupt"; + case IRQ_S_TIMER: + return "Supervisor Timer Interrupt"; + case IRQ_S_EXT: + return "Supervisor External Interrupt"; + default: + return decode_reserved_interrupt_cause(irq_cause); + } +} + +static const char *decode_cause(unsigned long cause) +{ + if ( cause & CAUSE_IRQ_FLAG ) + return decode_interrupt_cause(cause); + + return decode_trap_cause(cause); +} + +static void do_unexpected_trap(const struct cpu_user_regs *regs) { + unsigned long cause = csr_read(CSR_SCAUSE); + + printk("Unhandled exception: %s\n", decode_cause(cause)); + die(); } + +void do_trap(struct cpu_user_regs *cpu_regs) +{ + do_unexpected_trap(cpu_regs); +} -- 2.41.0 Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> --- Changes in V8: - nothing changed. only rebase was done. --- Changes in V7: - #define cast_to_bug_frame(addr) ((const struct bug_frame *)(addr)). - remove unnecessary comments in trap_init() function. --- Changes in V6: - trap_init() is now called after enabling the MMU. - Add additional explanatory comments. --- Changes in V5: - Nothing changed --- Changes in V4: - Nothing changed --- Changes in V3: - Nothing changed --- Changes in V2: - Rename setup_trap_handler() to trap_init(). - Add Reviewed-by to the commit message. --- xen/arch/riscv/include/asm/traps.h | 1 + xen/arch/riscv/setup.c | 3 +++ xen/arch/riscv/traps.c | 12 ++++++++++++ 3 files changed, 16 insertions(+) diff --git a/xen/arch/riscv/include/asm/traps.h b/xen/arch/riscv/include/asm/traps.h index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/include/asm/traps.h +++ b/xen/arch/riscv/include/asm/traps.h @@ -XXX,XX +XXX,XX @@ void do_trap(struct cpu_user_regs *cpu_regs); void handle_trap(void); +void trap_init(void); #endif /* __ASSEMBLY__ */ diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -XXX,XX +XXX,XX @@ #include <asm/early_printk.h> #include <asm/mm.h> +#include <asm/traps.h> /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] @@ -XXX,XX +XXX,XX @@ void __init noreturn start_xen(unsigned long bootcpu_id, { remove_identity_mapping(); + trap_init(); + early_printk("Hello from C env\n"); early_printk("All set up\n"); diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -XXX,XX +XXX,XX @@ #include <asm/processor.h> #include <asm/traps.h> +/* + * Initialize the trap handling. + * + * The function is called after MMU is enabled. + */ +void trap_init(void) +{ + unsigned long addr = (unsigned long)&handle_trap; + + csr_write(CSR_STVEC, addr); +} + static const char *decode_trap_cause(unsigned long cause) { static const char *const trap_causes[] = { -- 2.41.0 The patch introduces the temporary implementation of do_bug_frame(). When common code is merged, CONFIG_GENERIC_BUG_FRAME should be used instead. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> --- Changes in V8: - remove Pointless initializer of id. - make bug_frames[] array constant. - remove cast_to_bug_frame(addr). - rename is_valig_bugaddr to is_valid_bug_insn(). - add check that read_instr is used only on xen code - update the commit message. --- Changes in V7: - move to this patch the definition of cast_to_bug_frame() from the previous patch. - update the comment in bug.h. - update the comment above do_bug_frame(). - fix code style. - add comment to read_instr func. - add space for bug_frames in lds.S. --- Changes in V6: - Avoid LINK_TO_LOAD() as bug.h functionality expected to be used after MMU is enabled. - Change early_printk() to printk() --- Changes in V5: - Remove "#include <xen/types.h>" from <asm/bug.h> as there is no any need in it anymore - Update macros GET_INSN_LENGTH: remove UL and 'unsigned int len;' from it - Remove " include <xen/bug.h>" from risc/setup.c. it is not needed in the current version of the patch - change an argument type from vaddr_t to uint32_t for is_valid_bugaddr and introduce read_instr() to read instruction properly as the length of qinstruction can be either 32 or 16 bits. - Code style fixes - update the comments before do_bug_frame() in riscv/trap.c - Refactor is_valid_bugaddr() function. - introduce macros cast_to_bug_frame(addr) to hide casts. - use LINK_TO_LOAD() for addresses which are linker time relative. --- Changes in V4: - Updates in RISC-V's <asm/bug.h>: * Add explanatory comment about why there is only defined for 32-bits length instructions and 16/32-bits BUG_INSN_{16,32}. * Change 'unsigned long' to 'unsigned int' inside GET_INSN_LENGTH(). * Update declaration of is_valid_bugaddr(): switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. - Updates in RISC-V's traps.c: * replace /xen and /asm includes * update definition of is_valid_bugaddr():switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. Code style inside function was updated too. * do_bug_frame() refactoring: * local variables start and bug became 'const struct bug_frame' * bug_frames[] array became 'static const struct bug_frame[] = ...' * remove all casts * remove unneeded comments and add an explanatory comment that the do_bug_frame() will be switched to a generic one. * do_trap() refactoring: * read 16-bits value instead of 32-bits as compressed instruction can be used and it might happen than only 16-bits may be accessible. * code style updates * re-use instr variable instead of re-reading instruction. - Updates in setup.c: * add blank line between xen/ and asm/ includes. --- Changes in V3: - Rebase the patch "xen/riscv: introduce an implementation of macros from <asm/bug.h>" on top of patch series [introduce generic implementation of macros from bug.h] --- Changes in V2: - Remove __ in define namings - Update run_in_exception_handler() with register void *fn_ asm(__stringify(BUG_FN_REG)) = (fn); - Remove bug_instr_t type and change it's usage to uint32_t --- xen/arch/riscv/traps.c | 138 +++++++++++++++++++++++++++++++++++++++ xen/arch/riscv/xen.lds.S | 10 +++ 2 files changed, 148 insertions(+) diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -XXX,XX +XXX,XX @@ * RISC-V Trap handlers */ +#include <xen/bug.h> +#include <xen/errno.h> #include <xen/lib.h> #include <asm/csr.h> @@ -XXX,XX +XXX,XX @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) die(); } +void show_execution_state(const struct cpu_user_regs *regs) +{ + printk("implement show_execution_state(regs)\n"); +} + +/* + * TODO: generic do_bug_frame() should be used instead of current + * implementation panic(), printk() and find_text_region() + * (virtual memory?) will be ready/merged + */ +int do_bug_frame(const struct cpu_user_regs *regs, vaddr_t pc) +{ + const struct bug_frame *start, *end; + const struct bug_frame *bug = NULL; + unsigned int id; + const char *filename, *predicate; + int lineno; + + static const struct bug_frame * const bug_frames[] = { + &__start_bug_frames[0], + &__stop_bug_frames_0[0], + &__stop_bug_frames_1[0], + &__stop_bug_frames_2[0], + &__stop_bug_frames_3[0], + }; + + for ( id = 0; id < BUGFRAME_NR; id++ ) + { + start = bug_frames[id]; + end = bug_frames[id + 1]; + + while ( start != end ) + { + if ( (vaddr_t)bug_loc(start) == pc ) + { + bug = start; + goto found; + } + + start++; + } + } + + found: + if ( bug == NULL ) + return -ENOENT; + + if ( id == BUGFRAME_run_fn ) + { + void (*fn)(const struct cpu_user_regs *) = bug_ptr(bug); + + fn(regs); + + goto end; + } + + /* WARN, BUG or ASSERT: decode the filename pointer and line number. */ + filename = bug_ptr(bug); + lineno = bug_line(bug); + + switch ( id ) + { + case BUGFRAME_warn: + printk("Xen WARN at %s:%d\n", filename, lineno); + + show_execution_state(regs); + + goto end; + + case BUGFRAME_bug: + printk("Xen BUG at %s:%d\n", filename, lineno); + + show_execution_state(regs); + + printk("change wait_for_interrupt to panic() when common is available\n"); + die(); + + case BUGFRAME_assert: + /* ASSERT: decode the predicate string pointer. */ + predicate = bug_msg(bug); + + printk("Assertion %s failed at %s:%d\n", predicate, filename, lineno); + + show_execution_state(regs); + + printk("change wait_for_interrupt to panic() when common is available\n"); + die(); + } + + return -EINVAL; + + end: + return 0; +} + +static bool is_valid_bug_insn(uint32_t insn) +{ + return insn == BUG_INSN_32 || + (insn & COMPRESSED_INSN_MASK) == BUG_INSN_16; +} + +/* There are no guests for now so the func has to return alwasys false */ +static inline bool guest_mode(void) +{ + return false; +} + +/* Should be used only on Xen code */ +static uint32_t read_instr(unsigned long pc) +{ + uint16_t instr16 = *(uint16_t *)pc; + + if ( guest_mode() ) + { + printk("%s should be called only on Xen code\n", __func__); + die(); + } + + if ( GET_INSN_LENGTH(instr16) == 2 ) + return instr16; + else + return *(uint32_t *)pc; +} + void do_trap(struct cpu_user_regs *cpu_regs) { + register_t pc = cpu_regs->sepc; + uint32_t instr = read_instr(pc); + + if ( is_valid_bug_insn(instr) ) + { + if ( !do_bug_frame(cpu_regs, pc) ) + { + cpu_regs->sepc += GET_INSN_LENGTH(instr); + return; + } + } + do_unexpected_trap(cpu_regs); } diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -XXX,XX +XXX,XX @@ SECTIONS . = ALIGN(PAGE_SIZE); .rodata : { _srodata = .; /* Read-only data */ + /* Bug frames table */ + __start_bug_frames = .; + *(.bug_frames.0) + __stop_bug_frames_0 = .; + *(.bug_frames.1) + __stop_bug_frames_1 = .; + *(.bug_frames.2) + __stop_bug_frames_2 = .; + *(.bug_frames.3) + __stop_bug_frames_3 = .; *(.rodata) *(.rodata.*) *(.data.rel.ro) -- 2.41.0 Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> --- Changes in V8: - Nothing changed. Only rebase. --- Changes in V6: - Nothing changed. Only rebase. --- Changes in V6: - Nothing changed --- Changes in V5: - Nothing changed --- Changes in V4: - Add Acked-by: Alistair Francis <alistair.francis@wdc.com> --- Changes in V3: - Nothing changed --- Changes in V2: - Nothing changed --- xen/arch/riscv/setup.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -XXX,XX +XXX,XX @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <xen/bug.h> #include <xen/compile.h> #include <xen/init.h> @@ -XXX,XX +XXX,XX @@ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); +static void test_run_in_exception(struct cpu_user_regs *regs) +{ + early_printk("If you see this message, "); + early_printk("run_in_exception_handler is most likely working\n"); +} + +static void test_macros_from_bug_h(void) +{ + run_in_exception_handler(test_run_in_exception); + WARN(); + early_printk("If you see this message, "); + early_printk("WARN is most likely working\n"); +} + void __init noreturn start_xen(unsigned long bootcpu_id, paddr_t dtb_addr) { @@ -XXX,XX +XXX,XX @@ void __init noreturn start_xen(unsigned long bootcpu_id, trap_init(); + test_macros_from_bug_h(); + early_printk("Hello from C env\n"); early_printk("All set up\n"); -- 2.41.0 The patch series provides a basic implementation of exception handling. It can do only basic things such as decode a cause of an exception, save/restore registers and execute "wfi" instruction if an exception can not be handled. To verify that exception handling works well it was used macros from <asm/bug.h> such as BUG/WARN/run_in_exception/assert_failed. It wasn't implemented show_execution_state() and stack trace discovering as it's not necessary now. CI results: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/1402965420 --- Changes in V13: - The following patches were merged to staging: [PATCH v12 3/3] xen/riscv: refactor decode_trap_cause() - Define BUG_INSTR as "UNIMP" to cover properly the cases when CONFIG_RISCV_ISA_C is enabled and not. - All other changes please look in patch separately. - Add link to CI results of this patch series. - Rebase patch series on top of current staging. --- Changes in V12: - Drop patch series depenency from "Enable build of full Xen for RISC-V" as this depenency has been merged to staging. - Change BUG_INSTR from 'ebreak' to 0x0000 ( UNIMP instruction ). - add new patch with refactoring of decode_trap_cause(). - The following patches were merged to staging: - [PATCH v11 1/5] xen/riscv: use printk() instead of early_printk() - [PATCH v11 2/5] xen/riscv: introduce decode_cause() stuff - [PATCH v11 3/5] xen/riscv: introduce trap_init() - All other changes please look in patch separately. --- Changes in V10 - V11: - No generic changes to describe here. Please look at patch-specific changes. --- Changes in V9: - Update the cover letter message. - s/early_printk/printk. - use GENERIC_BUG_FRAME instead of arch-specific implementation of do_bug_frame(). - Rebase on top of current staging and riscv-full-xen-build-v14. --- Changes in V8: - Update the commit message of the cover letter. - Remove the patch with an introduction of dummy asm/bug.h and introduce normal asm/bug.h - Fix typo in return string from decode_reserved_interrupt_cause - Add "Acked-by: Alistair Francis <alistair.francis@wdc.com>" for the patch "xen/riscv: introduce decode_cause() stuff" - Remove Pointless initializer of id in do_bug_frame(). - Make bug_frames[] array constant in do_bug_frame(). - Remove cast_to_bug_frame(addr). - Rename is_valig_bugaddr to is_valid_bug_insn(). - Add check that read_instr is used only on Xen code - Update the commit message. --- Changes in V7: - Update the depenency ( mentioned in the cover letter message ) of the current patch series. - clean up comments. - code style fixes. - move definition of cast_to_bug_frame() from patch 4 to 5. --- Changes in V6: - Update the cover letter message: the patch set is based on MMU patch series. - Introduce new patch with temporary printk functionality. ( it will be removed when Xen common code will be ready ) - Change early_printk() to printk(). - Remove usage of LINK_TO_LOAD() due to the MMU being enabled first. - Add additional explanatory comments. - Remove patch "xen/riscv: initialize boot_info structure" from the patch series. --- Changes in V5: - Rebase on top of [1] and [2] - Add new patch which introduces stub for <asm/bug.h> to keep Xen compilable as in the patch [xen/riscv: introduce decode_cause() stuff] is used header <xen/lib.h> which requires <asm/bug.h>. - Remove <xen/error.h> from riscv/traps/c as nothing would require inclusion. - decode_reserved_interrupt_cause(), decode_interrupt_cause(), decode_cause, do_unexpected_trap() were made as static they are expected to be used only in traps.c - Remove "#include <xen/types.h>" from <asm/bug.h> as there is no any need in it anymore - Update macros GET_INSN_LENGTH: remove UL and 'unsigned int len;' from it - Remove " include <xen/bug.h>" from risc/setup.c. it is not needed in the current version of the patch - change an argument type from vaddr_t to uint32_t for is_valid_bugaddr and introduce read_instr() to read instruction properly as the length of qinstruction can be either 32 or 16 bits. - Code style fixes - update the comments before do_bug_frame() in riscv/trap.c - [[PATCH v4 5/5] automation: modify RISC-V smoke test ] was dropped as it was provided more simple solution by Andrew. CI: Simplify RISCV smoke testing - Refactor is_valid_bugaddr() function. - 2 new patches ([PATCH v5 {1-2}/7]) were introduced, the goal of which is to recalculate addresses used in traps.c, which can be linker time relative. It is needed as we don't have enabled MMU yet. --- Changes in V4: - Rebase the patch series on top of new version of [introduce generic implementation of macros from bug.h] patch series. - Update the cover letter message as 'Early printk' was merged and the current one patch series is based only on [introduce generic implementation of macros from bug.h] which hasn't been commited yet. - The following patches of the patch series were merged to staging: [PATCH v3 01/14] xen/riscv: change ISA to r64G [PATCH v3 02/14] xen/riscv: add <asm/asm.h> header [PATCH v3 03/14] xen/riscv: add <asm/riscv_encoding.h header [PATCH v3 04/14] xen/riscv: add <asm/csr.h> header [PATCH v3 05/14] xen/riscv: introduce empty <asm/string.h> [PATCH v3 06/14] xen/riscv: introduce empty <asm/cache.h> [PATCH v3 07/14] xen/riscv: introduce exception context [PATCH v3 08/14] xen/riscv: introduce exception handlers implementation [PATCH v3 10/14] xen/riscv: mask all interrupts - Fix addressed comments in xen-devel mailing list. --- Changes in V3: - Change the name of config RISCV_ISA_RV64IMA to RISCV_ISA_RV64G as instructions from Zicsr and Zifencei extensions aren't part of I extension any more. - Rebase the patch "xen/riscv: introduce an implementation of macros from <asm/bug.h>" on top of patch series [introduce generic implementation of macros from bug.h] - Update commit messages --- Changes in V2: - take the latest riscv_encoding.h from OpenSBI, update it with Xen related changes, and update the commit message with "Origin:" tag and the commit message itself. - add "Origin:" tag to the commit messag of the patch [xen/riscv: add <asm/csr.h> header]. - Remove the patch [xen/riscv: add early_printk_hnum() function] as the functionality provided by the patch isn't used now. - Refactor prcoess.h: move structure offset defines to asm-offsets.c, change register_t to unsigned long. - Refactor entry.S to use offsets defined in asm-offsets.C - Rename {__,}handle_exception to handle_trap() and do_trap() to be more consistent with RISC-V spec. - Merge the pathc which introduces do_unexpected_trap() with the patch [xen/riscv: introduce exception handlers implementation]. - Rename setup_trap_handler() to trap_init() and update correspondingly the patches in the patch series. - Refactor bug.h, remove bug_instr_t type from it. - Refactor decode_trap_cause() function to be more optimization-friendly. - Add two new empty headers: <cache.h> and <string.h> as they are needed to include <xen/lib.h> which provides ARRAY_SIZE and other macros. - Code style fixes. --- Oleksii Kurochko (2): xen/riscv: enable GENERIC_BUG_FRAME xen/riscv: test basic exception handling stuff xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/include/asm/bug.h | 8 +++----- xen/arch/riscv/setup.c | 20 ++++++++++++++++++++ xen/arch/riscv/traps.c | 26 +++++++++++++++++++++++++- xen/common/bug.c | 1 + 5 files changed, 50 insertions(+), 6 deletions(-) -- 2.45.2 Enable GENERIC_BUG_FRAME to support BUG(), WARN(), ASSERT, and run_in_exception_handler(). "UNIMP" is used for BUG_INSTR, which, when macros from <xen/bug.h> are used, triggers an exception with the ILLEGAL_INSTRUCTION cause. This instruction is encoded as a 2-byte instruction when CONFIG_RISCV_ISA_C is enabled: ffffffffc0046ba0: 0000 unimp and is encoded as a 4-byte instruction when CONFIG_RISCV_ISA_C ins't enabled: ffffffffc005a460: c0001073 unimp Using 'ebreak' as BUG_INSTR does not guarantee proper handling of macros from <xen/bug.h>. If a debugger inserts a breakpoint (using the 'ebreak' instruction) at a location where Xen already uses 'ebreak', it creates ambiguity. Xen cannot distinguish whether the 'ebreak' instruction is inserted by the debugger or is part of Xen's own code. Remove BUG_INSN_32 and BUG_INSN_16 macros as they encode the ebreak instruction, which is no longer used for BUG_INSN. Update the comment above the definition of INS_LENGTH_MASK as instead of 'ebreak' instruction 'unimp' instruction is used. <xen/lib.h> is included for the reason that panic() and printk() are used in common/bug.c and RISC-V fails if it is not included. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> --- Changes in V13: - add fallthrough for " case CAUSE_ILLEGAL_INSTRUCTION" in do_trap(). - define BUG_INSTR as "UNIMP" to cover properly the cases when CONFIG_RISCV_ISA_C is enabled and not. - Update the comment above the definition of INS_LENGTH_MASK. - Update the commit message. --- Changes in V12: - Update the commit message - Use 0x0000 as BUG_INSTR instead of 'ebreak' to deal with cases when the debugger inserts 'ebreak' into the place where Xen has ebreak. - Remove BUG_INSN_32 and BUG_INSN_16 macros as they encode the ebreak instruction, which is no longer used for BUG_INSN. - Update the commit above the definition of INS_LENGTH_MASK. - Move break inside "if ( do_bug_frame(cpu_regs, pc) >= 0 )". --- Changes in V11: - update the commit message - change "%lx" to "%#x" for PC register printing. - drop +1 in argument of is_kernel_text(pc) and is_kernel_inittext(pc). - drop return for case CAUSE_BREAKPOINT. - add break to default and add a blank like above it. - add a comment CAUSE_BREAKPOINT is handled instead of illegal instruction. --- Changes in V10: - put 'select GENERIC_BUG_FRAME' in "Config RISCV". - rework do_trap() to not fetch an instruction in case when the cause of trap is BUG_insn. - drop read_instr() and is_valid_bug_insn(). - update the commit message. --- Changes in V9: - Rebase on the top of current staging. - use GENERIC_BUG_FRAME as now we have common code available. - add xen/lib.h to bug.c to fix a compilation error around printk. - update the commit message. - update the code of read_instr() in traps.c - fold two-s if into 1 in do_trap. --- Changes in V8: - remove Pointless initializer of id. - make bug_frames[] array constant. - remove cast_to_bug_frame(addr). - rename is_valig_bugaddr to is_valid_bug_insn(). - add check that read_instr is used only on xen code - update the commit message. --- Changes in V7: - move to this patch the definition of cast_to_bug_frame() from the previous patch. - update the comment in bug.h. - update the comment above do_bug_frame(). - fix code style. - add comment to read_instr func. - add space for bug_frames in lds.S. --- Changes in V6: - Avoid LINK_TO_LOAD() as bug.h functionality expected to be used after MMU is enabled. - Change early_printk() to printk() --- Changes in V5: - Remove "#include <xen/types.h>" from <asm/bug.h> as there is no any need in it anymore - Update macros GET_INSN_LENGTH: remove UL and 'unsigned int len;' from it - Remove " include <xen/bug.h>" from risc/setup.c. it is not needed in the current version of the patch - change an argument type from vaddr_t to uint32_t for is_valid_bugaddr and introduce read_instr() to read instruction properly as the length of qinstruction can be either 32 or 16 bits. - Code style fixes - update the comments before do_bug_frame() in riscv/trap.c - Refactor is_valid_bugaddr() function. - introduce macros cast_to_bug_frame(addr) to hide casts. - use LINK_TO_LOAD() for addresses which are linker time relative. --- Changes in V4: - Updates in RISC-V's <asm/bug.h>: * Add explanatory comment about why there is only defined for 32-bits length instructions and 16/32-bits BUG_INSN_{16,32}. * Change 'unsigned long' to 'unsigned int' inside GET_INSN_LENGTH(). * Update declaration of is_valid_bugaddr(): switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. - Updates in RISC-V's traps.c: * replace /xen and /asm includes * update definition of is_valid_bugaddr():switch return type from int to bool and the argument from 'unsigned int' to 'vaddr'. Code style inside function was updated too. * do_bug_frame() refactoring: * local variables start and bug became 'const struct bug_frame' * bug_frames[] array became 'static const struct bug_frame[] = ...' * remove all casts * remove unneeded comments and add an explanatory comment that the do_bug_frame() will be switched to a generic one. * do_trap() refactoring: * read 16-bits value instead of 32-bits as compressed instruction can be used and it might happen than only 16-bits may be accessible. * code style updates * re-use instr variable instead of re-reading instruction. - Updates in setup.c: * add blank line between xen/ and asm/ includes. --- Changes in V3: - Rebase the patch "xen/riscv: introduce an implementation of macros from <asm/bug.h>" on top of patch series [introduce generic implementation of macros from bug.h] --- Changes in V2: - Remove __ in define namings - Update run_in_exception_handler() with register void *fn_ asm(__stringify(BUG_FN_REG)) = (fn); - Remove bug_instr_t type and change it's usage to uint32_t --- xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/include/asm/bug.h | 8 +++----- xen/arch/riscv/traps.c | 26 +++++++++++++++++++++++++- xen/common/bug.c | 1 + 4 files changed, 30 insertions(+), 6 deletions(-) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -XXX,XX +XXX,XX @@ config RISCV def_bool y select FUNCTION_ALIGNMENT_16B + select GENERIC_BUG_FRAME config RISCV_64 def_bool y diff --git a/xen/arch/riscv/include/asm/bug.h b/xen/arch/riscv/include/asm/bug.h index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/include/asm/bug.h +++ b/xen/arch/riscv/include/asm/bug.h @@ -XXX,XX +XXX,XX @@ #ifndef __ASSEMBLY__ -#define BUG_INSTR "ebreak" +#define BUG_INSTR "UNIMP" /* * The base instruction set has a fixed length of 32-bit naturally aligned @@ -XXX,XX +XXX,XX @@ * There are extensions of variable length ( where each instruction can be * any number of 16-bit parcels in length ). * - * Compressed ISA is used now where the instruction length is 16 bit and - * 'ebreak' instruction, in this case, can be either 16 or 32 bit ( + * Compressed ISA is used now where the instruction length is 16 bit and + * 'unimp' instruction, in this case, can be either 16 or 32 bit ( * depending on if compressed ISA is used or not ) */ #define INSN_LENGTH_MASK _UL(0x3) #define INSN_LENGTH_32 _UL(0x3) -#define BUG_INSN_32 _UL(0x00100073) /* ebreak */ -#define BUG_INSN_16 _UL(0x9002) /* c.ebreak */ #define COMPRESSED_INSN_MASK _UL(0xffff) #define GET_INSN_LENGTH(insn) \ diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/traps.c +++ b/xen/arch/riscv/traps.c @@ -XXX,XX +XXX,XX @@ * RISC-V Trap handlers */ +#include <xen/bug.h> +#include <xen/compiler.h> #include <xen/lib.h> #include <xen/nospec.h> #include <xen/sched.h> @@ -XXX,XX +XXX,XX @@ static void do_unexpected_trap(const struct cpu_user_regs *regs) void do_trap(struct cpu_user_regs *cpu_regs) { - do_unexpected_trap(cpu_regs); + register_t pc = cpu_regs->sepc; + unsigned long cause = csr_read(CSR_SCAUSE); + + switch ( cause ) + { + case CAUSE_ILLEGAL_INSTRUCTION: + if ( do_bug_frame(cpu_regs, pc) >= 0 ) + { + if ( !(is_kernel_text(pc) || is_kernel_inittext(pc)) ) + { + printk("Something wrong with PC: %#lx\n", pc); + die(); + } + + cpu_regs->sepc += GET_INSN_LENGTH(*(uint16_t *)pc); + + break; + } + fallthrough; + default: + do_unexpected_trap(cpu_regs); + break; + } } void vcpu_show_execution_state(struct vcpu *v) diff --git a/xen/common/bug.c b/xen/common/bug.c index XXXXXXX..XXXXXXX 100644 --- a/xen/common/bug.c +++ b/xen/common/bug.c @@ -XXX,XX +XXX,XX @@ #include <xen/bug.h> #include <xen/errno.h> #include <xen/kernel.h> +#include <xen/lib.h> #include <xen/livepatch.h> #include <xen/string.h> #include <xen/types.h> -- 2.45.2 Introduce testing for macros in <xen/bug.h> Wrap the testing in the SELF_TESTS configuration to avoid log noise related to functionality testing (specifically, macros from <xen/bug.h>) when CONFIG_SELF_TESTS is disabled. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> --- Changes in V13: - update the commit message. --- Changes in V12: - Notrhing changed. Only rebase. --- Changes in V11: - update the commit message. --- Changes in V10: - wrap test_macros_from_bug_h() under "#ifdef CONFIG_SELF_TESTS" - update the commit title to: "xen/riscv: test basic exception handling stuff" --- Changes in V9: - s/early_printk/printk as common code is now available --- Changes in V5-V8: - Nothing changed. Only rebase. --- Changes in V4: - Add Acked-by: Alistair Francis <alistair.francis@wdc.com> --- Changes in V2-V3: - Nothing changed --- xen/arch/riscv/setup.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index XXXXXXX..XXXXXXX 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -XXX,XX +XXX,XX @@ void arch_get_xen_caps(xen_capabilities_info_t *info) unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); +#ifdef CONFIG_SELF_TESTS +static void test_run_in_exception(const struct cpu_user_regs *regs) +{ + printk("If you see this message, "); + printk("run_in_exception_handler is most likely working\n"); +} + +static void test_macros_from_bug_h(void) +{ + run_in_exception_handler(test_run_in_exception); + WARN(); + printk("If you see this message, "); + printk("WARN is most likely working\n"); +} +#endif + void __init noreturn start_xen(unsigned long bootcpu_id, paddr_t dtb_addr) { @@ -XXX,XX +XXX,XX @@ void __init noreturn start_xen(unsigned long bootcpu_id, trap_init(); +#ifdef CONFIG_SELF_TESTS + test_macros_from_bug_h(); +#endif + printk("All set up\n"); for ( ;; ) -- 2.45.2