From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 169105821436695.23096461983448; Thu, 3 Aug 2023 03:23:34 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576177.902038 (Exim 4.92) (envelope-from ) id 1qRVUG-0004pY-3z; Thu, 03 Aug 2023 10:23:20 +0000 Received: by outflank-mailman (output) from mailman id 576177.902038; Thu, 03 Aug 2023 10:23:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUG-0004pR-0J; Thu, 03 Aug 2023 10:23:20 +0000 Received: by outflank-mailman (input) for mailman id 576177; Thu, 03 Aug 2023 10:23:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUF-0004Rp-Cw for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:23:19 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c3c9bffb-31e7-11ee-b268-6b7b168915f2; Thu, 03 Aug 2023 12:23:18 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id 509D94EE0737; Thu, 3 Aug 2023 12:23:18 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c3c9bffb-31e7-11ee-b268-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Jan Beulich , Andrew Cooper , Simone Ballarin Subject: [XEN PATCH 01/13] AMD/IOMMU: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:16 +0200 Message-Id: <2af1f76d2c002dd9f0b01eebf7af516d86bfe91e.1691053438.git.simone.ballarin@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058216767100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Jan Beulich Reviewed-by: Stefano Stabellini --- xen/drivers/passthrough/amd/iommu_guest.c | 2 +- xen/drivers/passthrough/amd/iommu_map.c | 2 +- xen/drivers/passthrough/amd/pci_amd_iommu.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_guest.c b/xen/drivers/passth= rough/amd/iommu_guest.c index 47a912126a..80d289b8bf 100644 --- a/xen/drivers/passthrough/amd/iommu_guest.c +++ b/xen/drivers/passthrough/amd/iommu_guest.c @@ -87,7 +87,7 @@ static uint64_t dte_get_gcr3_table(const struct amd_iommu= _dte *dte) static void dte_set_gcr3_table(struct amd_iommu_dte *dte, uint16_t dom_id, uint64_t addr, bool gv, uint8_t glx) { -#define GCR3_MASK(hi, lo) (((1ul << ((hi) + 1)) - 1) & ~((1ul << (lo)) - 1= )) +#define GCR3_MASK(hi, lo) (((1UL << ((hi) + 1)) - 1) & ~((1UL << (lo)) - 1= )) =20 /* I bit must be set when gcr3 is enabled */ dte->i =3D true; diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthro= ugh/amd/iommu_map.c index 993bac6f88..daa24a4858 100644 --- a/xen/drivers/passthrough/amd/iommu_map.c +++ b/xen/drivers/passthrough/amd/iommu_map.c @@ -838,7 +838,7 @@ int cf_check amd_iommu_quarantine_init(struct pci_dev *= pdev, bool scratch_page) { struct domain_iommu *hd =3D dom_iommu(dom_io); unsigned long end_gfn =3D - 1ul << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT); + 1UL << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT); unsigned int level =3D amd_iommu_get_paging_mode(end_gfn); unsigned int req_id =3D get_dma_requestor_id(pdev->seg, pdev->sbdf.bdf= ); const struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(pdev->= seg); diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/pass= through/amd/pci_amd_iommu.c index 94e3775506..bea70db4b7 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -368,7 +368,7 @@ static int cf_check amd_iommu_domain_init(struct domain= *d) */ hd->arch.amd.paging_mode =3D max(amd_iommu_get_paging_mode( is_hvm_domain(d) - ? 1ul << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT) + ? 1UL << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT) : get_upper_mfn_bound() + 1), amd_iommu_min_paging_mode); =20 --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058218157112.92886726605752; Thu, 3 Aug 2023 03:23:38 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576178.902048 (Exim 4.92) (envelope-from ) id 1qRVUI-0005Ak-BZ; Thu, 03 Aug 2023 10:23:22 +0000 Received: by outflank-mailman (output) from mailman id 576178.902048; Thu, 03 Aug 2023 10:23:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUI-0005Ab-7h; Thu, 03 Aug 2023 10:23:22 +0000 Received: by outflank-mailman (input) for mailman id 576178; Thu, 03 Aug 2023 10:23:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUG-0004Rp-NY for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:23:20 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c48b5c64-31e7-11ee-b268-6b7b168915f2; Thu, 03 Aug 2023 12:23:20 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id 7BA0A4EE0740; Thu, 3 Aug 2023 12:23:19 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c48b5c64-31e7-11ee-b268-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Simone Ballarin Subject: [XEN PATCH 02/13] x86/svm: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:17 +0200 Message-Id: <2779c3b2cbe27d95274a4ab44f6b9c877e59e8bc.1691053438.git.simone.ballarin@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058219741100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Jan Beulich Reviewed-by: Stefano Stabellini --- xen/arch/x86/hvm/svm/svm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index b3845bdca7..01dd592d9b 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1077,7 +1077,7 @@ static void svm_guest_osvw_init(struct domain *d) * Guests should see errata 400 and 415 as fixed (assuming that * HLT and IO instructions are intercepted). */ - svm->osvw.length =3D min(max(3ul, osvw_length), 64ul); + svm->osvw.length =3D min(max(3UL, osvw_length), 64UL); svm->osvw.status =3D osvw_status & ~6; =20 /* @@ -1652,7 +1652,7 @@ static void svm_do_nested_pgfault(struct vcpu *v, else if ( pfec & NPT_PFEC_in_gpt ) npfec.kind =3D npfec_kind_in_gpt; =20 - ret =3D hvm_hap_nested_page_fault(gpa, ~0ul, npfec); + ret =3D hvm_hap_nested_page_fault(gpa, ~0UL, npfec); =20 if ( tb_init_done ) { --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058220761798.1648059401772; Thu, 3 Aug 2023 03:23:40 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576181.902064 (Exim 4.92) (envelope-from ) id 1qRVUM-0005XO-1f; Thu, 03 Aug 2023 10:23:26 +0000 Received: by outflank-mailman (output) from mailman id 576181.902064; Thu, 03 Aug 2023 10:23:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUL-0005Wh-P3; Thu, 03 Aug 2023 10:23:25 +0000 Received: by outflank-mailman (input) for mailman id 576181; Thu, 03 Aug 2023 10:23:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUJ-0005QX-Lm for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:23:23 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c587ec01-31e7-11ee-8613-37d641c3527e; Thu, 03 Aug 2023 12:23:21 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id 217904EE0741; Thu, 3 Aug 2023 12:23:21 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c587ec01-31e7-11ee-8613-37d641c3527e From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Simone Ballarin Subject: [XEN PATCH 03/13] xen/arm: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:18 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058223036100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Luca Fancellu Reviewed-by: Stefano Stabellini --- xen/arch/arm/include/asm/processor.h | 6 +++--- xen/arch/arm/vtimer.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/as= m/processor.h index 7e42ff8811..8e02410465 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -521,9 +521,9 @@ extern register_t __cpu_logical_map[]; #define CNTKCTL_EL1_EL0PTEN (1u<<9) /* Expose phys timer registers to EL0= */ =20 /* Timer control registers */ -#define CNTx_CTL_ENABLE (1ul<<0) /* Enable timer */ -#define CNTx_CTL_MASK (1ul<<1) /* Mask IRQ */ -#define CNTx_CTL_PENDING (1ul<<2) /* IRQ pending */ +#define CNTx_CTL_ENABLE (1UL<<0) /* Enable timer */ +#define CNTx_CTL_MASK (1UL<<1) /* Mask IRQ */ +#define CNTx_CTL_PENDING (1UL<<2) /* IRQ pending */ =20 /* Timer frequency mask */ #define CNTFRQ_MASK GENMASK(31, 0) diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index 48f2daa907..c54360e202 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -206,7 +206,7 @@ static bool vtimer_cntp_tval(struct cpu_user_regs *regs= , register_t *r, =20 if ( read ) { - *r =3D (uint32_t)((v->arch.phys_timer.cval - cntpct) & 0xffffffffu= ll); + *r =3D (uint32_t)((v->arch.phys_timer.cval - cntpct) & 0xffffffffU= LL); } else { --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058223924708.595487448365; Thu, 3 Aug 2023 03:23:43 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576180.902058 (Exim 4.92) (envelope-from ) id 1qRVUL-0005U1-Ki; Thu, 03 Aug 2023 10:23:25 +0000 Received: by outflank-mailman (output) from mailman id 576180.902058; Thu, 03 Aug 2023 10:23:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUL-0005Tu-Gl; Thu, 03 Aug 2023 10:23:25 +0000 Received: by outflank-mailman (input) for mailman id 576180; Thu, 03 Aug 2023 10:23:23 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUJ-0004Rp-Ja for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:23:23 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c64a8d92-31e7-11ee-b268-6b7b168915f2; Thu, 03 Aug 2023 12:23:23 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id 765244EE0737; Thu, 3 Aug 2023 12:23:22 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c64a8d92-31e7-11ee-b268-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Jan Beulich , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Simone Ballarin Subject: [XEN PATCH 04/13] x86/IOMMU: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:19 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058224535100003 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Jan Beulich Reviewed-by: Stefano Stabellini --- xen/drivers/passthrough/x86/iommu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index d290855959..c85549ccad 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -576,16 +576,16 @@ struct page_info *iommu_alloc_pgtable(struct domain_i= ommu *hd, =20 ASSERT((CONTIG_LEVEL_SHIFT & (contig_mask >> shift)) =3D=3D CONTIG= _LEVEL_SHIFT); =20 - p[0] =3D (CONTIG_LEVEL_SHIFT + 0ull) << shift; + p[0] =3D (CONTIG_LEVEL_SHIFT + 0ULL) << shift; p[1] =3D 0; - p[2] =3D 1ull << shift; + p[2] =3D 1ULL << shift; p[3] =3D 0; =20 for ( i =3D 4; i < PAGE_SIZE / sizeof(*p); i +=3D 4 ) { - p[i + 0] =3D (find_first_set_bit(i) + 0ull) << shift; + p[i + 0] =3D (find_first_set_bit(i) + 0ULL) << shift; p[i + 1] =3D 0; - p[i + 2] =3D 1ull << shift; + p[i + 2] =3D 1ULL << shift; p[i + 3] =3D 0; } } --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058226141608.4212159868854; Thu, 3 Aug 2023 03:23:46 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576182.902067 (Exim 4.92) (envelope-from ) id 1qRVUM-0005br-7u; Thu, 03 Aug 2023 10:23:26 +0000 Received: by outflank-mailman (output) from mailman id 576182.902067; Thu, 03 Aug 2023 10:23:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUM-0005a4-2T; Thu, 03 Aug 2023 10:23:26 +0000 Received: by outflank-mailman (input) for mailman id 576182; Thu, 03 Aug 2023 10:23:25 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUL-0004Rp-0m for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:23:25 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c718767e-31e7-11ee-b268-6b7b168915f2; Thu, 03 Aug 2023 12:23:24 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id E185C4EE0740; Thu, 3 Aug 2023 12:23:23 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c718767e-31e7-11ee-b268-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Paul Durrant , Simone Ballarin Subject: [XEN PATCH 05/13] xen/ioreq: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:20 +0200 Message-Id: <771362e703548e55d4ccc420fa880585a5748c4f.1691053438.git.simone.ballarin@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058227787100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Paul Durrant Reviewed-by: Stefano Stabellini --- xen/common/ioreq.c | 2 +- xen/include/xen/ioreq.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/common/ioreq.c b/xen/common/ioreq.c index 7cb717f7a2..62b907f4c4 100644 --- a/xen/common/ioreq.c +++ b/xen/common/ioreq.c @@ -1182,7 +1182,7 @@ static int ioreq_send_buffered(struct ioreq_server *s= , ioreq_t *p) * - the count field is usually used with data_is_ptr and since we do= n't * support data_is_ptr we do not waste space for the count field ei= ther */ - if ( (p->addr > 0xffffful) || p->data_is_ptr || (p->count !=3D 1) ) + if ( (p->addr > 0xfffffUL) || p->data_is_ptr || (p->count !=3D 1) ) return 0; =20 switch ( p->size ) diff --git a/xen/include/xen/ioreq.h b/xen/include/xen/ioreq.h index a26614d331..cd399adf17 100644 --- a/xen/include/xen/ioreq.h +++ b/xen/include/xen/ioreq.h @@ -60,7 +60,7 @@ struct ioreq_server { static inline paddr_t ioreq_mmio_first_byte(const ioreq_t *p) { return unlikely(p->df) ? - p->addr - (p->count - 1ul) * p->size : + p->addr - (p->count - 1UL) * p->size : p->addr; } =20 --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058229843903.4031530947213; Thu, 3 Aug 2023 03:23:49 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576183.902088 (Exim 4.92) (envelope-from ) id 1qRVUO-0006Ir-HW; Thu, 03 Aug 2023 10:23:28 +0000 Received: by outflank-mailman (output) from mailman id 576183.902088; Thu, 03 Aug 2023 10:23:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUO-0006Ii-DC; Thu, 03 Aug 2023 10:23:28 +0000 Received: by outflank-mailman (input) for mailman id 576183; Thu, 03 Aug 2023 10:23:27 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVUN-0005QX-EG for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:23:27 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c7fccec2-31e7-11ee-8613-37d641c3527e; Thu, 03 Aug 2023 12:23:25 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id 483E64EE0737; Thu, 3 Aug 2023 12:23:25 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c7fccec2-31e7-11ee-8613-37d641c3527e From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu , Simone Ballarin Subject: [XEN PATCH 06/13] xen/mem_access: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:21 +0200 Message-Id: <7e4ff67a24206177c5a304055f395cc2983bb994.1691053438.git.simone.ballarin@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058230664100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Tamas K Lengyel Reviewed-by: Stefano Stabellini --- xen/common/mem_access.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/common/mem_access.c b/xen/common/mem_access.c index 010e6f8dbf..385950789c 100644 --- a/xen/common/mem_access.c +++ b/xen/common/mem_access.c @@ -60,7 +60,7 @@ int mem_access_memop(unsigned long cmd, =20 case XENMEM_access_op_set_access: rc =3D -EINVAL; - if ( (mao.pfn !=3D ~0ull) && + if ( (mao.pfn !=3D ~0ULL) && (mao.nr < start_iter || ((mao.pfn + mao.nr - 1) < mao.pfn) || ((mao.pfn + mao.nr - 1) > domain_get_maximum_gpfn(d))) ) @@ -96,7 +96,7 @@ int mem_access_memop(unsigned long cmd, break; =20 rc =3D -EINVAL; - if ( (mao.pfn > domain_get_maximum_gpfn(d)) && mao.pfn !=3D ~0ull ) + if ( (mao.pfn > domain_get_maximum_gpfn(d)) && mao.pfn !=3D ~0ULL ) break; =20 rc =3D p2m_get_mem_access(d, _gfn(mao.pfn), &access, 0); --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058460749864.832021757594; Thu, 3 Aug 2023 03:27:40 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576202.902097 (Exim 4.92) (envelope-from ) id 1qRVXv-0008Qz-9X; Thu, 03 Aug 2023 10:27:07 +0000 Received: by outflank-mailman (output) from mailman id 576202.902097; Thu, 03 Aug 2023 10:27:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVXv-0008Qs-6h; Thu, 03 Aug 2023 10:27:07 +0000 Received: by outflank-mailman (input) for mailman id 576202; Thu, 03 Aug 2023 10:27:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVXt-0008Qm-Rq for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:27:05 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4a719cfb-31e8-11ee-b268-6b7b168915f2; Thu, 03 Aug 2023 12:27:04 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id 4440D4EE0737; Thu, 3 Aug 2023 12:27:04 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4a719cfb-31e8-11ee-b268-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Simone Ballarin Subject: [XEN PATCH 07/13] xen/vpci: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:22 +0200 Message-Id: <4b97aa8203935ba6e202926add0baf8901af5ee9.1691053438.git.simone.ballarin@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058461627100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Roger Pau Monn=C3=A9 Reviewed-by: Stefano Stabellini --- xen/drivers/vpci/header.c | 2 +- xen/drivers/vpci/msi.c | 2 +- xen/drivers/vpci/msix.c | 10 +++++----- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index 60f7049e34..767c1ba718 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -447,7 +447,7 @@ static void cf_check bar_write( * Update the cached address, so that when memory decoding is enabled * Xen can map the BAR into the guest p2m. */ - bar->addr &=3D ~(0xffffffffull << (hi ? 32 : 0)); + bar->addr &=3D ~(0xffffffffULL << (hi ? 32 : 0)); bar->addr |=3D (uint64_t)val << (hi ? 32 : 0); =20 /* Make sure Xen writes back the same value for the BAR RO bits. */ diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index 8f2b59e61a..9090d97c9a 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -103,7 +103,7 @@ static void cf_check address_write( struct vpci_msi *msi =3D data; =20 /* Clear low part. */ - msi->address &=3D ~0xffffffffull; + msi->address &=3D ~0xffffffffULL; msi->address |=3D val; =20 update_msi(pdev, msi); diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 25bde77586..bc77d4825d 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -273,7 +273,7 @@ static int adjacent_read(const struct domain *d, const = struct vpci_msix *msix, struct vpci *vpci =3D msix->pdev->vpci; unsigned int slot; =20 - *data =3D ~0ul; + *data =3D ~0UL; =20 if ( !adjacent_handle(msix, addr + len - 1) ) return X86EMUL_OKAY; @@ -305,13 +305,13 @@ static int adjacent_read(const struct domain *d, cons= t struct vpci_msix *msix, */ for ( i =3D 0; i < len; i++ ) { - unsigned long partial =3D ~0ul; + unsigned long partial =3D ~0UL; int rc =3D adjacent_read(d, msix, addr + i, 1, &partial); =20 if ( rc !=3D X86EMUL_OKAY ) return rc; =20 - *data &=3D ~(0xfful << (i * 8)); + *data &=3D ~(0xffUL << (i * 8)); *data |=3D (partial & 0xff) << (i * 8); } =20 @@ -363,7 +363,7 @@ static int cf_check msix_read( const struct vpci_msix_entry *entry; unsigned int offset; =20 - *data =3D ~0ul; + *data =3D ~0UL; =20 if ( !msix ) return X86EMUL_RETRY; @@ -525,7 +525,7 @@ static int cf_check msix_write( entry->addr =3D data; break; } - entry->addr &=3D ~0xffffffffull; + entry->addr &=3D ~0xffffffffULL; entry->addr |=3D data; break; =20 --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058457355136.14307033490536; Thu, 3 Aug 2023 03:27:37 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576203.902109 (Exim 4.92) (envelope-from ) id 1qRVXy-0000FG-JC; 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Thu, 3 Aug 2023 12:27:08 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4cef0546-31e8-11ee-b268-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Paul Durrant , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Simone Ballarin Subject: [XEN PATCH 08/13] xen/hvm: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:23 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058459015100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Jan Beulich Acked-by: Paul Durrant Reviewed-by: Stefano Stabellini --- xen/arch/x86/hvm/emulate.c | 2 +- xen/arch/x86/hvm/io.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 75ee98a73b..053c6b495d 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -74,7 +74,7 @@ static int cf_check null_read( const struct hvm_io_handler *io_handler, uint64_t addr, uint32_t size, uint64_t *data) { - *data =3D ~0ul; + *data =3D ~0UL; return X86EMUL_OKAY; } =20 diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index 53de1a967d..d75af83ad0 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -400,7 +400,7 @@ static int cf_check vpci_mmcfg_read( unsigned int reg; pci_sbdf_t sbdf; =20 - *data =3D ~0ul; + *data =3D ~0UL; =20 read_lock(&d->arch.hvm.mmcfg_lock); mmcfg =3D vpci_mmcfg_find(d, addr); --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058465112692.4164974002905; Thu, 3 Aug 2023 03:27:45 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576204.902118 (Exim 4.92) (envelope-from ) id 1qRVY6-0000bK-Pu; Thu, 03 Aug 2023 10:27:18 +0000 Received: by outflank-mailman (output) from mailman id 576204.902118; Thu, 03 Aug 2023 10:27:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVY6-0000b6-MP; Thu, 03 Aug 2023 10:27:18 +0000 Received: by outflank-mailman (input) for mailman id 576204; Thu, 03 Aug 2023 10:27:18 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVY6-0000aV-3w for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:27:18 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 513cee2c-31e8-11ee-8613-37d641c3527e; Thu, 03 Aug 2023 12:27:16 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id 752E24EE0737; Thu, 3 Aug 2023 12:27:15 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 513cee2c-31e8-11ee-8613-37d641c3527e From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Jan Beulich , Andrew Cooper , George Dunlap , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Simone Ballarin Subject: [XEN PATCH 09/13] x86/mm: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:24 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058465659100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Jan Beulich Reviewed-by: Stefano Stabellini --- xen/arch/x86/mm/p2m-pt.c | 6 +++--- xen/arch/x86/mm/p2m.c | 20 ++++++++++---------- xen/arch/x86/mm/physmap.c | 4 ++-- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c index 6d1bb5daad..b2b14746c1 100644 --- a/xen/arch/x86/mm/p2m-pt.c +++ b/xen/arch/x86/mm/p2m-pt.c @@ -552,7 +552,7 @@ static void check_entry(mfn_t mfn, p2m_type_t new, p2m_= type_t old, if ( new =3D=3D p2m_mmio_direct ) ASSERT(!mfn_eq(mfn, INVALID_MFN) && !rangeset_overlaps_range(mmio_ro_ranges, mfn_x(mfn), - mfn_x(mfn) + (1ul << order))); + mfn_x(mfn) + (1UL << order))); else if ( p2m_allows_invalid_mfn(new) || new =3D=3D p2m_invalid || new =3D=3D p2m_mmio_dm ) ASSERT(mfn_valid(mfn) || mfn_eq(mfn, INVALID_MFN)); @@ -745,9 +745,9 @@ p2m_pt_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mf= n_t mfn, if ( need_iommu_pt_sync(p2m->domain) && (iommu_old_flags !=3D iommu_pte_flags || old_mfn !=3D mfn_x(mfn))= ) rc =3D iommu_pte_flags - ? iommu_legacy_map(d, _dfn(gfn), mfn, 1ul << page_order, + ? iommu_legacy_map(d, _dfn(gfn), mfn, 1UL << page_order, iommu_pte_flags) - : iommu_legacy_unmap(d, _dfn(gfn), 1ul << page_order); + : iommu_legacy_unmap(d, _dfn(gfn), 1UL << page_order); =20 /* * Free old intermediate tables if necessary. This has to be the diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index f6df35767a..0983bd71d9 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -392,7 +392,7 @@ int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, mf= n_t mfn, unsigned int page_order, p2m_type_t p2mt, p2m_access_t p= 2ma) { bool hap =3D hap_enabled(p2m->domain); - unsigned long todo =3D 1ul << page_order; + unsigned long todo =3D 1UL << page_order; int set_rc, rc =3D 0; =20 ASSERT(gfn_locked_by_me(p2m, gfn)); @@ -401,10 +401,10 @@ int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, = mfn_t mfn, { unsigned long fn_mask =3D (!mfn_eq(mfn, INVALID_MFN) ? mfn_x(mfn) = : 0) | gfn_x(gfn) | todo; - unsigned int order =3D (!(fn_mask & ((1ul << PAGE_ORDER_1G) - 1)) = && + unsigned int order =3D (!(fn_mask & ((1UL << PAGE_ORDER_1G) - 1)) = && hap && hap_has_1gb) ? PAGE_ORDER_1G - : (!(fn_mask & ((1ul << PAGE_ORDER_2M) - 1)) = && + : (!(fn_mask & ((1UL << PAGE_ORDER_2M) - 1)) = && (!hap || hap_has_2mb)) ? PAGE_ORDER_2M : PAGE_ORDER_4K; =20 @@ -412,10 +412,10 @@ int p2m_set_entry(struct p2m_domain *p2m, gfn_t gfn, = mfn_t mfn, if ( set_rc ) rc =3D set_rc; =20 - gfn =3D gfn_add(gfn, 1ul << order); + gfn =3D gfn_add(gfn, 1UL << order); if ( !mfn_eq(mfn, INVALID_MFN) ) - mfn =3D mfn_add(mfn, 1ul << order); - todo -=3D 1ul << order; + mfn =3D mfn_add(mfn, 1UL << order); + todo -=3D 1UL << order; } =20 return rc; @@ -1407,7 +1407,7 @@ void np2m_flush_base(struct vcpu *v, unsigned long np= 2m_base) struct p2m_domain *p2m; unsigned int i; =20 - np2m_base &=3D ~(0xfffull); + np2m_base &=3D ~(0xfffULL); =20 nestedp2m_lock(d); for ( i =3D 0; i < MAX_NESTEDP2M; i++ ) @@ -1456,7 +1456,7 @@ p2m_get_nestedp2m_locked(struct vcpu *v) bool needs_flush =3D true; =20 /* Mask out low bits; this avoids collisions with P2M_BASE_EADDR */ - np2m_base &=3D ~(0xfffull); + np2m_base &=3D ~(0xfffULL); =20 if (nv->nv_flushp2m && nv->nv_p2m) { nv->nv_p2m =3D NULL; @@ -1614,8 +1614,8 @@ unsigned long paging_gva_to_gfn(struct vcpu *v, * Sanity check that l1_gfn can be used properly as a 4K mapping, = even * if it mapped by a nested superpage. */ - ASSERT((l2_gfn & ((1ul << l1_page_order) - 1)) =3D=3D - (l1_gfn & ((1ul << l1_page_order) - 1))); + ASSERT((l2_gfn & ((1UL << l1_page_order) - 1)) =3D=3D + (l1_gfn & ((1UL << l1_page_order) - 1))); =20 return l1_gfn; } diff --git a/xen/arch/x86/mm/physmap.c b/xen/arch/x86/mm/physmap.c index f1695e456e..098ccdf541 100644 --- a/xen/arch/x86/mm/physmap.c +++ b/xen/arch/x86/mm/physmap.c @@ -72,7 +72,7 @@ int set_identity_p2m_entry(struct domain *d, unsigned lon= g gfn, if ( !is_iommu_enabled(d) ) return 0; return iommu_legacy_map(d, _dfn(gfn), _mfn(gfn), - 1ul << PAGE_ORDER_4K, + 1UL << PAGE_ORDER_4K, p2m_access_to_iommu_flags(p2ma)); } =20 @@ -85,7 +85,7 @@ int clear_identity_p2m_entry(struct domain *d, unsigned l= ong gfn) { if ( !is_iommu_enabled(d) ) return 0; - return iommu_legacy_unmap(d, _dfn(gfn), 1ul << PAGE_ORDER_4K); + return iommu_legacy_unmap(d, _dfn(gfn), 1UL << PAGE_ORDER_4K); } =20 return p2m_remove_identity_entry(d, gfn); --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Thu, 03 Aug 2023 10:27:23 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 54644258-31e8-11ee-8613-37d641c3527e; Thu, 03 Aug 2023 12:27:21 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id BD84F4EE0737; Thu, 3 Aug 2023 12:27:20 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 54644258-31e8-11ee-8613-37d641c3527e From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Paul Durrant , Wei Liu , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Simone Ballarin Subject: [XEN PATCH 10/13] x86/viridian: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:25 +0200 Message-Id: <63f0d6385f302517244604af5536ffebd74ba589.1691053438.git.simone.ballarin@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058468443100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Paul Durrant Reviewed-by: Stefano Stabellini --- xen/arch/x86/hvm/viridian/synic.c | 2 +- xen/arch/x86/hvm/viridian/time.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/viridian/synic.c b/xen/arch/x86/hvm/viridian/= synic.c index 83d7addfc3..8cf600cec6 100644 --- a/xen/arch/x86/hvm/viridian/synic.c +++ b/xen/arch/x86/hvm/viridian/synic.c @@ -233,7 +233,7 @@ int viridian_synic_rdmsr(const struct vcpu *v, uint32_t= idx, uint64_t *val) * should be set to. Assume everything but the bottom bit * should be zero. */ - *val =3D 1ul; + *val =3D 1UL; break; =20 case HV_X64_MSR_SIEFP: diff --git a/xen/arch/x86/hvm/viridian/time.c b/xen/arch/x86/hvm/viridian/t= ime.c index a3ea3fa067..137577384f 100644 --- a/xen/arch/x86/hvm/viridian/time.c +++ b/xen/arch/x86/hvm/viridian/time.c @@ -66,7 +66,7 @@ static void update_reference_tsc(const struct domain *d, = bool initialize) * The offset value is calculated on restore after migration and * ensures that Windows will not see a large jump in ReferenceTime. */ - p->tsc_scale =3D ((10000ul << 32) / d->arch.tsc_khz) << 32; + p->tsc_scale =3D ((10000UL << 32) / d->arch.tsc_khz) << 32; p->tsc_offset =3D trc->off; smp_wmb(); =20 @@ -79,7 +79,7 @@ static uint64_t trc_val(const struct domain *d, int64_t o= ffset) uint64_t tsc, scale; =20 tsc =3D hvm_get_guest_tsc(pt_global_vcpu_target(d)); - scale =3D ((10000ul << 32) / d->arch.tsc_khz) << 32; + scale =3D ((10000UL << 32) / d->arch.tsc_khz) << 32; =20 return hv_scale_tsc(tsc, scale, offset); } @@ -201,7 +201,7 @@ static void start_stimer(struct viridian_stimer *vs) ASSERT(expiration - now > 0); =20 vs->expiration =3D expiration; - timeout =3D (expiration - now) * 100ull; + timeout =3D (expiration - now) * 100ULL; =20 vs->started =3D true; clear_bit(stimerx, &vv->stimer_pending); @@ -413,14 +413,14 @@ int viridian_time_rdmsr(const struct vcpu *v, uint32_= t idx, uint64_t *val) if ( viridian_feature_mask(d) & HVMPV_no_freq ) return X86EMUL_EXCEPTION; =20 - *val =3D (uint64_t)d->arch.tsc_khz * 1000ull; + *val =3D (uint64_t)d->arch.tsc_khz * 1000ULL; break; =20 case HV_X64_MSR_APIC_FREQUENCY: if ( viridian_feature_mask(d) & HVMPV_no_freq ) return X86EMUL_EXCEPTION; =20 - *val =3D 1000000000ull / APIC_BUS_CYCLE_NS; + *val =3D 1000000000ULL / APIC_BUS_CYCLE_NS; break; =20 case HV_X64_MSR_REFERENCE_TSC: --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058474543260.71683342428366; Thu, 3 Aug 2023 03:27:54 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576219.902138 (Exim 4.92) (envelope-from ) id 1qRVYG-0001XR-C4; Thu, 03 Aug 2023 10:27:28 +0000 Received: by outflank-mailman (output) from mailman id 576219.902138; Thu, 03 Aug 2023 10:27:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVYG-0001XH-8k; Thu, 03 Aug 2023 10:27:28 +0000 Received: by outflank-mailman (input) for mailman id 576219; Thu, 03 Aug 2023 10:27:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qRVYE-0008Qm-Iv for xen-devel@lists.xenproject.org; Thu, 03 Aug 2023 10:27:26 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 56df6d5b-31e8-11ee-b268-6b7b168915f2; Thu, 03 Aug 2023 12:27:25 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id F3C004EE0737; Thu, 3 Aug 2023 12:27:24 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 56df6d5b-31e8-11ee-b268-6b7b168915f2 From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Simone Ballarin Subject: [XEN PATCH 11/13] xen/x86: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:26 +0200 Message-Id: <40f438ad05338dd86587eb469c7b0614e1d69462.1691053438.git.simone.ballarin@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058475098100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Acked-by: Jan Beulich Reviewed-by: Stefano Stabellini --- xen/arch/x86/cpu-policy.c | 4 ++-- xen/arch/x86/dom0_build.c | 2 +- xen/arch/x86/e820.c | 2 +- xen/arch/x86/hpet.c | 2 +- xen/arch/x86/hvm/hpet.c | 6 +++--- xen/arch/x86/hvm/hvm.c | 6 +++--- xen/arch/x86/hvm/stdvga.c | 2 +- xen/arch/x86/include/asm/apicdef.h | 4 ++-- xen/arch/x86/include/asm/debugreg.h | 16 ++++++++-------- xen/arch/x86/include/asm/guest_pt.h | 16 ++++++++-------- xen/arch/x86/include/asm/pv/domain.h | 2 +- xen/arch/x86/mm.c | 4 ++-- xen/arch/x86/msr.c | 2 +- xen/arch/x86/nmi.c | 2 +- xen/arch/x86/psr.c | 8 ++++---- xen/arch/x86/spec_ctrl.c | 6 +++--- xen/arch/x86/x86_64/mm.c | 4 ++-- xen/arch/x86/xstate.c | 2 +- xen/lib/x86/cpuid.c | 4 ++-- 19 files changed, 47 insertions(+), 47 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 1f954d4e59..5fbb3602ae 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -250,9 +250,9 @@ static void recalculate_xstate(struct cpu_policy *p) else xstates &=3D ~XSTATE_XSAVES_ONLY; =20 - for ( i =3D 2; i < min(63ul, ARRAY_SIZE(p->xstate.comp)); ++i ) + for ( i =3D 2; i < min(63UL, ARRAY_SIZE(p->xstate.comp)); ++i ) { - uint64_t curr_xstate =3D 1ul << i; + uint64_t curr_xstate =3D 1UL << i; =20 if ( !(xstates & curr_xstate) ) continue; diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 8b1fcc6471..09fb8b063a 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -537,7 +537,7 @@ int __init dom0_setup_permissions(struct domain *d) for ( i =3D 0; i < e820.nr_map; i++ ) { unsigned long sfn, efn; - sfn =3D max_t(unsigned long, paddr_to_pfn(e820.map[i].addr), 0x100= ul); + sfn =3D max_t(unsigned long, paddr_to_pfn(e820.map[i].addr), 0x100= UL); efn =3D paddr_to_pfn(e820.map[i].addr + e820.map[i].size - 1); if ( (e820.map[i].type =3D=3D E820_UNUSABLE) && (e820.map[i].size !=3D 0) && diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c index 0b89935510..4911e64b8c 100644 --- a/xen/arch/x86/e820.c +++ b/xen/arch/x86/e820.c @@ -450,7 +450,7 @@ static uint64_t __init mtrr_top_of_ram(void) =20 /* paddr_bits must have been set at this point */ ASSERT(paddr_bits); - addr_mask =3D ((1ull << paddr_bits) - 1) & PAGE_MASK; + addr_mask =3D ((1ULL << paddr_bits) - 1) & PAGE_MASK; =20 rdmsrl(MSR_MTRRcap, mtrr_cap); rdmsrl(MSR_MTRRdefType, mtrr_def); diff --git a/xen/arch/x86/hpet.c b/xen/arch/x86/hpet.c index bc164dd82c..a2df1c7df4 100644 --- a/xen/arch/x86/hpet.c +++ b/xen/arch/x86/hpet.c @@ -619,7 +619,7 @@ void __init cf_check hpet_broadcast_init(void) * math multiplication factor for nanosecond to hpet tick conversi= on. */ hpet_events[i].mult =3D div_sc((unsigned long)hpet_rate, - 1000000000ul, 32); + 1000000000UL, 32); hpet_events[i].shift =3D 32; hpet_events[i].next_event =3D STIME_MAX; spin_lock_init(&hpet_events[i].lock); diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index dff27b760e..80f323316c 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -161,7 +161,7 @@ static int cf_check hpet_read( =20 if ( !v->domain->arch.hvm.params[HVM_PARAM_HPET_ENABLED] ) { - result =3D ~0ul; + result =3D ~0UL; goto out; } =20 @@ -169,7 +169,7 @@ static int cf_check hpet_read( =20 if ( hpet_check_access_length(addr, length) !=3D 0 ) { - result =3D ~0ul; + result =3D ~0UL; goto out; } =20 @@ -486,7 +486,7 @@ static int cf_check hpet_write( if ( timer_is_periodic(h, tn) && !(h->hpet.timers[tn].config & HPET_TN_SETVAL) ) { - uint64_t max_period =3D (timer_is_32bit(h, tn) ? ~0u : ~0ull) = >> 1; + uint64_t max_period =3D (timer_is_32bit(h, tn) ? ~0u : ~0ULL) = >> 1; =20 /* * Clamp period to reasonable min/max values: diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 2180abeb33..3a99c0ff20 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -294,7 +294,7 @@ void hvm_get_guest_pat(struct vcpu *v, uint64_t *guest_= pat) static bool pat_valid(uint64_t val) { /* Yields a non-zero value in any lane which had value greater than 7.= */ - uint64_t any_gt_7 =3D val & 0xf8f8f8f8f8f8f8f8ull; + uint64_t any_gt_7 =3D val & 0xf8f8f8f8f8f8f8f8ULL; =20 /* * With the > 7 case covered, identify lanes with the value 0-3 by fin= ding @@ -302,7 +302,7 @@ static bool pat_valid(uint64_t val) * * Yields bit 2 set in each lane which has a value <=3D 3. */ - uint64_t any_le_3 =3D ~val & 0x0404040404040404ull; + uint64_t any_le_3 =3D ~val & 0x0404040404040404ULL; =20 /* * Logically, any_2_or_3 is "any_le_3 && bit 1 set". @@ -3626,7 +3626,7 @@ int hvm_msr_read_intercept(unsigned int msr, uint64_t= *msr_content) =20 gp_fault: ret =3D X86EMUL_EXCEPTION; - *msr_content =3D -1ull; + *msr_content =3D -1ULL; goto out; } =20 diff --git a/xen/arch/x86/hvm/stdvga.c b/xen/arch/x86/hvm/stdvga.c index 798a9a0549..2586891863 100644 --- a/xen/arch/x86/hvm/stdvga.c +++ b/xen/arch/x86/hvm/stdvga.c @@ -305,7 +305,7 @@ static int cf_check stdvga_mem_read( const struct hvm_io_handler *handler, uint64_t addr, uint32_t size, uint64_t *p_data) { - uint64_t data =3D ~0ul; + uint64_t data =3D ~0UL; =20 switch ( size ) { diff --git a/xen/arch/x86/include/asm/apicdef.h b/xen/arch/x86/include/asm/= apicdef.h index 2440d83c8d..a261436993 100644 --- a/xen/arch/x86/include/asm/apicdef.h +++ b/xen/arch/x86/include/asm/apicdef.h @@ -34,8 +34,8 @@ #define SET_xAPIC_LOGICAL_ID(x) (((x)<<24)) #define APIC_ALL_CPUS 0xFF #define APIC_DFR 0xE0 -#define APIC_DFR_CLUSTER 0x0FFFFFFFul -#define APIC_DFR_FLAT 0xFFFFFFFFul +#define APIC_DFR_CLUSTER 0x0FFFFFFFUL +#define APIC_DFR_FLAT 0xFFFFFFFFUL #define APIC_SPIV 0xF0 #define APIC_SPIV_FOCUS_DISABLED (1<<9) #define APIC_SPIV_APIC_ENABLED (1<<8) diff --git a/xen/arch/x86/include/asm/debugreg.h b/xen/arch/x86/include/asm= /debugreg.h index c57914efc6..86aa6d7143 100644 --- a/xen/arch/x86/include/asm/debugreg.h +++ b/xen/arch/x86/include/asm/debugreg.h @@ -21,8 +21,8 @@ #define DR_STEP (0x4000) /* single-step */ #define DR_SWITCH (0x8000) /* task switch */ #define DR_NOT_RTM (0x10000) /* clear: #BP inside RTM region */ -#define DR_STATUS_RESERVED_ZERO (~0xffffeffful) /* Reserved, read as zero = */ -#define DR_STATUS_RESERVED_ONE 0xffff0ff0ul /* Reserved, read as one */ +#define DR_STATUS_RESERVED_ZERO (~0xffffefffUL) /* Reserved, read as zero = */ +#define DR_STATUS_RESERVED_ONE 0xffff0ff0UL /* Reserved, read as one */ =20 /* Now define a bunch of things for manipulating the control register. The top two bytes of the control register consist of 4 fields of 4 @@ -61,12 +61,12 @@ We can slow the instruction pipeline for instructions coming via the gdt or the ldt if we want to. I am not sure why this is an advantage */ =20 -#define DR_CONTROL_RESERVED_ZERO (~0xffff27fful) /* Reserved, read as zero= */ -#define DR_CONTROL_RESERVED_ONE (0x00000400ul) /* Reserved, read as one */ -#define DR_LOCAL_EXACT_ENABLE (0x00000100ul) /* Local exact enable */ -#define DR_GLOBAL_EXACT_ENABLE (0x00000200ul) /* Global exact enable */ -#define DR_RTM_ENABLE (0x00000800ul) /* RTM debugging enable */ -#define DR_GENERAL_DETECT (0x00002000ul) /* General detect enable */ +#define DR_CONTROL_RESERVED_ZERO (~0xffff27ffUL) /* Reserved, read as zero= */ +#define DR_CONTROL_RESERVED_ONE (0x00000400UL) /* Reserved, read as one */ +#define DR_LOCAL_EXACT_ENABLE (0x00000100UL) /* Local exact enable */ +#define DR_GLOBAL_EXACT_ENABLE (0x00000200UL) /* Global exact enable */ +#define DR_RTM_ENABLE (0x00000800UL) /* RTM debugging enable */ +#define DR_GENERAL_DETECT (0x00002000UL) /* General detect enable */ =20 #define write_debugreg(reg, val) do { \ unsigned long __val =3D val; \ diff --git a/xen/arch/x86/include/asm/guest_pt.h b/xen/arch/x86/include/asm= /guest_pt.h index bde7588342..bc312343cd 100644 --- a/xen/arch/x86/include/asm/guest_pt.h +++ b/xen/arch/x86/include/asm/guest_pt.h @@ -32,15 +32,15 @@ gfn_to_paddr(gfn_t gfn) =20 /* Mask covering the reserved bits from superpage alignment. */ #define SUPERPAGE_RSVD(bit) \ - (((1ul << (bit)) - 1) & ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1ul))) + (((1UL << (bit)) - 1) & ~(_PAGE_PSE_PAT | (_PAGE_PSE_PAT - 1UL))) =20 static inline uint32_t fold_pse36(uint64_t val) { - return (val & ~(0x1fful << 13)) | ((val & (0x1fful << 32)) >> (32 - 13= )); + return (val & ~(0x1ffUL << 13)) | ((val & (0x1ffUL << 32)) >> (32 - 13= )); } static inline uint64_t unfold_pse36(uint32_t val) { - return (val & ~(0x1fful << 13)) | ((val & (0x1fful << 13)) << (32 - 13= )); + return (val & ~(0x1ffUL << 13)) | ((val & (0x1ffUL << 13)) << (32 - 13= )); } =20 /* Types of the guest's page tables and access functions for them */ @@ -99,10 +99,10 @@ static inline guest_l2e_t guest_l2e_from_gfn(gfn_t gfn,= u32 flags) #define GUEST_L2_PAGETABLE_SHIFT 21 #define GUEST_L3_PAGETABLE_SHIFT 30 =20 -#define GUEST_L1_PAGETABLE_RSVD 0x7ff0000000000000ul -#define GUEST_L2_PAGETABLE_RSVD 0x7ff0000000000000ul +#define GUEST_L1_PAGETABLE_RSVD 0x7ff0000000000000UL +#define GUEST_L2_PAGETABLE_RSVD 0x7ff0000000000000UL #define GUEST_L3_PAGETABLE_RSVD \ - (0xfff0000000000000ul | _PAGE_GLOBAL | _PAGE_PSE | _PAGE_DIRTY | \ + (0xfff0000000000000UL | _PAGE_GLOBAL | _PAGE_PSE | _PAGE_DIRTY | \ _PAGE_ACCESSED | _PAGE_USER | _PAGE_RW) =20 #else /* GUEST_PAGING_LEVELS =3D=3D 4 */ @@ -281,7 +281,7 @@ static always_inline bool guest_pks_enabled(const struc= t vcpu *v) static always_inline uint64_t guest_rsvd_bits(const struct vcpu *v) { return ((PADDR_MASK & - ~((1ul << v->domain->arch.cpuid->extd.maxphysaddr) - 1)) | + ~((1UL << v->domain->arch.cpuid->extd.maxphysaddr) - 1)) | (guest_nx_enabled(v) ? 0 : put_pte_flags(_PAGE_NX_BIT))); } =20 @@ -301,7 +301,7 @@ static always_inline bool guest_l2e_rsvd_bits(const str= uct vcpu *v, ((l2e.l2 & _PAGE_PSE) && (l2e.l2 & ((GUEST_PAGING_LEVELS =3D=3D 2 && guest_can_use_pse= 36(v->domain)) /* PSE36 tops out at 40 bits of address width. */ - ? (fold_pse36(rsvd_bits | (1ul << 40))) + ? (fold_pse36(rsvd_bits | (1UL << 40))) : SUPERPAGE_RSVD(GUEST_L2_PAGETABLE_SHIFT))))); } =20 diff --git a/xen/arch/x86/include/asm/pv/domain.h b/xen/arch/x86/include/as= m/pv/domain.h index db7a40f68e..75a6b9e5c7 100644 --- a/xen/arch/x86/include/asm/pv/domain.h +++ b/xen/arch/x86/include/asm/pv/domain.h @@ -93,7 +93,7 @@ static inline int pv_vcpu_initialise(struct vcpu *v) { re= turn -EOPNOTSUPP; } static inline void pv_domain_destroy(struct domain *d) {} static inline int pv_domain_initialise(struct domain *d) { return -EOPNOTS= UPP; } =20 -static inline unsigned long pv_make_cr4(const struct vcpu *v) { return ~0u= l; } +static inline unsigned long pv_make_cr4(const struct vcpu *v) { return ~0U= L; } =20 static inline uint64_t pv_get_reg(struct vcpu *v, unsigned int reg) { diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index be2b10a391..ad0eafc900 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -3057,10 +3057,10 @@ static int _get_page_type(struct page_info *page, u= nsigned long type, =20 if ( (x & PGT_type_mask) =3D=3D PGT_writable_page ) rc =3D iommu_legacy_unmap(d, _dfn(mfn_x(mfn)), - 1ul << PAGE_ORDER_4K); + 1UL << PAGE_ORDER_4K); else rc =3D iommu_legacy_map(d, _dfn(mfn_x(mfn)), mfn, - 1ul << PAGE_ORDER_4K, + 1UL << PAGE_ORDER_4K, IOMMUF_readable | IOMMUF_writable); =20 if ( unlikely(rc) ) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index ecf126566d..ef55498c1a 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -431,7 +431,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t = val) { bool old_cpuid_faulting =3D msrs->misc_features_enables.cpuid_faul= ting; =20 - rsvd =3D ~0ull; + rsvd =3D ~0ULL; if ( cp->platform_info.cpuid_faulting ) rsvd &=3D ~MSR_MISC_FEATURES_CPUID_FAULTING; =20 diff --git a/xen/arch/x86/nmi.c b/xen/arch/x86/nmi.c index 7656023748..c5c28300b0 100644 --- a/xen/arch/x86/nmi.c +++ b/xen/arch/x86/nmi.c @@ -205,7 +205,7 @@ void __init check_nmi_watchdog(void) * (Intel SDM, section 18.22.2) */ if ( nmi_watchdog =3D=3D NMI_LOCAL_APIC ) - nmi_hz =3D max(1ul, cpu_khz >> 20); + nmi_hz =3D max(1UL, cpu_khz >> 20); =20 return; } diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index 90bcb25e60..4c01813c4b 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -289,7 +289,7 @@ static bool cf_check cat_check_cbm(const struct feat_no= de *feat, uint32_t *val) unsigned long cbm =3D *val; =20 /* Set bits should only in the range of [0, cbm_len). */ - if ( cbm & (~0ul << cbm_len) ) + if ( cbm & (~0UL << cbm_len) ) return false; =20 /* At least one bit need to be set. */ @@ -360,7 +360,7 @@ static bool cat_init_feature(const struct cpuid_leaf *r= egs, wrmsrl(MSR_IA32_PSR_L3_MASK(1), cat_default_val(feat->cat.cbm_len)= ); rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val); wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, - val | (1ull << PSR_L3_QOS_CDP_ENABLE_BIT)); + val | (1ULL << PSR_L3_QOS_CDP_ENABLE_BIT)); =20 break; } @@ -636,7 +636,7 @@ static void __init init_psr_cmt(unsigned int rmid_max) =20 psr_cmt->features =3D edx; psr_cmt->rmid_max =3D min(rmid_max, ebx); - rmid_mask =3D ~(~0ull << get_count_order(ebx)); + rmid_mask =3D ~(~0ULL << get_count_order(ebx)); =20 if ( psr_cmt->features & PSR_RESOURCE_TYPE_L3 ) { @@ -738,7 +738,7 @@ static void psr_assoc_init(void) unsigned int cos_max =3D get_max_cos_max(info); =20 if ( info->feat_init ) - psra->cos_mask =3D ((1ull << get_count_order(cos_max)) - 1) << + psra->cos_mask =3D ((1ULL << get_count_order(cos_max)) - 1) << ASSOC_REG_SHIFT; } =20 diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 4081cef200..bc50173620 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -1047,7 +1047,7 @@ static __init void l1tf_calculations(void) * The address mask which the L1D cache uses, which might be wider than * the CPUID-reported maxphysaddr. */ - l1tf_addr_mask =3D ((1ul << l1d_maxphysaddr) - 1) & PAGE_MASK; + l1tf_addr_mask =3D ((1UL << l1d_maxphysaddr) - 1) & PAGE_MASK; =20 /* * To be safe, l1tf_safe_maddr must be above the highest cacheable ent= ity @@ -1087,8 +1087,8 @@ static __init void l1tf_calculations(void) * information is in terms of guest physical layout. */ l1tf_safe_maddr =3D max(l1tf_safe_maddr, ((l1d_maxphysaddr > paddr_bit= s) - ? (1ul << paddr_bits) - : (3ul << (paddr_bits - 2)))); + ? (1UL << paddr_bits) + : (3UL << (paddr_bits - 2)))); } =20 /* Calculate whether this CPU is vulnerable to MDS. */ diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index 60db439af3..15b36e332d 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1313,7 +1313,7 @@ int memory_add(unsigned long spfn, unsigned long epfn= , unsigned int pxm) { for ( i =3D spfn; i < epfn; i++ ) if ( iommu_legacy_map(hardware_domain, _dfn(i), _mfn(i), - 1ul << PAGE_ORDER_4K, + 1UL << PAGE_ORDER_4K, IOMMUF_readable | IOMMUF_writable) ) break; if ( i !=3D epfn ) @@ -1321,7 +1321,7 @@ int memory_add(unsigned long spfn, unsigned long epfn= , unsigned int pxm) while (i-- > old_max) /* If statement to satisfy __must_check. */ if ( iommu_legacy_unmap(hardware_domain, _dfn(i), - 1ul << PAGE_ORDER_4K) ) + 1UL << PAGE_ORDER_4K) ) continue; =20 goto destroy_m2p; diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 92496f3795..3062c28219 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -150,7 +150,7 @@ static void setup_xstate_comp(uint16_t *comp_offsets, offset =3D comp_offsets[2]; for ( i =3D 2; i < xstate_features; i++ ) { - if ( (1ul << i) & xcomp_bv ) + if ( (1UL << i) & xcomp_bv ) { if ( test_bit(i, &xstate_align) ) offset =3D ROUNDUP(offset, 64); diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index 07e5501914..2006cbaa1c 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -211,7 +211,7 @@ void x86_cpu_policy_fill_native(struct cpu_policy *p) for ( i =3D 2; i < min_t(unsigned int, 63, ARRAY_SIZE(p->xstate.raw)); ++i ) { - if ( xstates & (1ull << i) ) + if ( xstates & (1ULL << i) ) cpuid_count_leaf(0xd, i, &p->xstate.raw[i]); } } @@ -419,7 +419,7 @@ int x86_cpuid_copy_to_buffer(const struct cpu_policy *p, &(struct cpuid_leaf){ p->hv2_limit }); =20 /* Extended leaves. */ - for ( leaf =3D 0; leaf <=3D MIN(p->extd.max_leaf & 0xfffful, + for ( leaf =3D 0; leaf <=3D MIN(p->extd.max_leaf & 0xffffUL, ARRAY_SIZE(p->extd.raw) - 1); ++leaf ) COPY_LEAF(0x80000000 | leaf, XEN_CPUID_NO_SUBLEAF, &p->extd.raw[le= af]); =20 --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Thu, 03 Aug 2023 10:27:39 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5e062244-31e8-11ee-8613-37d641c3527e; Thu, 03 Aug 2023 12:27:37 +0200 (CEST) Received: from beta.station (net-188-218-251-179.cust.vodafonedsl.it [188.218.251.179]) by support.bugseng.com (Postfix) with ESMTPSA id D8B1D4EE0737; Thu, 3 Aug 2023 12:27:36 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5e062244-31e8-11ee-8613-37d641c3527e From: Simone Ballarin To: xen-devel@lists.xenproject.org Cc: consulting@bugseng.com, Gianluca Luparini , Andrew Cooper , George Dunlap , Jan Beulich , Julien Grall , Stefano Stabellini , Wei Liu , Simone Ballarin Subject: [XEN PATCH 12/13] xen/common: address violations of MISRA C:2012 Rule 7.3 Date: Thu, 3 Aug 2023 12:22:27 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1691058485740100001 Content-Type: text/plain; charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini --- xen/common/page_alloc.c | 6 +++--- xen/common/rangeset.c | 2 +- xen/common/softirq.c | 8 ++++---- xen/common/vsprintf.c | 2 +- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index e40473f71e..03b63d0ee7 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -2380,7 +2380,7 @@ int assign_pages( if ( unlikely(nr > d->max_pages - tot_pages) ) { gprintk(XENLOG_INFO, "Over-allocation for %pd: %Lu > %u\n", - d, tot_pages + 0ull + nr, d->max_pages); + d, tot_pages + 0ULL + nr, d->max_pages); rc =3D -E2BIG; goto out; } @@ -2392,7 +2392,7 @@ int assign_pages( { gprintk(XENLOG_INFO, "Excess allocation for %pd: %Lu (%u extra)\n", - d, d->tot_pages + 0ull + nr, d->extra_pages); + d, d->tot_pages + 0ULL + nr, d->extra_pages); if ( pg[0].count_info & PGC_extra ) d->extra_pages -=3D nr; rc =3D -E2BIG; @@ -2460,7 +2460,7 @@ struct page_info *alloc_domheap_pages( { unsigned long i; =20 - for ( i =3D 0; i < (1ul << order); i++ ) + for ( i =3D 0; i < (1UL << order); i++ ) { ASSERT(!pg[i].count_info); pg[i].count_info =3D PGC_extra; diff --git a/xen/common/rangeset.c b/xen/common/rangeset.c index a6ef264046..f3baf52ab6 100644 --- a/xen/common/rangeset.c +++ b/xen/common/rangeset.c @@ -393,7 +393,7 @@ static int cf_check merge(unsigned long s, unsigned lon= g e, void *data) =20 int rangeset_merge(struct rangeset *r1, struct rangeset *r2) { - return rangeset_report_ranges(r2, 0, ~0ul, merge, r1); + return rangeset_report_ranges(r2, 0, ~0UL, merge, r1); } =20 int rangeset_add_singleton( diff --git a/xen/common/softirq.c b/xen/common/softirq.c index 063e93cbe3..321d26902d 100644 --- a/xen/common/softirq.c +++ b/xen/common/softirq.c @@ -29,7 +29,7 @@ static void __do_softirq(unsigned long ignore_mask) { unsigned int i, cpu; unsigned long pending; - bool rcu_allowed =3D !(ignore_mask & (1ul << RCU_SOFTIRQ)); + bool rcu_allowed =3D !(ignore_mask & (1UL << RCU_SOFTIRQ)); =20 ASSERT(!rcu_allowed || rcu_quiesce_allowed()); =20 @@ -57,12 +57,12 @@ static void __do_softirq(unsigned long ignore_mask) void process_pending_softirqs(void) { /* Do not enter scheduler as it can preempt the calling context. */ - unsigned long ignore_mask =3D (1ul << SCHEDULE_SOFTIRQ) | - (1ul << SCHED_SLAVE_SOFTIRQ); + unsigned long ignore_mask =3D (1UL << SCHEDULE_SOFTIRQ) | + (1UL << SCHED_SLAVE_SOFTIRQ); =20 /* Block RCU processing in case of rcu_read_lock() held. */ if ( !rcu_quiesce_allowed() ) - ignore_mask |=3D 1ul << RCU_SOFTIRQ; + ignore_mask |=3D 1UL << RCU_SOFTIRQ; =20 ASSERT(!in_irq() && local_irq_is_enabled()); __do_softirq(ignore_mask); diff --git a/xen/common/vsprintf.c b/xen/common/vsprintf.c index 94c1ba7257..c49631c0a4 100644 --- a/xen/common/vsprintf.c +++ b/xen/common/vsprintf.c @@ -225,7 +225,7 @@ static char *print_bitmap_string(char *str, const char = *end, */ for ( i =3D ROUNDUP(nr_bits, CHUNKSZ) - CHUNKSZ; i >=3D 0; i -=3D CHUN= KSZ ) { - unsigned int chunkmask =3D (1ull << chunksz) - 1; + unsigned int chunkmask =3D (1ULL << chunksz) - 1; unsigned int word =3D i / BITS_PER_LONG; unsigned int offset =3D i % BITS_PER_LONG; unsigned long val =3D (bitmap[word] >> offset) & chunkmask; --=20 2.34.1 From nobody Thu May 16 23:31:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1691058489539752.4400130248479; Thu, 3 Aug 2023 03:28:09 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.576227.902158 (Exim 4.92) (envelope-from ) id 1qRVYW-0002fi-2f; Thu, 03 Aug 2023 10:27:44 +0000 Received: by outflank-mailman (output) from mailman id 576227.902158; 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charset="utf-8" From: Gianluca Luparini The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline states: "The lowercase character 'l' shall not be used in a literal suffix". Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity. If the "u" suffix is used near "L", use the "U" suffix instead, for consist= ency. The changes in this patch are mechanical. Signed-off-by: Gianluca Luparini Signed-off-by: Simone Ballarin Reviewed-by: Stefano Stabellini --- xen/include/xen/bitops.h | 8 ++++---- xen/include/xen/tasklet.h | 4 ++-- xen/include/xen/time.h | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index e926047932..654f525fb4 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -186,12 +186,12 @@ static inline unsigned int generic_hweight64(uint64_t= w) if ( BITS_PER_LONG < 64 ) return generic_hweight32(w >> 32) + generic_hweight32(w); =20 - w -=3D (w >> 1) & 0x5555555555555555ul; - w =3D (w & 0x3333333333333333ul) + ((w >> 2) & 0x3333333333333333ul); - w =3D (w + (w >> 4)) & 0x0f0f0f0f0f0f0f0ful; + w -=3D (w >> 1) & 0x5555555555555555UL; + w =3D (w & 0x3333333333333333UL) + ((w >> 2) & 0x3333333333333333UL); + w =3D (w + (w >> 4)) & 0x0f0f0f0f0f0f0f0fUL; =20 if ( IS_ENABLED(CONFIG_HAS_FAST_MULTIPLY) ) - return (w * 0x0101010101010101ul) >> 56; + return (w * 0x0101010101010101UL) >> 56; =20 w +=3D w >> 8; w +=3D w >> 16; diff --git a/xen/include/xen/tasklet.h b/xen/include/xen/tasklet.h index ea73171f6e..193acf8f42 100644 --- a/xen/include/xen/tasklet.h +++ b/xen/include/xen/tasklet.h @@ -37,8 +37,8 @@ struct tasklet DECLARE_PER_CPU(unsigned long, tasklet_work_to_do); #define _TASKLET_enqueued 0 /* Tasklet work is enqueued for this CPU. */ #define _TASKLET_scheduled 1 /* Scheduler has scheduled do_tasklet(). */ -#define TASKLET_enqueued (1ul << _TASKLET_enqueued) -#define TASKLET_scheduled (1ul << _TASKLET_scheduled) +#define TASKLET_enqueued (1UL << _TASKLET_enqueued) +#define TASKLET_scheduled (1UL << _TASKLET_scheduled) =20 static inline bool tasklet_work_to_do(unsigned int cpu) { diff --git a/xen/include/xen/time.h b/xen/include/xen/time.h index 9ceaec541f..5aafdda4f3 100644 --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -57,9 +57,9 @@ struct tm wallclock_time(uint64_t *ns); #define SECONDS(_s) ((s_time_t)((_s) * 1000000000ULL)) #define MILLISECS(_ms) ((s_time_t)((_ms) * 1000000ULL)) #define MICROSECS(_us) ((s_time_t)((_us) * 1000ULL)) -#define STIME_MAX ((s_time_t)((uint64_t)~0ull>>1)) +#define STIME_MAX ((s_time_t)((uint64_t)~0ULL>>1)) /* Chosen so (NOW() + delta) wont overflow without an uptime of 200 years = */ -#define STIME_DELTA_MAX ((s_time_t)((uint64_t)~0ull>>2)) +#define STIME_DELTA_MAX ((s_time_t)((uint64_t)~0ULL>>2)) =20 /* Explicitly OR with 1 just in case version number gets out of sync. */ #define version_update_begin(v) (((v) + 1) | 1) --=20 2.34.1