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LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFTY:; SFS:(4636009)(396003)(39860400002)(376002)(346002)(136003)(46966005)(2906002)(6666004)(6916009)(8936002)(82310400002)(6486002)(16526019)(186003)(86362001)(81166007)(356005)(83380400001)(107886003)(26005)(4326008)(36756003)(8676002)(47076004)(6512007)(82740400003)(336012)(6506007)(956004)(2616005)(44832011)(478600001)(70586007)(70206006)(30864003)(316002)(36906005)(5660300002)(54906003)(2004002)(136400200001); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2020 15:40:40.0769 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f18fe8ae-df6b-481b-e097-08d82f1ec0b4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT053.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0802MB2256 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: rahul.singh@arm.com, Julien Grall , Bertrand.Marquis@arm.com, Stefano Stabellini , nd@arm.com, Volodymyr Babchuk Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: pass (identity @armh.onmicrosoft.com) XEN during boot will read the PCI device tree node =E2=80=9Creg=E2=80=9D pr= operty and will map the PCI config space to the XEN memory. XEN will read the =E2=80=9Clinux, pci-domain=E2=80=9D property from the dev= ice tree node and configure the host bridge segment number accordingly. As of now "pci-host-ecam-generic" compatible board is supported. Change-Id: If32f7748b7dc89dd37114dc502943222a2a36c49 Signed-off-by: Rahul Singh --- xen/arch/arm/Kconfig | 7 + xen/arch/arm/Makefile | 1 + xen/arch/arm/pci/Makefile | 4 + xen/arch/arm/pci/pci-access.c | 101 ++++++++++++++ xen/arch/arm/pci/pci-host-common.c | 198 ++++++++++++++++++++++++++++ xen/arch/arm/pci/pci-host-generic.c | 131 ++++++++++++++++++ xen/arch/arm/pci/pci.c | 112 ++++++++++++++++ xen/arch/arm/setup.c | 2 + xen/include/asm-arm/device.h | 7 +- xen/include/asm-arm/pci.h | 97 +++++++++++++- 10 files changed, 654 insertions(+), 6 deletions(-) create mode 100644 xen/arch/arm/pci/Makefile create mode 100644 xen/arch/arm/pci/pci-access.c create mode 100644 xen/arch/arm/pci/pci-host-common.c create mode 100644 xen/arch/arm/pci/pci-host-generic.c create mode 100644 xen/arch/arm/pci/pci.c diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 2777388265..ee13339ae9 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -31,6 +31,13 @@ menu "Architecture Features" =20 source "arch/Kconfig" =20 +config ARM_PCI + bool "PCI Passthrough Support" + depends on ARM_64 + ---help--- + + PCI passthrough support for Xen on ARM64. + config ACPI bool "ACPI (Advanced Configuration and Power Interface) Support" if EXPERT depends on ARM_64 diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 7e82b2178c..345cb83eed 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -6,6 +6,7 @@ ifneq ($(CONFIG_NO_PLAT),y) obj-y +=3D platforms/ endif obj-$(CONFIG_TEE) +=3D tee/ +obj-$(CONFIG_ARM_PCI) +=3D pci/ =20 obj-$(CONFIG_HAS_ALTERNATIVE) +=3D alternative.o obj-y +=3D bootfdt.init.o diff --git a/xen/arch/arm/pci/Makefile b/xen/arch/arm/pci/Makefile new file mode 100644 index 0000000000..358508b787 --- /dev/null +++ b/xen/arch/arm/pci/Makefile @@ -0,0 +1,4 @@ +obj-y +=3D pci.o +obj-y +=3D pci-host-generic.o +obj-y +=3D pci-host-common.o +obj-y +=3D pci-access.o diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c new file mode 100644 index 0000000000..c53ef58336 --- /dev/null +++ b/xen/arch/arm/pci/pci-access.c @@ -0,0 +1,101 @@ +/* + * Copyright (C) 2020 Arm Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include + +static uint32_t pci_config_read(pci_sbdf_t sbdf, unsigned int reg, + unsigned int len) +{ + int rc; + uint32_t val =3D GENMASK(0, len * 8); + + struct pci_host_bridge *bridge =3D pci_find_host_bridge(sbdf.seg, sbdf= .bus); + + if ( unlikely(!bridge) ) + { + printk(XENLOG_ERR "Unable to find bridge for "PRI_pci"\n", + sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn); + return val; + } + + if ( unlikely(!bridge->ops->read) ) + return val; + + rc =3D bridge->ops->read(bridge, (uint32_t) sbdf.sbdf, reg, len, &val); + if ( rc ) + printk(XENLOG_ERR "Failed to read reg %#x len %u for "PRI_pci"\n", + reg, len, sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn); + + return val; +} + +static void pci_config_write(pci_sbdf_t sbdf, unsigned int reg, + unsigned int len, uint32_t val) +{ + int rc; + struct pci_host_bridge *bridge =3D pci_find_host_bridge(sbdf.seg, sbdf= .bus); + + if ( unlikely(!bridge) ) + { + printk(XENLOG_ERR "Unable to find bridge for "PRI_pci"\n", + sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn); + return; + } + + if ( unlikely(!bridge->ops->write) ) + return; + + rc =3D bridge->ops->write(bridge, (uint32_t) sbdf.sbdf, reg, len, val); + if ( rc ) + printk(XENLOG_ERR "Failed to write reg %#x len %u for "PRI_pci"\n", + reg, len, sbdf.seg, sbdf.bus, sbdf.dev, sbdf.fn); +} + +/* + * Wrappers for all PCI configuration access functions. + */ + +#define PCI_OP_WRITE(size, type) \ + void pci_conf_write##size (pci_sbdf_t sbdf,unsigned int reg, type val)= \ +{ \ + pci_config_write(sbdf, reg, size / 8, val); \ +} + +#define PCI_OP_READ(size, type) \ + type pci_conf_read##size (pci_sbdf_t sbdf, unsigned int reg) \ +{ \ + return pci_config_read(sbdf, reg, size / 8); \ +} + +PCI_OP_READ(8, u8) +PCI_OP_READ(16, u16) +PCI_OP_READ(32, u32) +PCI_OP_WRITE(8, u8) +PCI_OP_WRITE(16, u16) +PCI_OP_WRITE(32, u32) + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host= -common.c new file mode 100644 index 0000000000..c5f98be698 --- /dev/null +++ b/xen/arch/arm/pci/pci-host-common.c @@ -0,0 +1,198 @@ +/* + * Copyright (C) 2020 Arm Ltd. + * + * Based on Linux drivers/pci/ecam.c + * Copyright 2016 Broadcom. + * + * Based on Linux drivers/pci/controller/pci-host-common.c + * Based on Linux drivers/pci/controller/pci-host-generic.c + * Copyright (C) 2014 ARM Limited Will Deacon + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include + +/* + * List for all the pci host bridges. + */ + +static LIST_HEAD(pci_host_bridges); + +static bool __init dt_pci_parse_bus_range(struct dt_device_node *dev, + struct pci_config_window *cfg) +{ + const __be32 *cells; + uint32_t len; + + cells =3D dt_get_property(dev, "bus-range", &len); + /* bus-range should at least be 2 cells */ + if ( !cells || (len < (sizeof(*cells) * 2)) ) + return false; + + cfg->busn_start =3D dt_next_cell(1, &cells); + cfg->busn_end =3D dt_next_cell(1, &cells); + + return true; +} + +static inline void __iomem *pci_remap_cfgspace(paddr_t start, size_t len) +{ + return ioremap_nocache(start, len); +} + +static void pci_ecam_free(struct pci_config_window *cfg) +{ + if ( cfg->win ) + iounmap(cfg->win); + + xfree(cfg); +} + +static struct pci_config_window *gen_pci_init(struct dt_device_node *dev, + struct pci_ecam_ops *ops) +{ + int err; + struct pci_config_window *cfg; + paddr_t addr, size; + + cfg =3D xzalloc(struct pci_config_window); + if ( !cfg ) + return NULL; + + err =3D dt_pci_parse_bus_range(dev, cfg); + if ( !err ) { + cfg->busn_start =3D 0; + cfg->busn_end =3D 0xff; + printk(XENLOG_ERR "No bus range found for pci controller\n"); + } else { + if ( cfg->busn_end > cfg->busn_start + 0xff ) + cfg->busn_end =3D cfg->busn_start + 0xff; + } + + /* Parse our PCI ecam register address*/ + err =3D dt_device_get_address(dev, 0, &addr, &size); + if ( err ) + goto err_exit; + + cfg->phys_addr =3D addr; + cfg->size =3D size; + cfg->ops =3D ops; + + /* + * On 64-bit systems, we do a single ioremap for the whole config space + * since we have enough virtual address range available. On 32-bit, we + * ioremap the config space for each bus individually. + * + * As of now only 64-bit is supported 32-bit is not supported. + */ + cfg->win =3D pci_remap_cfgspace(cfg->phys_addr, cfg->size); + if ( !cfg->win ) + goto err_exit_remap; + + printk("ECAM at [mem %lx-%lx] for [bus %x-%x] \n",cfg->phys_addr, + cfg->phys_addr + cfg->size - 1,cfg->busn_start,cfg->busn_end); + + if ( ops->init ) { + err =3D ops->init(cfg); + if (err) + goto err_exit; + } + + return cfg; + +err_exit_remap: + printk(XENLOG_ERR "ECAM ioremap failed\n"); +err_exit: + pci_ecam_free(cfg); + return NULL; +} + +static struct pci_host_bridge * pci_alloc_host_bridge(void) +{ + struct pci_host_bridge *bridge =3D xzalloc(struct pci_host_bridge); + + if ( !bridge ) + return NULL; + + INIT_LIST_HEAD(&bridge->node); + return bridge; +} + +int pci_host_common_probe(struct dt_device_node *dev, + struct pci_ecam_ops *ops) +{ + struct pci_host_bridge *bridge; + struct pci_config_window *cfg; + u32 segment; + + bridge =3D pci_alloc_host_bridge(); + if ( !bridge ) + return -ENOMEM; + + /* Parse and map our Configuration Space windows */ + cfg =3D gen_pci_init(dev, ops); + if ( !cfg ) + return -ENOMEM; + + bridge->dt_node =3D dev; + bridge->sysdata =3D cfg; + bridge->ops =3D &ops->pci_ops; + + if( !dt_property_read_u32(dev, "linux,pci-domain", &segment) ) + { + printk(XENLOG_ERR "\"linux,pci-domain\" property in not available = in DT\n"); + return -ENODEV; + } + + bridge->segment =3D (u16)segment; + + list_add_tail(&bridge->node, &pci_host_bridges); + + return 0; +} + +/* + * This function will lookup an hostbridge based on the segment and bus + * number. + */ +struct pci_host_bridge *pci_find_host_bridge(uint16_t segment, uint8_t bus) +{ + struct pci_host_bridge *bridge; + bool found =3D false; + + list_for_each_entry( bridge, &pci_host_bridges, node ) + { + if ( bridge->segment !=3D segment ) + continue; + + found =3D true; + break; + } + + return (found) ? bridge : NULL; +} +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-hos= t-generic.c new file mode 100644 index 0000000000..cd67b3dec6 --- /dev/null +++ b/xen/arch/arm/pci/pci-host-generic.c @@ -0,0 +1,131 @@ +/* + * Copyright (C) 2020 Arm Ltd. + * + * Based on Linux drivers/pci/controller/pci-host-common.c + * Based on Linux drivers/pci/controller/pci-host-generic.c + * Copyright (C) 2014 ARM Limited Will Deacon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include + +/* + * Function to get the config space base. + */ +static void __iomem *pci_config_base(struct pci_host_bridge *bridge, + uint32_t sbdf, int where) +{ + struct pci_config_window *cfg =3D bridge->sysdata; + unsigned int devfn_shift =3D cfg->ops->bus_shift - 8; + + pci_sbdf_t sbdf_t =3D (pci_sbdf_t) sbdf ; + + unsigned int busn =3D sbdf_t.bus; + void __iomem *base; + + if ( busn < cfg->busn_start || busn > cfg->busn_end ) + return NULL; + + base =3D cfg->win + (busn << cfg->ops->bus_shift); + + return base + (PCI_DEVFN(sbdf_t.dev, sbdf_t.fn) << devfn_shift) + wher= e; +} + +int pci_ecam_config_write(struct pci_host_bridge *bridge, uint32_t sbdf, + int where, int size, u32 val) +{ + void __iomem *addr; + + addr =3D pci_config_base(bridge, sbdf, where); + if ( !addr ) + return -ENODEV; + + if ( size =3D=3D 1 ) + writeb(val, addr); + else if ( size =3D=3D 2 ) + writew(val, addr); + else + writel(val, addr); + + return 0; +} + +int pci_ecam_config_read(struct pci_host_bridge *bridge, uint32_t sbdf, + int where, int size, u32 *val) +{ + void __iomem *addr; + + addr =3D pci_config_base(bridge, sbdf, where); + if ( !addr ) { + *val =3D ~0; + return -ENODEV; + } + + if ( size =3D=3D 1 ) + *val =3D readb(addr); + else if ( size =3D=3D 2 ) + *val =3D readw(addr); + else + *val =3D readl(addr); + + return 0; +} + +/* ECAM ops */ +struct pci_ecam_ops pci_generic_ecam_ops =3D { + .bus_shift =3D 20, + .pci_ops =3D { + .read =3D pci_ecam_config_read, + .write =3D pci_ecam_config_write, + } +}; + +static const struct dt_device_match gen_pci_dt_match[] =3D { + { .compatible =3D "pci-host-ecam-generic", + .data =3D &pci_generic_ecam_ops }, + + { }, +}; + +static int gen_pci_dt_init(struct dt_device_node *dev, const void *data) +{ + const struct dt_device_match *of_id; + struct pci_ecam_ops *ops; + + of_id =3D dt_match_node(gen_pci_dt_match, dev->dev.of_node); + ops =3D (struct pci_ecam_ops *) of_id->data; + + printk(XENLOG_INFO "Found PCI host bridge %s compatible:%s \n", + dt_node_full_name(dev), of_id->compatible); + + return pci_host_common_probe(dev, ops); +} + +DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI) +.dt_match =3D gen_pci_dt_match, +.init =3D gen_pci_dt_init, +DT_DEVICE_END + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/pci/pci.c b/xen/arch/arm/pci/pci.c new file mode 100644 index 0000000000..f8cbb99591 --- /dev/null +++ b/xen/arch/arm/pci/pci.c @@ -0,0 +1,112 @@ +/* + * Copyright (C) 2020 Arm Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include + +static int __init dt_pci_init(void) +{ + struct dt_device_node *np; + int rc; + + dt_for_each_device_node(dt_host, np) + { + rc =3D device_init(np, DEVICE_PCI, NULL); + if( !rc ) + continue; + /* + * Ignore the following error codes: + * - EBADF: Indicate the current is not an pci + * - ENODEV: The pci device is not present or cannot be used by + * Xen. + */ + else if ( rc !=3D -EBADF && rc !=3D -ENODEV ) + { + printk(XENLOG_ERR "No driver found in XEN or driver init error= .\n"); + return rc; + } + } + + return 0; +} + +#ifdef CONFIG_ACPI +static void __init acpi_pci_init(void) +{ + printk(XENLOG_ERR "ACPI pci init not supported \n"); + return; +} +#else +static inline void __init acpi_pci_init(void) { } +#endif + +static bool __initdata param_pci_enable; +static int __init parse_pci_param(const char *arg) +{ + if ( !arg ) + { + param_pci_enable =3D false; + return 0; + } + + switch ( parse_bool(arg, NULL) ) + { + case 0: + param_pci_enable =3D false; + return 0; + case 1: + param_pci_enable =3D true; + return 0; + } + + return -EINVAL; +} +custom_param("pci", parse_pci_param); + +void __init pci_init(void) +{ + /* + * Enable PCI when has been enabled explicitly (pci=3Don) + */ + if ( !param_pci_enable) + goto disable; + + if ( acpi_disabled ) + dt_pci_init(); + else + acpi_pci_init(); + +#ifdef CONFIG_HAS_PCI + pci_segments_init(); +#endif + +disable: + return; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 7968cee47d..2d7f1db44f 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -930,6 +930,8 @@ void __init start_xen(unsigned long boot_phys_offset, =20 setup_virt_paging(); =20 + pci_init(); + do_initcalls(); =20 /* diff --git a/xen/include/asm-arm/device.h b/xen/include/asm-arm/device.h index ee7cff2d44..28f8049cfd 100644 --- a/xen/include/asm-arm/device.h +++ b/xen/include/asm-arm/device.h @@ -4,6 +4,7 @@ enum device_type { DEV_DT, + DEV_PCI, }; =20 struct dev_archdata { @@ -25,15 +26,15 @@ typedef struct device device_t; =20 #include =20 -/* TODO: Correctly implement dev_is_pci when PCI is supported on ARM */ -#define dev_is_pci(dev) ((void)(dev), 0) -#define dev_is_dt(dev) ((dev->type =3D=3D DEV_DT) +#define dev_is_pci(dev) (dev->type =3D=3D DEV_PCI) +#define dev_is_dt(dev) (dev->type =3D=3D DEV_DT) =20 enum device_class { DEVICE_SERIAL, DEVICE_IOMMU, DEVICE_GIC, + DEVICE_PCI, /* Use for error */ DEVICE_UNKNOWN, }; diff --git a/xen/include/asm-arm/pci.h b/xen/include/asm-arm/pci.h index de13359f65..94fd00360a 100644 --- a/xen/include/asm-arm/pci.h +++ b/xen/include/asm-arm/pci.h @@ -1,7 +1,98 @@ -#ifndef __X86_PCI_H__ -#define __X86_PCI_H__ +/* + * Copyright (C) 2020 Arm Ltd. + * + * Based on Linux drivers/pci/ecam.c + * Copyright 2016 Broadcom. + * + * Based on Linux drivers/pci/controller/pci-host-common.c + * Based on Linux drivers/pci/controller/pci-host-generic.c + * Copyright (C) 2014 ARM Limited Will Deacon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ =20 +#ifndef __ARM_PCI_H__ +#define __ARM_PCI_H__ + +#include +#include +#include + +#ifdef CONFIG_ARM_PCI + +/* Arch pci dev struct */ struct arch_pci_dev { + struct device dev; +}; + +#define PRI_pci "%04x:%02x:%02x.%u" +#define pci_to_dev(pcidev) (&(pcidev)->arch.dev) + +/* + * struct to hold the mappings of a config space window. This + * is expected to be used as sysdata for PCI controllers that + * use ECAM. + */ +struct pci_config_window { + paddr_t phys_addr; + paddr_t size; + uint8_t busn_start; + uint8_t busn_end; + struct pci_ecam_ops *ops; + void __iomem *win; +}; + +/* Forward declaration as pci_host_bridge and pci_ops depend on each other= . */ +struct pci_host_bridge; + +struct pci_ops { + int (*read)(struct pci_host_bridge *bridge, + uint32_t sbdf, int where, int size, u32 *val); + int (*write)(struct pci_host_bridge *bridge, + uint32_t sbdf, int where, int size, u32 val); +}; + +/* + * struct to hold pci ops and bus shift of the config window + * for a PCI controller. + */ +struct pci_ecam_ops { + unsigned int bus_shift; + struct pci_ops pci_ops; + int (*init)(struct pci_config_window *); +}; + +/* + * struct to hold pci host bridge information + * for a PCI controller. + */ +struct pci_host_bridge { + struct dt_device_node *dt_node; /* Pointer to the associated DT node = */ + struct list_head node; /* Node in list of host bridges */ + uint16_t segment; /* Segment number */ + void *sysdata; /* Pointer to the config space window= */ + const struct pci_ops *ops; }; =20 -#endif /* __X86_PCI_H__ */ +struct pci_host_bridge *pci_find_host_bridge(uint16_t segment, uint8_t bus= ); + +int pci_host_common_probe(struct dt_device_node *dev, + struct pci_ecam_ops *ops); + +void pci_init(void); + +#else /*!CONFIG_ARM_PCI*/ +struct arch_pci_dev { }; +static inline void pci_init(void) { } +#endif /*!CONFIG_ARM_PCI*/ +#endif /* __ARM_PCI_H__ */ --=20 2.17.1 From nobody Fri Apr 26 20:21:48 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1dmarc=pass fromdomain=arm.com) ARC-Seal: i=2; a=rsa-sha256; t=1595518874; cv=pass; d=zohomail.com; s=zohoarc; b=MNWKBTfiPis+rrdwCZnAh0UK5ZlMw7ljL7cTAxASjB4Rs+eYSloBVB/IQd2rY5x3NbHgiKjfMLd0Ucs8CbL6P8HR+aBKCN9MpECkfbBXX/Eg+M2hnKyC5ySWDB0oFfQn93pWZyYoh4JRSdEgzZ7unZhsTREqJ2JfviwM3G64OUk= ARC-Message-Signature: i=2; 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charset="utf-8" Hardware domain is in charge of doing the PCI enumeration and will discover the PCI devices and then will communicate to XEN via hyper call PHYSDEVOP_pci_device_add to add the PCI devices in XEN. Change-Id: Ie87e19741689503b4b62da911c8dc2ee318584ac Signed-off-by: Rahul Singh --- xen/arch/arm/physdev.c | 42 +++++++++++++++++++++++++++++++++++++++--- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/physdev.c b/xen/arch/arm/physdev.c index e91355fe22..274720f98a 100644 --- a/xen/arch/arm/physdev.c +++ b/xen/arch/arm/physdev.c @@ -9,12 +9,48 @@ #include #include #include - +#include +#include =20 int do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) { - gdprintk(XENLOG_DEBUG, "PHYSDEVOP cmd=3D%d: not implemented\n", cmd); - return -ENOSYS; + int ret =3D 0; + + switch ( cmd ) + { +#ifdef CONFIG_HAS_PCI + case PHYSDEVOP_pci_device_add: + { + struct physdev_pci_device_add add; + struct pci_dev_info pdev_info; + nodeid_t node =3D NUMA_NO_NODE; + + ret =3D -EFAULT; + if ( copy_from_guest(&add, arg, 1) !=3D 0 ) + break; + + pdev_info.is_extfn =3D !!(add.flags & XEN_PCI_DEV_EXTFN); + if ( add.flags & XEN_PCI_DEV_VIRTFN ) + { + pdev_info.is_virtfn =3D 1; + pdev_info.physfn.bus =3D add.physfn.bus; + pdev_info.physfn.devfn =3D add.physfn.devfn; + } + else + pdev_info.is_virtfn =3D 0; + + ret =3D pci_add_device(add.seg, add.bus, add.devfn, + &pdev_info, node); + + break; + } +#endif + default: + gdprintk(XENLOG_DEBUG, "PHYSDEVOP cmd=3D%d: not implemented\n"= , cmd); + ret =3D -ENOSYS; + } + + return ret; } =20 /* --=20 2.17.1 From nobody Fri Apr 26 20:21:48 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1dmarc=pass fromdomain=arm.com) ARC-Seal: i=2; a=rsa-sha256; t=1595518871; cv=pass; d=zohomail.com; s=zohoarc; b=ksGWjjupahrFw3PYs7HD+uzFzxt4MssLhbzCFTNaZjl6BcIJJ/BvlHN8u62rZEqJTZuUrdIHtNdv+zXm8bRxYMpAbhIgNHpyL0dcVDicLAakTMPYhRrlAXF2IqvAGXxwrxBRcoNDpU+zKAXLgM/WeDPsA1C1tdw9H8xQXB+GVys= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; 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dkim=none (message not signed) header.d=none; lists.xenproject.org; dmarc=none action=none header.from=arm.com; From: Rahul Singh To: xen-devel@lists.xenproject.org Subject: [RFC PATCH v1 3/4] xen/arm: Enable the existing x86 virtual PCI support for ARM. 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CAT:NONE; SFTY:; SFS:(4636009)(396003)(376002)(346002)(39860400002)(136003)(46966005)(44832011)(70206006)(70586007)(478600001)(4326008)(956004)(336012)(5660300002)(36906005)(2616005)(54906003)(316002)(36756003)(86362001)(8936002)(81166007)(6666004)(6512007)(82310400002)(2906002)(6916009)(6486002)(16526019)(47076004)(82740400003)(186003)(356005)(8676002)(6506007)(83380400001)(26005)(136400200001)(2004002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jul 2020 15:40:40.4504 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d689e4e6-629c-4367-b69c-08d82f1ec0ed X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT059.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB3720 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: rahul.singh@arm.com, Julien Grall , Paul Durrant , Bertrand.Marquis@arm.com, Stefano Stabellini , Jan Beulich , nd@arm.com, Volodymyr Babchuk Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-ZohoMail-DKIM: pass (identity @armh.onmicrosoft.com) The existing VPCI support available for X86 is adapted for Arm. When the device is added to XEN via the hyper call =E2=80=9CPHYSDEVOP_pci_device_add=E2=80=9D, VPCI handler for the config spa= ce access is added to the PCI device to emulate the PCI devices. A MMIO trap handler for the PCI ECAM space is registered in XEN so that when guest is trying to access the PCI config space,XEN will trap the access and emulate read/write using the VPCI and not the real PCI hardware. VPCI MSI support is disable for ARM as it is not tested on ARM. Change-Id: I5501db2781f8064640403fecce53713091cd9ab4 Signed-off-by: Rahul Singh --- xen/arch/arm/Makefile | 1 + xen/arch/arm/domain.c | 4 ++ xen/arch/arm/vpci.c | 102 ++++++++++++++++++++++++++++++++++ xen/arch/arm/vpci.h | 37 ++++++++++++ xen/drivers/passthrough/pci.c | 7 +++ xen/include/asm-arm/domain.h | 5 ++ xen/include/public/arch-arm.h | 4 ++ 7 files changed, 160 insertions(+) create mode 100644 xen/arch/arm/vpci.c create mode 100644 xen/arch/arm/vpci.h diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 345cb83eed..5a23ec5cc0 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -7,6 +7,7 @@ obj-y +=3D platforms/ endif obj-$(CONFIG_TEE) +=3D tee/ obj-$(CONFIG_ARM_PCI) +=3D pci/ +obj-$(CONFIG_HAS_VPCI) +=3D vpci.o =20 obj-$(CONFIG_HAS_ALTERNATIVE) +=3D alternative.o obj-y +=3D bootfdt.init.o diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 31169326b2..23098ffd02 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -39,6 +39,7 @@ #include =20 #include "vuart.h" +#include "vpci.h" =20 DEFINE_PER_CPU(struct vcpu *, curr_vcpu); =20 @@ -747,6 +748,9 @@ int arch_domain_create(struct domain *d, if ( is_hardware_domain(d) && (rc =3D domain_vuart_init(d)) ) goto fail; =20 + if ( (rc =3D domain_vpci_init(d)) !=3D 0 ) + goto fail; + return 0; =20 fail: diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c new file mode 100644 index 0000000000..49e473ab0d --- /dev/null +++ b/xen/arch/arm/vpci.c @@ -0,0 +1,102 @@ +/* + * xen/arch/arm/vpci.c + * Copyright (c) 2020 Arm Ltd. + * + * Based on arch/x86/hvm/io.c + * Copyright (c) 2004, Intel Corporation. + * Copyright (c) 2005, International Business Machines Corporation. + * Copyright (c) 2008, Citrix Systems, Inc. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include + +/* Do some sanity checks. */ +static bool vpci_mmio_access_allowed(unsigned int reg, unsigned int len) +{ + /* Check access size. */ + if ( len !=3D 1 && len !=3D 2 && len !=3D 4 && len !=3D 8 ) + return false; + + /* Check that access is size aligned. */ + if ( (reg & (len - 1)) ) + return false; + + return true; +} + +static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, + register_t *r, void *priv) +{ + unsigned int reg; + pci_sbdf_t sbdf; + uint32_t data =3D 0; + unsigned int size =3D 1U << info->dabt.size; + + sbdf.bdf =3D (((info->gpa) & 0x0ffff000) >> 12); + reg =3D (((info->gpa) & 0x00000ffc) | (info->gpa & 3)); + + if ( !vpci_mmio_access_allowed(reg, size) ) + return 1; + + data =3D vpci_read(sbdf, reg, size); + + memcpy(r, &data, size); + + return 1; +} + +static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info, + register_t r, void *priv) +{ + unsigned int reg; + pci_sbdf_t sbdf; + uint32_t data =3D r; + unsigned int size =3D 1U << info->dabt.size; + + sbdf.bdf =3D (((info->gpa) & 0x0ffff000) >> 12); + reg =3D (((info->gpa) & 0x00000ffc) | (info->gpa & 3)); + + if ( !vpci_mmio_access_allowed(reg, size) ) + return 1; + + vpci_write(sbdf, reg, size, data); + + return 1; +} + +static const struct mmio_handler_ops vpci_mmio_handler =3D { + .read =3D vpci_mmio_read, + .write =3D vpci_mmio_write, +}; + +int domain_vpci_init(struct domain *d) +{ + if ( !has_vpci(d) || is_hardware_domain(d) ) + return 0; + + register_mmio_handler(d, &vpci_mmio_handler, + GUEST_VPCI_ECAM_BASE,GUEST_VPCI_ECAM_SIZE,NULL); + + return 0; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ + diff --git a/xen/arch/arm/vpci.h b/xen/arch/arm/vpci.h new file mode 100644 index 0000000000..20dce1f4c4 --- /dev/null +++ b/xen/arch/arm/vpci.h @@ -0,0 +1,37 @@ +/* + * xen/arch/arm/vpci.h + * Copyright (c) 2020 Arm Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_ARM_VPCI_H__ +#define __ARCH_ARM_VPCI_H__ + +#ifdef CONFIG_HAS_VPCI +int domain_vpci_init(struct domain *d); +#else +static inline int domain_vpci_init(struct domain *d) +{ + return 0; +} +#endif + +#endif /* __ARCH_ARM_VPCI_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 5846978890..28511eb641 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -804,6 +804,13 @@ int pci_add_device(u16 seg, u8 bus, u8 devfn, else iommu_enable_device(pdev); =20 +#ifdef CONFIG_ARM + ret =3D vpci_add_handlers(pdev); + if ( ret ) { + printk(XENLOG_ERR "setup of vPCI for failed: %d\n",ret); + goto out; + } +#endif pci_enable_acs(pdev); =20 out: diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h index 4e2f582006..ad70610226 100644 --- a/xen/include/asm-arm/domain.h +++ b/xen/include/asm-arm/domain.h @@ -34,6 +34,11 @@ enum domain_type { /* The hardware domain has always its memory direct mapped. */ #define is_domain_direct_mapped(d) ((d) =3D=3D hardware_domain) =20 +/* For X86 VPCI is enabled and tested for PVH DOM0 only but + * for ARM we enable support VPCI for guest domain also. + */ +#define has_vpci(d) (true) + struct vtimer { struct vcpu *v; int irq; diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index c365b1b39e..7364a07362 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -422,6 +422,10 @@ typedef uint64_t xen_callback_t; #define GUEST_PL011_BASE xen_mk_ullong(0x22000000) #define GUEST_PL011_SIZE xen_mk_ullong(0x00001000) =20 +/* VPCI ECAM mappings */ +#define GUEST_VPCI_ECAM_BASE xen_mk_ullong(0x10000000) +#define GUEST_VPCI_ECAM_SIZE xen_mk_ullong(0x10000000) + /* * 16MB =3D=3D 4096 pages reserved for guest to use as a region to map its * grant table in. --=20 2.17.1 From nobody Fri Apr 26 20:21:48 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1dmarc=pass fromdomain=arm.com) ARC-Seal: i=2; a=rsa-sha256; t=1595518872; cv=pass; d=zohomail.com; s=zohoarc; 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charset="utf-8" libxl will create an emulated PCI device tree node in the device tree to enable the guest OS to discover the virtual PCI during guest boot. We introduced the new config option [vpci=3D"ecam"] for guests. When this config option is enabled in a guest configuration, a PCI device tree node will be created in the guest device tree. A new area has been reserved in the arm guest physical map at which the VPCI bus is declared in the device tree (reg and ranges parameters of the node). Change-Id: I47d39cbe8184de2226f174644df9790ecc610ccd Signed-off-by: Rahul Singh --- tools/libxl/libxl_arm.c | 200 ++++++++++++++++++++++++++++++++++ tools/libxl/libxl_types.idl | 6 + tools/xl/xl_parse.c | 7 ++ xen/include/public/arch-arm.h | 28 +++++ 4 files changed, 241 insertions(+) diff --git a/tools/libxl/libxl_arm.c b/tools/libxl/libxl_arm.c index 34f8a29056..84568e9dc9 100644 --- a/tools/libxl/libxl_arm.c +++ b/tools/libxl/libxl_arm.c @@ -268,6 +268,130 @@ static int fdt_property_regs(libxl__gc *gc, void *fdt, return fdt_property(fdt, "reg", regs, sizeof(regs)); } =20 +static int fdt_property_vpci_bus_range(libxl__gc *gc, void *fdt, + unsigned num_cells, ...) +{ + uint32_t bus_range[num_cells]; + be32 *cells =3D &bus_range[0]; + int i; + va_list ap; + uint32_t arg; + + va_start(ap, num_cells); + for (i =3D 0 ; i < num_cells; i++) { + arg =3D va_arg(ap, uint32_t); + set_cell(&cells, 1, arg); + } + va_end(ap); + + return fdt_property(fdt, "bus-range", bus_range, sizeof(bus_range)); +} + +static int fdt_property_vpci_interrupt_map_mask(libxl__gc *gc, void *fdt, + unsigned num_cells, ...) +{ + uint32_t interrupt_map_mask[num_cells]; + be32 *cells =3D &interrupt_map_mask[0]; + int i; + va_list ap; + uint32_t arg; + + va_start(ap, num_cells); + for (i =3D 0 ; i < num_cells; i++) { + arg =3D va_arg(ap, uint32_t); + set_cell(&cells, 1, arg); + } + va_end(ap); + + return fdt_property(fdt, "interrupt-map-mask", interrupt_map_mask, + sizeof(interrupt_map_mask)); +} + +static int fdt_property_vpci_ranges(libxl__gc *gc, void *fdt, + unsigned vpci_addr_cells, + unsigned cpu_addr_cells, + unsigned vpci_size_cells, + unsigned num_regs, ...) +{ + uint32_t regs[num_regs*(vpci_addr_cells+cpu_addr_cells+vpci_size_cells= )]; + be32 *cells =3D ®s[0]; + int i; + va_list ap; + uint64_t arg; + + va_start(ap, num_regs); + for (i =3D 0 ; i < num_regs; i++) { + /* Set the memory bit field */ + arg =3D va_arg(ap, uint64_t); + set_cell(&cells, 1, arg); + + /* Set the vpci bus address */ + arg =3D vpci_addr_cells ? va_arg(ap, uint64_t) : 0; + set_cell(&cells, 2 , arg); + + /* Set the cpu bus address where vpci address is mapped */ + arg =3D cpu_addr_cells ? va_arg(ap, uint64_t) : 0; + set_cell(&cells, cpu_addr_cells, arg); + + /* Set the vpci size requested */ + arg =3D vpci_size_cells ? va_arg(ap, uint64_t) : 0; + set_cell(&cells, vpci_size_cells,arg); + } + va_end(ap); + + return fdt_property(fdt, "ranges", regs, sizeof(regs)); +} + +static int fdt_property_vpci_interrupt_map(libxl__gc *gc, void *fdt, + unsigned child_unit_addr_cells, + unsigned child_interrupt_specifier_cells, + unsigned parent_unit_addr_cells, + unsigned parent_interrupt_specifier_cells, + unsigned num_regs, ...) +{ + uint32_t interrupt_map[num_regs * (child_unit_addr_cells + + child_interrupt_specifier_cells + parent_unit_addr_cells + + parent_interrupt_specifier_cells + 1)]; + be32 *cells =3D &interrupt_map[0]; + int i,j; + va_list ap; + uint64_t arg; + + va_start(ap, num_regs); + for (i =3D 0 ; i < num_regs; i++) { + /* Set the child unit address*/ + for (j =3D 0 ; j < child_unit_addr_cells; j++) { + arg =3D va_arg(ap, uint32_t); + set_cell(&cells, 1 , arg); + } + + /* Set the child interrupt specifier*/ + for (j =3D 0 ; j < child_interrupt_specifier_cells ; j++) { + arg =3D va_arg(ap, uint32_t); + set_cell(&cells, 1 , arg); + } + + /* Set the interrupt-parent*/ + set_cell(&cells, 1 , GUEST_PHANDLE_GIC); + + /* Set the parent unit address*/ + for (j =3D 0 ; j < parent_unit_addr_cells; j++) { + arg =3D va_arg(ap, uint32_t); + set_cell(&cells, 1 , arg); + } + + /* Set the parent interrupt specifier*/ + for (j =3D 0 ; j < parent_interrupt_specifier_cells; j++) { + arg =3D va_arg(ap, uint32_t); + set_cell(&cells, 1 , arg); + } + } + va_end(ap); + + return fdt_property(fdt, "interrupt-map", interrupt_map, + sizeof(interrupt_map)); +} + static int make_root_properties(libxl__gc *gc, const libxl_version_info *vers, void *fdt) @@ -659,6 +783,79 @@ static int make_vpl011_uart_node(libxl__gc *gc, void *= fdt, return 0; } =20 +static int make_vpci_node(libxl__gc *gc, void *fdt, + const struct arch_info *ainfo, + struct xc_dom_image *dom) +{ + int res; + const uint64_t vpci_ecam_base =3D GUEST_VPCI_ECAM_BASE; + const uint64_t vpci_ecam_size =3D GUEST_VPCI_ECAM_SIZE; + const char *name =3D GCSPRINTF("pcie@%"PRIx64, vpci_ecam_base); + + res =3D fdt_begin_node(fdt, name); + if (res) return res; + + res =3D fdt_property_compat(gc, fdt, 1, "pci-host-ecam-generic"); + if (res) return res; + + res =3D fdt_property_string(fdt, "device_type", "pci"); + if (res) return res; + + res =3D fdt_property_regs(gc, fdt, GUEST_ROOT_ADDRESS_CELLS, + GUEST_ROOT_SIZE_CELLS, 1, vpci_ecam_base, vpci_ecam_size); + if (res) return res; + + res =3D fdt_property_vpci_bus_range(gc, fdt, 2, 0,255); + if (res) return res; + + res =3D fdt_property_cell(fdt, "linux,pci-domain", 0); + if (res) return res; + + res =3D fdt_property_cell(fdt, "#address-cells", 3); + if (res) return res; + + res =3D fdt_property_cell(fdt, "#size-cells", 2); + if (res) return res; + + res =3D fdt_property_cell(fdt, "#interrupt-cells", 1); + if (res) return res; + + res =3D fdt_property_string(fdt, "status", "okay"); + if (res) return res; + + res =3D fdt_property_vpci_ranges(gc, fdt, GUEST_PCI_ADDRESS_CELLS, + GUEST_ROOT_ADDRESS_CELLS, GUEST_PCI_SIZE_CELLS, + 3, + GUEST_VPCI_ADDR_TYPE_MEM, GUEST_VPCI_MEM_PCI_ADDR, + GUEST_VPCI_MEM_CPU_ADDR, GUEST_VPCI_MEM_SIZE, + GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM, GUEST_VPCI_PREFETCH_MEM_PCI_ADD= R, + GUEST_VPCI_PREFETCH_MEM_CPU_ADDR, GUEST_VPCI_PREFETCH_MEM_SIZE, + GUEST_VPCI_ADDR_TYPE_IO, GUEST_VPCI_IO_PCI_ADDR, + GUEST_VPCI_IO_CPU_ADDR, GUEST_VPCI_IO_SIZE); + if (res) return res; + + res =3D fdt_property_vpci_interrupt_map_mask(gc, fdt, 4, 0, 0, 0, 7); + if (res) return res; + + /* + * Legacy interrupt is forced and assigned to the guest. + * This will be removed once we have implementation for MSI support. + * + */ + res =3D fdt_property_vpci_interrupt_map(gc, fdt, 3, 1, 0, 3, + 4, + 0, 0, 0, 1, 0, 136, DT_IRQ_TYPE_LEVEL_HIGH, + 0, 0, 0, 2, 0, 137, DT_IRQ_TYPE_LEVEL_HIGH, + 0, 0, 0, 3, 0, 138, DT_IRQ_TYPE_LEVEL_HIGH, + 0, 0, 0, 4, 0, 139, DT_IRQ_TYPE_LEVEL_HIGH); + if (res) return res; + + res =3D fdt_end_node(fdt); + if (res) return res; + + return 0; +} + static const struct arch_info *get_arch_info(libxl__gc *gc, const struct xc_dom_image *do= m) { @@ -962,6 +1159,9 @@ next_resize: if (info->tee =3D=3D LIBXL_TEE_TYPE_OPTEE) FDT( make_optee_node(gc, fdt) ); =20 + if (info->arch_arm.vpci =3D=3D LIBXL_VPCI_TYPE_ECAM) + FDT( make_vpci_node(gc, fdt, ainfo, dom) ); + if (pfdt) FDT( copy_partial_fdt(gc, fdt, pfdt) ); =20 diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl index 9d3f05f399..d493637705 100644 --- a/tools/libxl/libxl_types.idl +++ b/tools/libxl/libxl_types.idl @@ -257,6 +257,11 @@ libxl_vuart_type =3D Enumeration("vuart_type", [ (1, "sbsa_uart"), ]) =20 +libxl_vpci_type =3D Enumeration("vpci_type", [ + (0, "unknown"), + (1, "ecam"), + ]) + libxl_vkb_backend =3D Enumeration("vkb_backend", [ (0, "UNKNOWN"), (1, "QEMU"), @@ -640,6 +645,7 @@ libxl_domain_build_info =3D Struct("domain_build_info",[ =20 ("arch_arm", Struct(None, [("gic_version", libxl_gic_version), ("vuart", libxl_vuart_type), + ("vpci", libxl_vpci_type), ])), # Alternate p2m is not bound to any architecture or guest type, as it = is # supported by x86 HVM and ARM support is planned. diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 61b4ef7b7e..58b7e6f56a 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -1386,6 +1386,13 @@ void parse_config_data(const char *config_source, } } =20 + if (!xlu_cfg_get_string(config, "vpci", &buf, 0)) { + if (libxl_vpci_type_from_string(buf, &b_info->arch_arm.vpci)) { + fprintf(stderr, "ERROR: invalid value \"%s\" for \"vpci\"\n", + buf); + exit(1); + } + } parse_vnuma_config(config, b_info); =20 /* Set max_memkb to target_memkb and max_vcpus to avail_vcpus if diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index 7364a07362..4e19c62948 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -426,6 +426,34 @@ typedef uint64_t xen_callback_t; #define GUEST_VPCI_ECAM_BASE xen_mk_ullong(0x10000000) #define GUEST_VPCI_ECAM_SIZE xen_mk_ullong(0x10000000) =20 +#define GUEST_PCI_ADDRESS_CELLS 3 +#define GUEST_PCI_SIZE_CELLS 2 + +/* PCI-PCIe memory space types */ +#define GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM xen_mk_ullong(0x42000000) +#define GUEST_VPCI_ADDR_TYPE_MEM xen_mk_ullong(0x02000000) +#define GUEST_VPCI_ADDR_TYPE_IO xen_mk_ullong(0x01000000) + +/* Guest PCI-PCIe memory space where config space and BAR will be availabl= e.*/ +#define GUEST_VPCI_PREFETCH_MEM_CPU_ADDR xen_mk_ullong(0x4000000000) +#define GUEST_VPCI_MEM_CPU_ADDR xen_mk_ullong(0x04020000) +#define GUEST_VPCI_IO_CPU_ADDR xen_mk_ullong(0xC0200800) + +/* + * This is hardcoded values for the real PCI physical addresses. + * This will be removed once we read the real PCI-PCIe physical + * addresses form the config space and map to the guest memory map + * when assigning the device to guest via VPCI. + * + */ +#define GUEST_VPCI_PREFETCH_MEM_PCI_ADDR xen_mk_ullong(0x4000000000) +#define GUEST_VPCI_MEM_PCI_ADDR xen_mk_ullong(0x50000000) +#define GUEST_VPCI_IO_PCI_ADDR xen_mk_ullong(0x00000000) + +#define GUEST_VPCI_PREFETCH_MEM_SIZE xen_mk_ullong(0x100000000) +#define GUEST_VPCI_MEM_SIZE xen_mk_ullong(0x08000000) +#define GUEST_VPCI_IO_SIZE xen_mk_ullong(0x00800000) + /* * 16MB =3D=3D 4096 pages reserved for guest to use as a region to map its * grant table in. --=20 2.17.1