From nobody Fri Nov 29 18:39:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=suse.com); dmarc=pass(p=quarantine dis=none) header.from=suse.com ARC-Seal: i=2; a=rsa-sha256; t=1632477158; cv=pass; d=zohomail.com; s=zohoarc; b=f1gLAKcOTyVbexAAtPY4WQhY55cjWrZ7IW41JbkMgFMEnNNh5d2HqQe86lET3UMXPMC/AgIKk06IOwLd1ib94NNYvVFBc0J5Z4cG6iuBZpM30Ivj1kSzBbmpjSQzy1q5aEflsgIJrbmSoBAn0bMEJbbHExfiOgdWh77zJXBgxdY= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1632477158; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=oST90GrSEuah3sHHpzoExF0h0tTGYRPH7JQTtrWQFzA=; b=nPoDbBmXeb5tDLFQxqILjYsFCmlUD5FgTeB0dDVm/7abH5YTnTNiyFcZVHPNs0fwJpPjtm6SSxRlRsCv5jEKB/KqNq20ndrZpKnpgU0GpBo9pGNVeRKw2cFxTT4lxmACbsh2hoV+PvvPvoHPPDmf3cLnCV2I3Yx8F1mKpk44z+g= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=suse.com); dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 16324771588211000.281618604827; Fri, 24 Sep 2021 02:52:38 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.195144.347697 (Exim 4.92) (envelope-from ) id 1mThsU-00049T-4G; Fri, 24 Sep 2021 09:52:22 +0000 Received: by outflank-mailman (output) from mailman id 195144.347697; Fri, 24 Sep 2021 09:52:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1mThsU-00049M-1A; Fri, 24 Sep 2021 09:52:22 +0000 Received: by outflank-mailman (input) for mailman id 195144; Fri, 24 Sep 2021 09:52:21 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1mThsT-00049B-1v for xen-devel@lists.xenproject.org; Fri, 24 Sep 2021 09:52:21 +0000 Received: from de-smtp-delivery-102.mimecast.com (unknown [194.104.109.102]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 1b5fe4a0-1d1d-11ec-bab9-12813bfff9fa; Fri, 24 Sep 2021 09:52:20 +0000 (UTC) Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04lp2055.outbound.protection.outlook.com [104.47.12.55]) (Using TLS) by relay.mimecast.com with ESMTP id de-mta-11-rp95dWVnOrSOvTMBGECgbQ-1; Fri, 24 Sep 2021 11:52:17 +0200 Received: from VI1PR04MB5600.eurprd04.prod.outlook.com (2603:10a6:803:e7::16) by VI1PR0401MB2446.eurprd04.prod.outlook.com (2603:10a6:800:4e::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4523.17; Fri, 24 Sep 2021 09:52:15 +0000 Received: from VI1PR04MB5600.eurprd04.prod.outlook.com ([fe80::4d37:ec64:4e90:b16b]) by VI1PR04MB5600.eurprd04.prod.outlook.com ([fe80::4d37:ec64:4e90:b16b%7]) with mapi id 15.20.4544.018; Fri, 24 Sep 2021 09:52:15 +0000 Received: from [10.156.60.236] (37.24.206.209) by FR3P281CA0023.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:1c::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4566.8 via Frontend Transport; Fri, 24 Sep 2021 09:52:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1b5fe4a0-1d1d-11ec-bab9-12813bfff9fa DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=mimecast20200619; t=1632477139; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oST90GrSEuah3sHHpzoExF0h0tTGYRPH7JQTtrWQFzA=; b=lKMsaJc6tSnA6HMssLBmjxejkKnBAEYEzzHz6YsVTNFz3SadxtYL17JJaxzx3s43mcrNBq qFrwaba/yzdP1WSgeoAi9TaaJ7+z+k5vaxV1KiRjwel+tqY07irs1/O1BncMyDsRLiOA4Y IZ/AbQc/ZJ6zwYv1UcwT+3bqjZTtY88= X-MC-Unique: rp95dWVnOrSOvTMBGECgbQ-1 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=X4GPuwzlsFl9x7jmEt9rZ3agxzqa+iKMQmOKPWhD6ygP7v4h8mqBw+QRMLAi7hkmlPCBpA1XFoSXhteuTWkBApCUBEKsSxJFYuREcvh6Wvx91XhGqeHzDZMMI3Fph+3ASCrgonTJM9fYqgUh6w0lhF2XSb0yWo1sbnocq+LR27k2FlP/RjGgKE1darIHzL7ON+MK4XZGpTAagmSbE7Dlj2HNu5xki4TaygFDcwlBNDB7oxKhBlaChiySJPcZj6fbqdRy0Dd3A8SEFyX39oxs9Wmn4pYiDnNGQ2UpbK1E/E74fDBsTDZBt2qCclKIIh4D077CFEI0Zif4ehAhqVOx2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=oST90GrSEuah3sHHpzoExF0h0tTGYRPH7JQTtrWQFzA=; b=XDZ6Ivb/mzdCULOa/2mug9/D2bBLlgsjsqV5lhQKGxDKJVdN2QG6gLaW7HGhOCS6IBHbjmNrLeYa6a3ntWp30/LGMQCywl5gXykbqkjE5KdppEAgG6kxUSa8sDXRUiHUfxKOTe6VtAjKUT150FESQsaIxqNKpsXPdq9/wYJO2vff73cie2/9NPbJDFbtYKdYDmHRst/bMp6ukCme9Pk+64hrn40qCgHFkT1yIiNe8AQcs+yJ06/BfnRU83QT7JENQZV6TamX7YM8WwaAzhHpUlF1kcWxPTMsK5xypu3ex8z+LZlBDhlZAXKRmL6LO9YYo84E7J3JQvtGcjmVx4opog== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none Authentication-Results: xen.org; dkim=none (message not signed) header.d=none;xen.org; dmarc=none action=none header.from=suse.com; Subject: [PATCH v2 12/18] AMD/IOMMU: allow use of superpage mappings From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Paul Durrant , Andrew Cooper , George Dunlap , Ian Jackson , Julien Grall , Stefano Stabellini , Wei Liu References: <957f067b-9fe1-2350-4266-51982f09d3a9@suse.com> Message-ID: Date: Fri, 24 Sep 2021 11:52:14 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 In-Reply-To: <957f067b-9fe1-2350-4266-51982f09d3a9@suse.com> Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: FR3P281CA0023.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:1c::7) To VI1PR04MB5600.eurprd04.prod.outlook.com (2603:10a6:803:e7::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a89f903f-cb29-40e6-b50f-08d97f40fd59 X-MS-TrafficTypeDiagnostic: VI1PR0401MB2446: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: T1NSOBLFumlTC1xyJ8gqsFeoolks4xg3OAoXVOD5bGTIcrepoW+G4+4x1ZVv2wB04i73lbfphY3JZ58JlBhET/4wEZRUnLRcLCLrHepfH57frmIBX5bgcz7UcObaYB11ikgqHiWwVIMh/f1L95vVZLLgGCn0EXNIzbCh2qt/Dm7hym4lVznojHfG7rfpUEIiIvhZprJwUTvm4ZGZlLdSiiLgG6WuQ6lwZY8bruRwXnKmZOKcOUSuAu1l23/ONYhwv7GhywmCPN2xw+ksKIkZOCHgkFF0Qurm/DjR1HWUYkKEXL4wNqN0RNPx9lmO4RfhW6NLlhjo+VFs2PsFjx9tj/ThClMP+HRYPp//bqtcuEviuXnkOS1c+fyQIop4WvMC49KGABhkLzImxxPTnabjDDVkIiIYDmYsjz8KXBxY4FyhilwSLDH/BZ6XjtPolC5hhWU8Ra1Lh1YnPTZBqxpqogaPVJOhPxO/kHvtO7vgFGw+O+HYKMXOvrT7n/7nbzG/SJxrhibipodJpjzHSlKhgvF59GtjK+BjptU7S36Z7H+Qcz6zNs3/sbXAuspVbQ5z3bCdeukp110P0577atZkHD+nSRWhBccUOvXPemKHqUC5ZilkmoK/otV0fMeTgXtNWpM6AFoOId3SsqRDYnmZwUpB9IVusIzrnng4r5B/xbzCrdwnshN/j0Oj/IfZG2MKgEQK14x0R1PBdafOtViP0jfwLAN9mLe6SqScRacU/pQ= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR04MB5600.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(366004)(8936002)(956004)(4326008)(5660300002)(16576012)(6486002)(66946007)(186003)(2616005)(54906003)(6916009)(86362001)(8676002)(38100700002)(66476007)(36756003)(66556008)(31696002)(83380400001)(2906002)(26005)(31686004)(316002)(508600001)(43740500002)(45980500001);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?M0dzUmJwekxyeWVTRnZDWE8rN3h6NEFDZ1poWXVoeDQ1ZkhNMitseTZxUjFw?= =?utf-8?B?UGhCZVNnc2RuMngxbEJzeGNRbDhrLzBRbGk0WkdZeUhsSlRXYkJJaEhIRVc4?= =?utf-8?B?RFo4TlBTN09VK0wvRFVJdWhWUFdRdUtnWEZaMUl4elRvYnFoRkZOaExZNXp6?= =?utf-8?B?WTRtRGVieElpWElIQkZzMWRQaGwvTGVTTFI4WVVwd2JvdXRIWmFEZ0JEQW9s?= =?utf-8?B?a1JDSHlGY3Yyd0NiRmRDcVA5ODJrUlBSTnlSUFBXb2dndXlWTXNBOUloVkgw?= =?utf-8?B?UThXMnZHd2NDUjc2SkR0Y1hmd3ZvdEgyZGRsNDl3YUZDRDRyWDF0anhCU3hF?= =?utf-8?B?UXQvc0I3ejBIYmJtSlZldml1WEhCbHFlQ0xQM3hjcEtNQzg3UlZ2bVRDczJY?= =?utf-8?B?UHkrODNNS2NScWV0YmFWUnI1K3YxL1NueHN1S01YMU1BTEhNTnRpWkNXYXFy?= =?utf-8?B?ZVVMQ0RmYzFyMnh3dWpSWnY2RTZOdk1BN3V5OXRDQjNWMlFRT1FkanZOYTZi?= =?utf-8?B?TkNucEhJdHk4Mzc5ZmlISW9HOURZWjVBc0tEN3M3dnkwdHkrOEhTWk9IblhX?= =?utf-8?B?WFVybmdzWnRVQVdFU2lMZktpRXZpc1pWR21EQmRjRi9hSXg5djhyeFZES3Iy?= =?utf-8?B?UDZ1TWpzcXNyTldTQUlOZU01RW5uQUVabko4Uit1eEZmbkRNUzM5WVdVck00?= =?utf-8?B?Y3c1NWpxVlZScE9hYWQzSlcvcUJaYk5TUStiNmxOMUFMcVRkL05weWk3NjJ2?= =?utf-8?B?a3QwaEZycWFRMGFRc1p1N2ZwK3V6cGNjdDBGeGE0WC8yVWhGZXBmUDZDK2Fs?= =?utf-8?B?elU4Y2s2WS9PbjMxNkJsc2RGaFFVVy8xS2RYVzZ0NnR6NzVTMklEYkduREZI?= =?utf-8?B?eTBPSEJOR1FKbEhEcURkcVNoaUkxT0JtcXRMaHdYTFhRYmxwVExxOGdwMG52?= =?utf-8?B?Uk9RaXRDbkhJVk5UTE5yMDZpeGdDZGZkVmZwdW5mOEI4NktQeXh4RWRscjA5?= =?utf-8?B?QXFMSkdLSjFnbTZ4eWNFcVRDWHRnMEFyUUtzaDUxbmorRVNnNG5vU2dubEox?= =?utf-8?B?NUUxTXFmdXl3VmREQVJiS3hjcG9CWUlMUzBEUEtkeThSa095YlhNR2NWOWVT?= =?utf-8?B?UGxPVGNiOWJGYm9lYzFOWHp6WVllYVlEc1Mvb3BhSUVFMFZLVWNoY2ZmeXlN?= =?utf-8?B?L1k0a0h0YzJxNjl5UzlXdHo0dWVFY3orOFFYc3k2ekhRWk5SSHIwUGYrRC96?= =?utf-8?B?VXVHcndnVFo5VThpS3VCSEVYN0lUaVFDWkQrcnlzY2ZCVmJTL3FTZnozdStE?= =?utf-8?B?c3UyUWZ3bzh6aVlORUNwTmh5ZXZlZHlSdmtNVmxsaHkxVHZ5ZUwxYkc4SEZO?= =?utf-8?B?K0ZpNzA0SVFQenEvNnVycEhaVm90UndzY3lPejdPOHdiUEQxNW1UbiszVjIw?= =?utf-8?B?Uk9nS1pHakRNbzJKSWlJUFdXUUZHWG10bDc5dzhKeEZ5cEFCYndwMit0YkFv?= =?utf-8?B?eTJ3S0pTdHp2ZjlyWFpLSjhXLzYrK3dJbHBJOVFoMmZTTE1FTDFvQ1cvZmJF?= =?utf-8?B?aUsvTmhLTktzNHVPTHpUaWJZcGdoZWN0V3dBMXlYR1VDOWZ4Z3l5amsrekc0?= =?utf-8?B?em5rdHRYQ052THFFS0hvRkRVOXFiVHNCdnEvNTJQS29QclhEMk9QUDRZa1Fj?= =?utf-8?B?TitZRDBvVFcxdXlMRUpjYXdsVzdEL1dwYzVXZExqaC9TSjZ0S2liZDBRdUVG?= =?utf-8?Q?n4fpGwHE8OX/z2+Ubdt8aNxlnd5xaxQpG1tYevo?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: a89f903f-cb29-40e6-b50f-08d97f40fd59 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5600.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2021 09:52:15.6354 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: vtqpuih0nbd3ev1MRJB+9xT4LCKFyc1v8tGozTtCRf7WKTtd/WmLESutc2OsOiPDieyJYGt6+YdIiLd82TwftA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2446 X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1632477160594100001 Content-Type: text/plain; charset="utf-8" No separate feature flags exist which would control availability of these; the only restriction is HATS (establishing the maximum number of page table levels in general), and even that has a lower bound of 4. Thus we can unconditionally announce 2M, 1G, and 512G mappings. (Via non-default page sizes the implementation in principle permits arbitrary size mappings, but these require multiple identical leaf PTEs to be written, which isn't all that different from having to write multiple consecutive PTEs with increasing frame numbers. IMO that's therefore beneficial only on hardware where suitable TLBs exist; I'm unaware of such hardware.) Signed-off-by: Jan Beulich --- I'm not fully sure about allowing 512G mappings: The scheduling-for- freeing of intermediate page tables can take quite a while when replacing a tree of 4k mappings by a single 512G one. Plus (or otoh) there's no present code path via which 512G chunks of memory could be allocated (and hence mapped) anyway. --- a/xen/drivers/passthrough/amd/iommu_map.c +++ b/xen/drivers/passthrough/amd/iommu_map.c @@ -32,12 +32,13 @@ static unsigned int pfn_to_pde_idx(unsig } =20 static union amd_iommu_pte clear_iommu_pte_present(unsigned long l1_mfn, - unsigned long dfn) + unsigned long dfn, + unsigned int level) { union amd_iommu_pte *table, *pte, old; =20 table =3D map_domain_page(_mfn(l1_mfn)); - pte =3D &table[pfn_to_pde_idx(dfn, 1)]; + pte =3D &table[pfn_to_pde_idx(dfn, level)]; old =3D *pte; =20 write_atomic(&pte->raw, 0); @@ -288,10 +289,31 @@ static int iommu_pde_from_dfn(struct dom return 0; } =20 +static void queue_free_pt(struct domain *d, mfn_t mfn, unsigned int next_l= evel) +{ + if ( next_level > 1 ) + { + union amd_iommu_pte *pt =3D map_domain_page(mfn); + unsigned int i; + + for ( i =3D 0; i < PTE_PER_TABLE_SIZE; ++i ) + if ( pt[i].pr && pt[i].next_level ) + { + ASSERT(pt[i].next_level < next_level); + queue_free_pt(d, _mfn(pt[i].mfn), pt[i].next_level); + } + + unmap_domain_page(pt); + } + + iommu_queue_free_pgtable(d, mfn_to_page(mfn)); +} + int amd_iommu_map_page(struct domain *d, dfn_t dfn, mfn_t mfn, unsigned int flags, unsigned int *flush_flags) { struct domain_iommu *hd =3D dom_iommu(d); + unsigned int level =3D (IOMMUF_order(flags) / PTE_PER_TABLE_SHIFT) + 1; int rc; unsigned long pt_mfn =3D 0; union amd_iommu_pte old; @@ -320,7 +342,7 @@ int amd_iommu_map_page(struct domain *d, return rc; } =20 - if ( iommu_pde_from_dfn(d, dfn_x(dfn), 1, &pt_mfn, flush_flags, true) = || + if ( iommu_pde_from_dfn(d, dfn_x(dfn), level, &pt_mfn, flush_flags, tr= ue) || !pt_mfn ) { spin_unlock(&hd->arch.mapping_lock); @@ -330,8 +352,8 @@ int amd_iommu_map_page(struct domain *d, return -EFAULT; } =20 - /* Install 4k mapping */ - old =3D set_iommu_pte_present(pt_mfn, dfn_x(dfn), mfn_x(mfn), 1, + /* Install mapping */ + old =3D set_iommu_pte_present(pt_mfn, dfn_x(dfn), mfn_x(mfn), level, (flags & IOMMUF_writable), (flags & IOMMUF_readable)); =20 @@ -339,8 +361,13 @@ int amd_iommu_map_page(struct domain *d, =20 *flush_flags |=3D IOMMU_FLUSHF_added; if ( old.pr ) + { *flush_flags |=3D IOMMU_FLUSHF_modified; =20 + if ( level > 1 && old.next_level ) + queue_free_pt(d, _mfn(old.mfn), old.next_level); + } + return 0; } =20 @@ -349,6 +376,7 @@ int amd_iommu_unmap_page(struct domain * { unsigned long pt_mfn =3D 0; struct domain_iommu *hd =3D dom_iommu(d); + unsigned int level =3D (order / PTE_PER_TABLE_SHIFT) + 1; union amd_iommu_pte old =3D {}; =20 spin_lock(&hd->arch.mapping_lock); @@ -359,7 +387,7 @@ int amd_iommu_unmap_page(struct domain * return 0; } =20 - if ( iommu_pde_from_dfn(d, dfn_x(dfn), 1, &pt_mfn, flush_flags, false)= ) + if ( iommu_pde_from_dfn(d, dfn_x(dfn), level, &pt_mfn, flush_flags, fa= lse) ) { spin_unlock(&hd->arch.mapping_lock); AMD_IOMMU_DEBUG("Invalid IO pagetable entry dfn =3D %"PRI_dfn"\n", @@ -371,14 +399,19 @@ int amd_iommu_unmap_page(struct domain * if ( pt_mfn ) { /* Mark PTE as 'page not present'. */ - old =3D clear_iommu_pte_present(pt_mfn, dfn_x(dfn)); + old =3D clear_iommu_pte_present(pt_mfn, dfn_x(dfn), level); } =20 spin_unlock(&hd->arch.mapping_lock); =20 if ( old.pr ) + { *flush_flags |=3D IOMMU_FLUSHF_modified; =20 + if ( level > 1 && old.next_level ) + queue_free_pt(d, _mfn(old.mfn), old.next_level); + } + return 0; } =20 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -630,7 +630,7 @@ static void amd_dump_page_tables(struct } =20 static const struct iommu_ops __initconstrel _iommu_ops =3D { - .page_sizes =3D PAGE_SIZE_4K, + .page_sizes =3D PAGE_SIZE_4K | PAGE_SIZE_2M | PAGE_SIZE_1G | PAGE_SIZE= _512G, .init =3D amd_iommu_domain_init, .hwdom_init =3D amd_iommu_hwdom_init, .quarantine_init =3D amd_iommu_quarantine_init, --- a/xen/include/xen/page-defs.h +++ b/xen/include/xen/page-defs.h @@ -21,4 +21,19 @@ #define PAGE_MASK_64K PAGE_MASK_GRAN(64K) #define PAGE_ALIGN_64K(addr) PAGE_ALIGN_GRAN(64K, addr) =20 +#define PAGE_SHIFT_2M 21 +#define PAGE_SIZE_2M PAGE_SIZE_GRAN(2M) +#define PAGE_MASK_2M PAGE_MASK_GRAN(2M) +#define PAGE_ALIGN_2M(addr) PAGE_ALIGN_GRAN(2M, addr) + +#define PAGE_SHIFT_1G 30 +#define PAGE_SIZE_1G PAGE_SIZE_GRAN(1G) +#define PAGE_MASK_1G PAGE_MASK_GRAN(1G) +#define PAGE_ALIGN_1G(addr) PAGE_ALIGN_GRAN(1G, addr) + +#define PAGE_SHIFT_512G 39 +#define PAGE_SIZE_512G PAGE_SIZE_GRAN(512G) +#define PAGE_MASK_512G PAGE_MASK_GRAN(512G) +#define PAGE_ALIGN_512G(addr) PAGE_ALIGN_GRAN(512G, addr) + #endif /* __XEN_PAGE_DEFS_H__ */