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Wed, 04 Mar 2026 06:37:27 -0800 (PST) Message-ID: Date: Wed, 4 Mar 2026 15:37:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Penny Zheng From: Jan Beulich Subject: [PATCH] x86/ACPI: _PDC bits vs HWP/CPPC Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1772635065774158500 The treatment of ACPI_PDC_CPPC_NATIVE_INTR should follow that of other P- state related bits. Add the bit to ACPI_PDC_P_MASK and apply "mask" in arch_acpi_set_pdc_bits() when setting that bit. Move this next to the other P-state related logic. Further apply ACPI_PDC_P_MASK also when the amd-cppc driver is in use. Also leave a comment regarding the clearing of bits and add a couple of blank lines. Signed-off-by: Jan Beulich --- Including XEN_PROCESSOR_PM_CPPC may need accompanying with some change to arch_acpi_set_pdc_bits(), but it's entirely unclear to me what to do there. I'm unaware of an AMD counterpart of Intel's "Intel=C2=AE Processor Vendor-Specific ACPI". Plus even when the powernow driver is in use, we never set any bits, as EIST is an Intel-only feature. acpi_set_pdc_bits() having moved to the cpufreq driver looks to have been a mistake. It covers not only P-state related bits, but also C-state and T-state ones. (This is only a latent issue as long as https://lists.xen.org/archives/html/xen-devel/2026-02/msg00875.html wouldn't land.) --- a/xen/arch/x86/acpi/lib.c +++ b/xen/arch/x86/acpi/lib.c @@ -124,6 +124,9 @@ int arch_acpi_set_pdc_bits(u32 acpi_id, if (cpu_has(c, X86_FEATURE_EIST)) pdc[2] |=3D ACPI_PDC_EST_CAPABILITY_SWSMP & mask; =20 + if (hwp_active()) + pdc[2] |=3D ACPI_PDC_CPPC_NATIVE_INTR & mask; + if (cpu_has(c, X86_FEATURE_ACPI)) pdc[2] |=3D ACPI_PDC_T_FFH & mask; =20 @@ -142,8 +145,5 @@ int arch_acpi_set_pdc_bits(u32 acpi_id, !(ecx & CPUID5_ECX_INTERRUPT_BREAK)) pdc[2] &=3D ~(ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH); =20 - if (hwp_active()) - pdc[2] |=3D ACPI_PDC_CPPC_NATIVE_INTR; - return 0; } --- a/xen/drivers/cpufreq/cpufreq.c +++ b/xen/drivers/cpufreq/cpufreq.c @@ -694,14 +694,23 @@ int acpi_set_pdc_bits(unsigned int acpi_ { uint32_t mask =3D 0; =20 + /* + * Accumulate all the bits under Xen's control, to mask them off, = for + * arch_acpi_set_pdc_bits() to then set those we want set. + */ if ( xen_processor_pmbits & XEN_PROCESSOR_PM_CX ) mask |=3D ACPI_PDC_C_MASK | ACPI_PDC_SMP_C1PT; - if ( xen_processor_pmbits & XEN_PROCESSOR_PM_PX ) + + if ( xen_processor_pmbits & + (XEN_PROCESSOR_PM_PX | XEN_PROCESSOR_PM_CPPC) ) mask |=3D ACPI_PDC_P_MASK | ACPI_PDC_SMP_C1PT; + if ( xen_processor_pmbits & XEN_PROCESSOR_PM_TX ) mask |=3D ACPI_PDC_T_MASK | ACPI_PDC_SMP_C1PT; + bits[2] &=3D (ACPI_PDC_C_MASK | ACPI_PDC_P_MASK | ACPI_PDC_T_MASK | ACPI_PDC_SMP_C1PT) & ~mask; + ret =3D arch_acpi_set_pdc_bits(acpi_id, bits, mask); } if ( !ret && __copy_to_guest_offset(pdc, 2, bits + 2, 1) ) --- a/xen/include/acpi/pdc_intel.h +++ b/xen/include/acpi/pdc_intel.h @@ -43,7 +43,8 @@ =20 #define ACPI_PDC_P_MASK (ACPI_PDC_P_FFH | \ ACPI_PDC_SMP_P_SWCOORD | \ - ACPI_PDC_SMP_P_HWCOORD) + ACPI_PDC_SMP_P_HWCOORD | \ + ACPI_PDC_CPPC_NATIVE_INTR) =20 #define ACPI_PDC_T_MASK (ACPI_PDC_T_FFH | \ ACPI_PDC_SMP_T_SWCOORD)