From nobody Thu Mar 28 12:30:07 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=quarantine dis=none) header.from=suse.com ARC-Seal: i=1; a=rsa-sha256; t=1617717835; cv=none; d=zohomail.com; s=zohoarc; b=SIPKA+9yiA2Y6CEzC6dTPAIgbKJcnbZ7kLBwAt5ZnA/8KvolRWTyjvKXM+i70Vge3Ga+GIA0qSQIBz47SFHDmGdQDPLWEh+FVXDzdQcmtgbS9Cfb5ME4H/H4FkOfhJ4/Dgq+vu8X7HIOdtoJpjRnjhPfHEm6tpgYJf+qOxwtxqA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1617717835; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=wEnWGL/BSIvoY8CXWjvvr4hQ9Rbcec+UPdK7vVB1MBg=; b=WWOuiBGGx9WVhncd4ifffYVkL3QHmHVlnms6nvl4J9890/cyA3uaINwZy+jJGKGlD2PJl271rJrq3UaoaoQ9XmJsBsljEQpoN5NINj+xH7vLWackC9ghRjuquHOyww2bQ+xwiW0sEz8hpHtN5NcXpfslroFdRoI0C653Sb/SusA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=quarantine dis=none) header.from= Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1617717835196895.8944123842341; Tue, 6 Apr 2021 07:03:55 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.105984.202661 (Exim 4.92) (envelope-from ) id 1lTmGl-0005Hs-D1; Tue, 06 Apr 2021 14:01:27 +0000 Received: by outflank-mailman (output) from mailman id 105984.202661; Tue, 06 Apr 2021 14:01:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1lTmGl-0005Hl-9w; Tue, 06 Apr 2021 14:01:27 +0000 Received: by outflank-mailman (input) for mailman id 105984; Tue, 06 Apr 2021 14:01:26 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1lTmGj-0005Hf-Vg for xen-devel@lists.xenproject.org; Tue, 06 Apr 2021 14:01:26 +0000 Received: from mx2.suse.de (unknown [195.135.220.15]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 0490220a-22ad-41a5-9b4f-ee345d756fe1; Tue, 06 Apr 2021 14:01:24 +0000 (UTC) Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 4077AB1BD; Tue, 6 Apr 2021 14:01:23 +0000 (UTC) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0490220a-22ad-41a5-9b4f-ee345d756fe1 X-Virus-Scanned: by amavisd-new at test-mx.suse.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1617717683; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wEnWGL/BSIvoY8CXWjvvr4hQ9Rbcec+UPdK7vVB1MBg=; b=hPWawKy4pvj9a6moTqEg5jPb4ALOHXaXDni0WTAF4YmoS9SwN90pTeWclCO8R37fr8gZD8 CEcYCtA4D3rcym0sF8cHdG23PpXX//ZNbnzQR+JmV8VO5xYZ/fHSLD7G7aKNJ8gryeyvey 2YsDsRK6N0MAJUzLR1Fcetq5WO6+ONE= Subject: [PATCH v2 1/3] x86: don't build unused entry code when !PV32 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , George Dunlap , Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= References: Message-ID: <213007e3-bb4c-a564-ca1d-860283646be4@suse.com> Date: Tue, 6 Apr 2021 16:01:22 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) Content-Type: text/plain; charset="utf-8" Except for the initial part of cstar_enter compat/entry.S is all dead code in this case. Further, along the lines of the PV conditionals we already have in entry.S, make code PV32-conditional there too (to a fair part because this code actually references compat/entry.S). This has the side effect of moving the tail part (now at compat_syscall) of the code out of .text.entry (in line with e.g. compat_sysenter). Signed-off-by: Jan Beulich Reviewed-by: Wei Liu --- v2: Avoid #ifdef-ary in compat/entry.S. --- TBD: I'm on the fence of whether (in a separate patch) to also make conditional struct pv_domain's is_32bit field. --- a/xen/arch/x86/x86_64/asm-offsets.c +++ b/xen/arch/x86/x86_64/asm-offsets.c @@ -9,7 +9,7 @@ #include #endif #include -#ifdef CONFIG_PV +#ifdef CONFIG_PV32 #include #endif #include @@ -102,19 +102,21 @@ void __dummy__(void) BLANK(); #endif =20 -#ifdef CONFIG_PV +#ifdef CONFIG_PV32 OFFSET(DOMAIN_is_32bit_pv, struct domain, arch.pv.is_32bit); BLANK(); =20 - OFFSET(VCPUINFO_upcall_pending, struct vcpu_info, evtchn_upcall_pendin= g); - OFFSET(VCPUINFO_upcall_mask, struct vcpu_info, evtchn_upcall_mask); - BLANK(); - OFFSET(COMPAT_VCPUINFO_upcall_pending, struct compat_vcpu_info, evtchn= _upcall_pending); OFFSET(COMPAT_VCPUINFO_upcall_mask, struct compat_vcpu_info, evtchn_up= call_mask); BLANK(); #endif =20 +#ifdef CONFIG_PV + OFFSET(VCPUINFO_upcall_pending, struct vcpu_info, evtchn_upcall_pendin= g); + OFFSET(VCPUINFO_upcall_mask, struct vcpu_info, evtchn_upcall_mask); + BLANK(); +#endif + OFFSET(CPUINFO_guest_cpu_user_regs, struct cpu_info, guest_cpu_user_re= gs); OFFSET(CPUINFO_verw_sel, struct cpu_info, verw_sel); OFFSET(CPUINFO_current_vcpu, struct cpu_info, current_vcpu); --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -11,8 +11,6 @@ #include #include =20 -#ifdef CONFIG_PV32 - ENTRY(entry_int82) ALTERNATIVE "", clac, X86_FEATURE_XEN_SMAP pushq $0 @@ -29,8 +27,6 @@ ENTRY(entry_int82) mov %rsp, %rdi call do_entry_int82 =20 -#endif /* CONFIG_PV32 */ - /* %rbx: struct vcpu */ ENTRY(compat_test_all_events) ASSERT_NOT_IN_ATOMIC @@ -197,43 +193,7 @@ ENTRY(cr4_pv32_restore) xor %eax, %eax ret =20 - .section .text.entry, "ax", @progbits - -/* See lstar_enter for entry register state. */ -ENTRY(cstar_enter) -#ifdef CONFIG_XEN_SHSTK - ALTERNATIVE "", "setssbsy", X86_FEATURE_XEN_SHSTK -#endif - /* sti could live here when we don't switch page tables below. */ - CR4_PV32_RESTORE - movq 8(%rsp),%rax /* Restore %rax. */ - movq $FLAT_USER_SS32, 8(%rsp) /* Assume a 64bit domain. Compat h= andled lower. */ - pushq %r11 - pushq $FLAT_USER_CS32 - pushq %rcx - pushq $0 - movl $TRAP_syscall, 4(%rsp) - SAVE_ALL - - SPEC_CTRL_ENTRY_FROM_PV /* Req: %rsp=3Dregs/cpuinfo, Clob: acd */ - /* WARNING! `ret`, `call *`, `jmp *` not safe before this point. */ - - GET_STACK_END(bx) - mov STACK_CPUINFO_FIELD(xen_cr3)(%rbx), %rcx - test %rcx, %rcx - jz .Lcstar_cr3_okay - movb $0, STACK_CPUINFO_FIELD(use_pv_cr3)(%rbx) - mov %rcx, %cr3 - /* %r12 is still zero at this point. */ - mov %r12, STACK_CPUINFO_FIELD(xen_cr3)(%rbx) -.Lcstar_cr3_okay: - sti - - movq STACK_CPUINFO_FIELD(current_vcpu)(%rbx), %rbx - movq VCPU_domain(%rbx),%rcx - cmpb $0,DOMAIN_is_32bit_pv(%rcx) - je switch_to_kernel - +ENTRY(compat_syscall) /* Fix up reported %cs/%ss for compat domains. */ movl $FLAT_COMPAT_USER_SS, UREGS_ss(%rsp) movl $FLAT_COMPAT_USER_CS, UREGS_cs(%rsp) @@ -262,8 +222,6 @@ UNLIKELY_END(compat_syscall_gpf) movb %cl,TRAPBOUNCE_flags(%rdx) jmp .Lcompat_bounce_exception =20 - .text - ENTRY(compat_sysenter) CR4_PV32_RESTORE movq VCPU_trap_ctxt(%rbx),%rcx --- a/xen/arch/x86/x86_64/Makefile +++ b/xen/arch/x86/x86_64/Makefile @@ -1,4 +1,4 @@ -obj-$(CONFIG_PV) +=3D compat/ +obj-$(CONFIG_PV32) +=3D compat/ =20 obj-bin-y +=3D entry.o obj-y +=3D traps.o --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -24,7 +24,7 @@ =20 #ifdef CONFIG_PV /* %rbx: struct vcpu */ -ENTRY(switch_to_kernel) +switch_to_kernel: leaq VCPU_trap_bounce(%rbx),%rdx =20 /* TB_eip =3D 32-bit syscall ? syscall32_addr : syscall_addr */ @@ -283,6 +283,45 @@ ENTRY(lstar_enter) call pv_hypercall jmp test_all_events =20 +/* See lstar_enter for entry register state. */ +ENTRY(cstar_enter) +#ifdef CONFIG_XEN_SHSTK + ALTERNATIVE "", "setssbsy", X86_FEATURE_XEN_SHSTK +#endif + /* sti could live here when we don't switch page tables below. */ + CR4_PV32_RESTORE + movq 8(%rsp), %rax /* Restore %rax. */ + movq $FLAT_USER_SS32, 8(%rsp) /* Assume a 64bit domain. Compat h= andled lower. */ + pushq %r11 + pushq $FLAT_USER_CS32 + pushq %rcx + pushq $0 + movl $TRAP_syscall, 4(%rsp) + SAVE_ALL + + SPEC_CTRL_ENTRY_FROM_PV /* Req: %rsp=3Dregs/cpuinfo, Clob: acd */ + /* WARNING! `ret`, `call *`, `jmp *` not safe before this point. */ + + GET_STACK_END(bx) + mov STACK_CPUINFO_FIELD(xen_cr3)(%rbx), %rcx + test %rcx, %rcx + jz .Lcstar_cr3_okay + movb $0, STACK_CPUINFO_FIELD(use_pv_cr3)(%rbx) + mov %rcx, %cr3 + /* %r12 is still zero at this point. */ + mov %r12, STACK_CPUINFO_FIELD(xen_cr3)(%rbx) +.Lcstar_cr3_okay: + sti + + movq STACK_CPUINFO_FIELD(current_vcpu)(%rbx), %rbx + +#ifdef CONFIG_PV32 + movq VCPU_domain(%rbx), %rcx + cmpb $0, DOMAIN_is_32bit_pv(%rcx) + jne compat_syscall +#endif + jmp switch_to_kernel + ENTRY(sysenter_entry) #ifdef CONFIG_XEN_SHSTK ALTERNATIVE "", "setssbsy", X86_FEATURE_XEN_SHSTK @@ -340,8 +379,10 @@ UNLIKELY_END(sysenter_gpf) movq VCPU_domain(%rbx),%rdi movq %rax,TRAPBOUNCE_eip(%rdx) movb %cl,TRAPBOUNCE_flags(%rdx) +#ifdef CONFIG_PV32 cmpb $0, DOMAIN_is_32bit_pv(%rdi) jne compat_sysenter +#endif jmp .Lbounce_exception =20 ENTRY(int80_direct_trap) @@ -382,6 +423,7 @@ UNLIKELY_END(msi_check) mov 0x80 * TRAPINFO_sizeof + TRAPINFO_eip(%rsi), %rdi movzwl 0x80 * TRAPINFO_sizeof + TRAPINFO_cs (%rsi), %ecx =20 +#ifdef CONFIG_PV32 mov %ecx, %edx and $~3, %edx =20 @@ -390,6 +432,10 @@ UNLIKELY_END(msi_check) =20 test %rdx, %rdx jz int80_slow_path +#else + test %rdi, %rdi + jz int80_slow_path +#endif =20 /* Construct trap_bounce from trap_ctxt[0x80]. */ lea VCPU_trap_bounce(%rbx), %rdx @@ -402,8 +448,10 @@ UNLIKELY_END(msi_check) lea (, %rcx, TBF_INTERRUPT), %ecx mov %cl, TRAPBOUNCE_flags(%rdx) =20 +#ifdef CONFIG_PV32 cmpb $0, DOMAIN_is_32bit_pv(%rax) jne compat_int80_direct_trap +#endif =20 call create_bounce_frame jmp test_all_events @@ -555,12 +603,16 @@ ENTRY(dom_crash_sync_extable) GET_STACK_END(ax) leaq STACK_CPUINFO_FIELD(guest_cpu_user_regs)(%rax),%rsp # create_bounce_frame() temporarily clobbers CS.RPL. Fix up. +#ifdef CONFIG_PV32 movq STACK_CPUINFO_FIELD(current_vcpu)(%rax), %rax movq VCPU_domain(%rax),%rax cmpb $0, DOMAIN_is_32bit_pv(%rax) sete %al leal (%rax,%rax,2),%eax orb %al,UREGS_cs(%rsp) +#else + orb $3, UREGS_cs(%rsp) +#endif xorl %edi,%edi jmp asm_domain_crash_synchronous /* Does not return */ .popsection @@ -578,11 +630,15 @@ ret_from_intr: GET_CURRENT(bx) testb $3, UREGS_cs(%rsp) jz restore_all_xen +#ifdef CONFIG_PV32 movq VCPU_domain(%rbx), %rax cmpb $0, DOMAIN_is_32bit_pv(%rax) je test_all_events jmp compat_test_all_events #else + jmp test_all_events +#endif +#else ret_from_intr: ASSERT_CONTEXT_IS_XEN jmp restore_all_xen @@ -671,7 +727,7 @@ handle_exception_saved: testb $X86_EFLAGS_IF>>8,UREGS_eflags+1(%rsp) jz exception_with_ints_disabled =20 -#ifdef CONFIG_PV +#if defined(CONFIG_PV32) ALTERNATIVE_2 "jmp .Lcr4_pv32_done", \ __stringify(mov VCPU_domain(%rbx), %rax), X86_FEATURE_XEN_SMEP= , \ __stringify(mov VCPU_domain(%rbx), %rax), X86_FEATURE_XEN_SMAP @@ -711,7 +767,7 @@ handle_exception_saved: test $~(PFEC_write_access|PFEC_insn_fetch),%eax jz compat_test_all_events .Lcr4_pv32_done: -#else +#elif !defined(CONFIG_PV) ASSERT_CONTEXT_IS_XEN #endif /* CONFIG_PV */ sti @@ -730,9 +786,11 @@ handle_exception_saved: #ifdef CONFIG_PV testb $3,UREGS_cs(%rsp) jz restore_all_xen +#ifdef CONFIG_PV32 movq VCPU_domain(%rbx),%rax cmpb $0, DOMAIN_is_32bit_pv(%rax) jne compat_test_all_events +#endif jmp test_all_events #else ASSERT_CONTEXT_IS_XEN @@ -968,11 +1026,16 @@ handle_ist_exception: je 1f movl $EVENT_CHECK_VECTOR,%edi call send_IPI_self -1: movq VCPU_domain(%rbx),%rax +1: +#ifdef CONFIG_PV32 + movq VCPU_domain(%rbx),%rax cmpb $0,DOMAIN_is_32bit_pv(%rax) je restore_all_guest jmp compat_restore_all_guest #else + jmp restore_all_guest +#endif +#else ASSERT_CONTEXT_IS_XEN jmp restore_all_xen #endif --- a/xen/include/asm-x86/asm_defns.h +++ b/xen/include/asm-x86/asm_defns.h @@ -305,7 +305,7 @@ static always_inline void stac(void) subq $-(UREGS_error_code-UREGS_r15+\adj), %rsp .endm =20 -#ifdef CONFIG_PV +#ifdef CONFIG_PV32 #define CR4_PV32_RESTORE \ ALTERNATIVE_2 "", \ "call cr4_pv32_restore", X86_FEATURE_XEN_SMEP, \ From nobody Thu Mar 28 12:30:07 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Tue, 06 Apr 2021 14:01:44 +0000 Received: from mx2.suse.de (unknown [195.135.220.15]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id 064f3cdc-1ed3-49c2-832d-0e1228125673; Tue, 06 Apr 2021 14:01:43 +0000 (UTC) Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 488C5B1BC; Tue, 6 Apr 2021 14:01:42 +0000 (UTC) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 064f3cdc-1ed3-49c2-832d-0e1228125673 X-Virus-Scanned: by amavisd-new at test-mx.suse.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1617717702; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vEZ17NvnwSlKSweZ+wN2qQa/aenPa2meHi6XZJOo/ow=; b=B4MIKukkk9wf7G+VZI2BNpDegW/ZAbH99YjD5I0cIz+vq1jyqONPXHex3Oufol0t2fc1dt nKIs0KJn53sbqh3XZ8rVzVuC7VE04YUnvx8t4Q3t+0/sIrGxvKyK3cbC3FwMRTA72khhWg COTDsw9gcEOmWGvKX/Fp2HGstxg+pFM= Subject: [PATCH v2 2/3] x86: slim down hypercall handling when !PV32 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , George Dunlap , Ian Jackson , Julien Grall , Stefano Stabellini , Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= References: Message-ID: Date: Tue, 6 Apr 2021 16:01:41 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) Content-Type: text/plain; charset="utf-8" In such a build various of the compat handlers aren't needed. Don't reference them from the hypercall table, and compile out those which aren't needed for HVM. Also compile out switch_compat(), which has no purpose in such a build. Signed-off-by: Jan Beulich Reviewed-by: Wei Liu --- v2: New. --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -17,7 +17,8 @@ obj-bin-y +=3D bzimage.init.o obj-bin-y +=3D clear_page.o obj-bin-y +=3D copy_page.o obj-y +=3D cpuid.o -obj-$(CONFIG_PV) +=3D compat.o x86_64/compat.o +obj-$(CONFIG_PV) +=3D compat.o +obj-$(CONFIG_PV32) +=3D x86_64/compat.o obj-$(CONFIG_KEXEC) +=3D crash.o obj-$(CONFIG_GDBSX) +=3D debug.o obj-y +=3D delay.o --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -121,7 +121,9 @@ static long hvm_physdev_op(int cmd, XEN_ =20 #define do_arch_1 paging_domctl_continuation =20 -static const hypercall_table_t hvm_hypercall_table[] =3D { +static const struct { + hypercall_fn_t *native, *compat; +} hvm_hypercall_table[] =3D { HVM_CALL(memory_op), #ifdef CONFIG_GRANT_TABLE HVM_CALL(grant_table_op), --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -4498,7 +4498,9 @@ long do_update_va_mapping_otherdomain(un =20 return rc; } +#endif /* CONFIG_PV */ =20 +#ifdef CONFIG_PV32 int compat_update_va_mapping(unsigned int va, uint32_t lo, uint32_t hi, unsigned int flags) { @@ -4533,7 +4535,7 @@ int compat_update_va_mapping_otherdomain =20 return rc; } -#endif /* CONFIG_PV */ +#endif /* CONFIG_PV32 */ =20 typedef struct e820entry e820entry_t; DEFINE_XEN_GUEST_HANDLE(e820entry_t); --- a/xen/arch/x86/pv/callback.c +++ b/xen/arch/x86/pv/callback.c @@ -19,12 +19,11 @@ #include #include #include -#include -#include =20 #include =20 #include +#include =20 static int register_guest_nmi_callback(unsigned long address) { @@ -203,6 +202,11 @@ long do_set_callbacks(unsigned long even return 0; } =20 +#ifdef CONFIG_PV32 + +#include +#include + static long compat_register_guest_callback(struct compat_callback_register= *reg) { long ret =3D 0; @@ -343,6 +347,8 @@ long compat_set_callbacks(unsigned long return 0; } =20 +#endif /* CONFIG_PV32 */ + long do_set_trap_table(XEN_GUEST_HANDLE_PARAM(const_trap_info_t) traps) { struct trap_info cur; @@ -388,6 +394,7 @@ long do_set_trap_table(XEN_GUEST_HANDLE_ return rc; } =20 +#ifdef CONFIG_PV32 int compat_set_trap_table(XEN_GUEST_HANDLE(trap_info_compat_t) traps) { struct vcpu *curr =3D current; @@ -429,6 +436,7 @@ int compat_set_trap_table(XEN_GUEST_HAND =20 return rc; } +#endif =20 long do_nmi_op(unsigned int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) { @@ -455,6 +463,7 @@ long do_nmi_op(unsigned int cmd, XEN_GUE return rc; } =20 +#ifdef CONFIG_PV32 int compat_nmi_op(unsigned int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) { struct compat_nmi_callback cb; @@ -479,6 +488,7 @@ int compat_nmi_op(unsigned int cmd, XEN_ =20 return rc; } +#endif =20 /* * Local variables: --- a/xen/arch/x86/pv/descriptor-tables.c +++ b/xen/arch/x86/pv/descriptor-tables.c @@ -149,6 +149,8 @@ long do_set_gdt(XEN_GUEST_HANDLE_PARAM(x return ret; } =20 +#ifdef CONFIG_PV32 + int compat_set_gdt(XEN_GUEST_HANDLE_PARAM(uint) frame_list, unsigned int entries) { @@ -185,6 +187,18 @@ int compat_set_gdt(XEN_GUEST_HANDLE_PARA return ret; } =20 +int compat_update_descriptor(uint32_t pa_lo, uint32_t pa_hi, + uint32_t desc_lo, uint32_t desc_hi) +{ + seg_desc_t d; + + d.raw =3D ((uint64_t)desc_hi << 32) | desc_lo; + + return do_update_descriptor(pa_lo | ((uint64_t)pa_hi << 32), d); +} + +#endif /* CONFIG_PV32 */ + static bool check_descriptor(const struct domain *dom, seg_desc_t *d) { unsigned int a =3D d->a, b =3D d->b, cs, dpl; @@ -334,16 +348,6 @@ long do_update_descriptor(uint64_t gaddr return ret; } =20 -int compat_update_descriptor(uint32_t pa_lo, uint32_t pa_hi, - uint32_t desc_lo, uint32_t desc_hi) -{ - seg_desc_t d; - - d.raw =3D ((uint64_t)desc_hi << 32) | desc_lo; - - return do_update_descriptor(pa_lo | ((uint64_t)pa_hi << 32), d); -} - /* * Local variables: * mode: C --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -212,6 +212,7 @@ unsigned long pv_make_cr4(const struct v return cr4; } =20 +#ifdef CONFIG_PV32 int switch_compat(struct domain *d) { struct vcpu *v; @@ -256,6 +257,7 @@ int switch_compat(struct domain *d) =20 return rc; } +#endif =20 static int pv_create_gdt_ldt_l1tab(struct vcpu *v) { --- a/xen/arch/x86/pv/hypercall.c +++ b/xen/arch/x86/pv/hypercall.c @@ -25,12 +25,18 @@ #include #include =20 +#ifdef CONFIG_PV32 #define HYPERCALL(x) \ [ __HYPERVISOR_ ## x ] =3D { (hypercall_fn_t *) do_ ## x, \ (hypercall_fn_t *) do_ ## x } #define COMPAT_CALL(x) \ [ __HYPERVISOR_ ## x ] =3D { (hypercall_fn_t *) do_ ## x, \ (hypercall_fn_t *) compat_ ## x } +#else +#define HYPERCALL(x) \ + [ __HYPERVISOR_ ## x ] =3D { (hypercall_fn_t *) do_ ## x } +#define COMPAT_CALL(x) HYPERCALL(x) +#endif =20 #define do_arch_1 paging_domctl_continuation =20 @@ -176,6 +182,7 @@ void pv_hypercall(struct cpu_user_regs * } #endif } +#ifdef CONFIG_PV32 else { unsigned int ebx =3D regs->ebx; @@ -225,6 +232,7 @@ void pv_hypercall(struct cpu_user_regs * } #endif } +#endif /* CONFIG_PV32 */ =20 /* * PV guests use SYSCALL or INT $0x82 to make a hypercall, both of whi= ch @@ -255,7 +263,7 @@ enum mc_disposition arch_do_multicall_ca else call->result =3D -ENOSYS; } -#ifdef CONFIG_COMPAT +#ifdef CONFIG_PV32 else { struct compat_multicall_entry *call =3D &state->compat_call; --- a/xen/arch/x86/pv/iret.c +++ b/xen/arch/x86/pv/iret.c @@ -104,6 +104,7 @@ unsigned long do_iret(void) return 0; } =20 +#ifdef CONFIG_PV32 unsigned int compat_iret(void) { struct cpu_user_regs *regs =3D guest_cpu_user_regs(); @@ -223,6 +224,7 @@ unsigned int compat_iret(void) */ return regs->eax; } +#endif =20 /* * Local variables: --- a/xen/arch/x86/pv/shim.c +++ b/xen/arch/x86/pv/shim.c @@ -255,13 +255,17 @@ void __init pv_shim_setup_dom(struct dom */ rw_pv_hypercall_table =3D __va(__pa(pv_hypercall_table)); rw_pv_hypercall_table[__HYPERVISOR_event_channel_op].native =3D - rw_pv_hypercall_table[__HYPERVISOR_event_channel_op].compat =3D (hypercall_fn_t *)pv_shim_event_channel_op; - rw_pv_hypercall_table[__HYPERVISOR_grant_table_op].native =3D - rw_pv_hypercall_table[__HYPERVISOR_grant_table_op].compat =3D (hypercall_fn_t *)pv_shim_grant_table_op; =20 +#ifdef CONFIG_PV32 + rw_pv_hypercall_table[__HYPERVISOR_event_channel_op].compat =3D + (hypercall_fn_t *)pv_shim_event_channel_op; + rw_pv_hypercall_table[__HYPERVISOR_grant_table_op].compat =3D + (hypercall_fn_t *)pv_shim_grant_table_op; +#endif + guest =3D d; =20 /* --- a/xen/include/asm-x86/compat.h +++ b/xen/include/asm-x86/compat.h @@ -6,3 +6,11 @@ =20 typedef uint32_t compat_ptr_t; typedef unsigned long full_ptr_t; + +struct domain; +#ifdef CONFIG_PV32 +int switch_compat(struct domain *); +#else +#include +static inline int switch_compat(struct domain *d) { return -EOPNOTSUPP; } +#endif --- a/xen/include/asm-x86/hypercall.h +++ b/xen/include/asm-x86/hypercall.h @@ -16,7 +16,10 @@ typedef unsigned long hypercall_fn_t( unsigned long, unsigned long, unsigned long); =20 typedef struct { - hypercall_fn_t *native, *compat; + hypercall_fn_t *native; +#ifdef CONFIG_PV32 + hypercall_fn_t *compat; +#endif } hypercall_table_t; =20 typedef struct { --- a/xen/include/xen/compat.h +++ b/xen/include/xen/compat.h @@ -227,9 +227,6 @@ void xlat_start_info(struct start_info * struct vcpu_runstate_info; void xlat_vcpu_runstate_info(struct vcpu_runstate_info *); =20 -struct domain; -int switch_compat(struct domain *); - #else =20 #define compat_handle_is_null(hnd) 0 From nobody Thu Mar 28 12:30:07 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=quarantine dis=none) header.from=suse.com ARC-Seal: i=1; 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Tue, 6 Apr 2021 14:02:08 +0000 (UTC) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3a47c945-85f7-48a6-837b-9d027c5dec58 X-Virus-Scanned: by amavisd-new at test-mx.suse.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1617717728; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Q2+SZoShJf96g9SNse0hjvg19m/VI9Uy4veE6w5iXx4=; b=TfuiLuZNikliXehi6l3SzMMrE+eMbJBu5938OBg9i52kth2DgpIQsaP06YffigpFJq7Lxb JgrglpVq3632Gb4yVclGqIgYGygnQ1HhZ2WdXEYEc6+bweBWsjuzJUAbDZMMAR6clwWhUh +4Q5VwHbyw8UTsQi5tOVXgvzS4ge1/k= Subject: [PATCH v2 3/3] x86: avoid building COMPAT code when !HVM && !PV32 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , George Dunlap , Ian Jackson , Julien Grall , Stefano Stabellini , Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= References: Message-ID: <85b6edfc-9756-9dd0-c90f-f46dc120dade@suse.com> Date: Tue, 6 Apr 2021 16:02:08 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) Content-Type: text/plain; charset="utf-8" It was probably a mistake to, over time, drop various CONFIG_COMPAT conditionals from x86-specific code, as we now have a build configuration again where we'd prefer this to be unset. Arrange for CONFIG_COMPAT to actually be off in this case, dealing with fallout. Signed-off-by: Jan Beulich Reviewed-by: Wei Liu --- v2: New. --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -6,7 +6,6 @@ config X86 select ACPI select ACPI_LEGACY_TABLES_LOOKUP select ARCH_SUPPORTS_INT128 - select COMPAT select CORE_PARKING select HAS_ALTERNATIVE select HAS_CPUFREQ @@ -57,6 +56,7 @@ config PV32 bool "Support for 32bit PV guests" depends on PV default y + select COMPAT ---help--- The 32bit PV ABI uses Ring1, an area of the x86 architecture which was deprecated and mostly removed in the AMD64 spec. As a result, @@ -91,6 +91,7 @@ config PV_LINEAR_PT =20 config HVM def_bool !PV_SHIM_EXCLUSIVE + select COMPAT select IOREQ_SERVER prompt "HVM support" ---help--- --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -50,7 +50,8 @@ obj-y +=3D nmi.o obj-y +=3D numa.o obj-y +=3D pci.o obj-y +=3D percpu.o -obj-y +=3D physdev.o x86_64/physdev.o +obj-y +=3D physdev.o +obj-$(CONFIG_COMPAT) +=3D x86_64/physdev.o obj-y +=3D psr.o obj-y +=3D setup.o obj-y +=3D shutdown.o @@ -72,7 +73,8 @@ obj-y +=3D xstate.o =20 ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y) obj-y +=3D domctl.o -obj-y +=3D platform_hypercall.o x86_64/platform_hypercall.o +obj-y +=3D platform_hypercall.o +obj-$(CONFIG_COMPAT) +=3D x86_64/platform_hypercall.o obj-y +=3D sysctl.o endif =20 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -1291,6 +1291,8 @@ static void x86_mc_mceinject(void *data) #error BITS_PER_LONG definition absent #endif =20 +# ifdef CONFIG_COMPAT + # include =20 # define xen_mcinfo_msr mcinfo_msr @@ -1343,6 +1345,11 @@ CHECK_mcinfo_recovery; # undef xen_page_offline_action # undef xen_mcinfo_recovery =20 +# else +# define compat_handle_is_null(h) true +# define copy_to_compat(h, p, n) true /* really (-EFAULT), but gcc choke= s */ +# endif /* CONFIG_COMPAT */ + /* Machine Check Architecture Hypercall */ long do_mca(XEN_GUEST_HANDLE_PARAM(xen_mc_t) u_xen_mc) { @@ -1351,11 +1358,15 @@ long do_mca(XEN_GUEST_HANDLE_PARAM(xen_m struct vcpu *v =3D current; union { struct xen_mc_fetch *nat; +#ifdef CONFIG_COMPAT struct compat_mc_fetch *cmp; +#endif } mc_fetch; union { struct xen_mc_physcpuinfo *nat; +#ifdef CONFIG_COMPAT struct compat_mc_physcpuinfo *cmp; +#endif } mc_physcpuinfo; uint32_t flags, cmdflags; int nlcpu; --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -39,10 +39,12 @@ #include #include =20 +#ifdef CONFIG_COMPAT #include CHECK_pmu_cntr_pair; CHECK_pmu_data; CHECK_pmu_params; +#endif =20 static unsigned int __read_mostly opt_vpmu_enabled; unsigned int __read_mostly vpmu_mode =3D XENPMU_MODE_OFF; @@ -232,6 +234,7 @@ void vpmu_do_interrupt(struct cpu_user_r domid =3D sampled->domain->domain_id; =20 /* Store appropriate registers in xenpmu_data */ +#ifdef CONFIG_COMPAT /* FIXME: 32-bit PVH should go here as well */ if ( is_pv_32bit_vcpu(sampling) ) { @@ -254,6 +257,7 @@ void vpmu_do_interrupt(struct cpu_user_r *flags |=3D PMU_SAMPLE_USER; } else +#endif { struct xen_pmu_regs *r =3D &vpmu->xenpmu_data->pmu.r.regs; =20 @@ -448,7 +452,9 @@ static int vpmu_arch_initialise(struct v BUILD_BUG_ON(sizeof(struct xen_pmu_intel_ctxt) > XENPMU_CTXT_PAD_SZ); BUILD_BUG_ON(sizeof(struct xen_pmu_amd_ctxt) > XENPMU_CTXT_PAD_SZ); BUILD_BUG_ON(sizeof(struct xen_pmu_regs) > XENPMU_REGS_PAD_SZ); +#ifdef CONFIG_COMPAT BUILD_BUG_ON(sizeof(struct compat_pmu_regs) > XENPMU_REGS_PAD_SZ); +#endif =20 ASSERT(!(vpmu->flags & ~VPMU_AVAILABLE) && !vpmu->context); =20 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -64,7 +64,9 @@ #include #include #include +#ifdef CONFIG_COMPAT #include +#endif #include #include #include @@ -1020,11 +1022,13 @@ void arch_domain_creation_finished(struc hvm_domain_creation_finished(d); } =20 +#ifdef CONFIG_COMPAT #define xen_vcpu_guest_context vcpu_guest_context #define fpu_ctxt fpu_ctxt.x CHECK_FIELD_(struct, vcpu_guest_context, fpu_ctxt); #undef fpu_ctxt #undef xen_vcpu_guest_context +#endif =20 /* Called by XEN_DOMCTL_setvcpucontext and VCPUOP_initialise. */ int arch_set_info_guest( @@ -1045,7 +1049,11 @@ int arch_set_info_guest( * we expect the tools to DTRT even in compat-mode callers. */ compat =3D is_pv_32bit_domain(d); =20 +#ifdef CONFIG_COMPAT #define c(fld) (compat ? (c.cmp->fld) : (c.nat->fld)) +#else +#define c(fld) (c.nat->fld) +#endif flags =3D c(flags); =20 if ( is_pv_domain(d) ) @@ -1078,6 +1086,7 @@ int arch_set_info_guest( if ( !__addr_ok(c.nat->ldt_base) ) return -EINVAL; } +#ifdef CONFIG_COMPAT else { fixup_guest_stack_selector(d, c.cmp->user_regs.ss); @@ -1089,6 +1098,7 @@ int arch_set_info_guest( for ( i =3D 0; i < ARRAY_SIZE(c.cmp->trap_ctxt); i++ ) fixup_guest_code_selector(d, c.cmp->trap_ctxt[i].cs); } +#endif =20 /* LDT safety checks. */ if ( ((c(ldt_base) & (PAGE_SIZE - 1)) !=3D 0) || @@ -1119,6 +1129,7 @@ int arch_set_info_guest( memcpy(v->arch.pv.trap_ctxt, c.nat->trap_ctxt, sizeof(c.nat->trap_ctxt)); } +#ifdef CONFIG_COMPAT else { XLAT_cpu_user_regs(&v->arch.user_regs, &c.cmp->user_regs); @@ -1129,6 +1140,7 @@ int arch_set_info_guest( c.cmp->trap_ctxt + i); } } +#endif =20 if ( v->vcpu_id =3D=3D 0 && (c(vm_assist) & ~arch_vm_assist_valid_mask= (d)) ) return -EINVAL; @@ -1184,13 +1196,17 @@ int arch_set_info_guest( pfn =3D pagetable_get_pfn(v->arch.guest_table_user); fail |=3D xen_pfn_to_cr3(pfn) !=3D c.nat->ctrlreg[1]; } - } else { + } +#ifdef CONFIG_COMPAT + else + { l4_pgentry_t *l4tab =3D map_domain_page(_mfn(pfn)); =20 pfn =3D l4e_get_pfn(*l4tab); unmap_domain_page(l4tab); fail =3D compat_pfn_to_cr3(pfn) !=3D c.cmp->ctrlreg[3]; } +#endif =20 fail |=3D v->arch.pv.gdt_ents !=3D c(gdt_ents); for ( i =3D 0; !fail && i < nr_gdt_frames; ++i ) @@ -1293,6 +1309,7 @@ int arch_set_info_guest( =20 if ( !compat ) rc =3D pv_set_gdt(v, c.nat->gdt_frames, c.nat->gdt_ents); +#ifdef CONFIG_COMPAT else { unsigned long gdt_frames[ARRAY_SIZE(v->arch.pv.gdt_frames)]; @@ -1302,6 +1319,7 @@ int arch_set_info_guest( =20 rc =3D pv_set_gdt(v, gdt_frames, c.cmp->gdt_ents); } +#endif if ( rc !=3D 0 ) return rc; =20 @@ -1309,8 +1327,10 @@ int arch_set_info_guest( =20 if ( !compat ) cr3_mfn =3D _mfn(xen_cr3_to_pfn(c.nat->ctrlreg[3])); +#ifdef CONFIG_COMPAT else cr3_mfn =3D _mfn(compat_cr3_to_pfn(c.cmp->ctrlreg[3])); +#endif cr3_page =3D get_page_from_mfn(cr3_mfn, d); =20 if ( !cr3_page ) @@ -1817,9 +1837,13 @@ bool update_runstate_area(struct vcpu *v =20 if ( VM_ASSIST(v->domain, runstate_update_flag) ) { +#ifdef CONFIG_COMPAT guest_handle =3D has_32bit_shinfo(v->domain) ? &v->runstate_guest.compat.p->state_entry_time + 1 : &v->runstate_guest.native.p->state_entry_time + 1; +#else + guest_handle =3D &v->runstate_guest.p->state_entry_time + 1; +#endif guest_handle--; runstate.state_entry_time |=3D XEN_RUNSTATE_UPDATE; __raw_copy_to_guest(guest_handle, @@ -1827,6 +1851,7 @@ bool update_runstate_area(struct vcpu *v smp_wmb(); } =20 +#ifdef CONFIG_COMPAT if ( has_32bit_shinfo(v->domain) ) { struct compat_vcpu_runstate_info info; @@ -1836,6 +1861,7 @@ bool update_runstate_area(struct vcpu *v rc =3D true; } else +#endif rc =3D __copy_to_guest(runstate_guest(v), &runstate, 1) !=3D sizeof(runstate); =20 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -1384,18 +1384,24 @@ long arch_do_domctl( return ret; } =20 +#ifdef CONFIG_COMPAT #define xen_vcpu_guest_context vcpu_guest_context #define fpu_ctxt fpu_ctxt.x CHECK_FIELD_(struct, vcpu_guest_context, fpu_ctxt); #undef fpu_ctxt #undef xen_vcpu_guest_context +#endif =20 void arch_get_info_guest(struct vcpu *v, vcpu_guest_context_u c) { unsigned int i; const struct domain *d =3D v->domain; bool compat =3D is_pv_32bit_domain(d); +#ifdef CONFIG_COMPAT #define c(fld) (!compat ? (c.nat->fld) : (c.cmp->fld)) +#else +#define c(fld) (c.nat->fld) +#endif =20 memcpy(&c.nat->fpu_ctxt, v->arch.fpu_ctxt, sizeof(c.nat->fpu_ctxt)); if ( is_pv_domain(d) ) @@ -1413,6 +1419,7 @@ void arch_get_info_guest(struct vcpu *v, memcpy(c.nat->trap_ctxt, v->arch.pv.trap_ctxt, sizeof(c.nat->trap_ctxt)); } +#ifdef CONFIG_COMPAT else { XLAT_cpu_user_regs(&c.cmp->user_regs, &v->arch.user_regs); @@ -1423,6 +1430,7 @@ void arch_get_info_guest(struct vcpu *v, v->arch.pv.trap_ctxt + i); } } +#endif =20 for ( i =3D 0; i < ARRAY_SIZE(v->arch.dr); ++i ) c(debugreg[i] =3D v->arch.dr[i]); @@ -1468,8 +1476,10 @@ void arch_get_info_guest(struct vcpu *v, c(ldt_ents =3D v->arch.pv.ldt_ents); for ( i =3D 0; i < ARRAY_SIZE(v->arch.pv.gdt_frames); ++i ) c(gdt_frames[i] =3D v->arch.pv.gdt_frames[i]); +#ifdef CONFIG_COMPAT BUILD_BUG_ON(ARRAY_SIZE(c.nat->gdt_frames) !=3D ARRAY_SIZE(c.cmp->gdt_frames)); +#endif for ( ; i < ARRAY_SIZE(c.nat->gdt_frames); ++i ) c(gdt_frames[i] =3D 0); c(gdt_ents =3D v->arch.pv.gdt_ents); @@ -1504,6 +1514,7 @@ void arch_get_info_guest(struct vcpu *v, pagetable_is_null(v->arch.guest_table_user) ? 0 : xen_pfn_to_cr3(pagetable_get_pfn(v->arch.guest_table_use= r)); } +#ifdef CONFIG_COMPAT else { const l4_pgentry_t *l4e =3D @@ -1512,6 +1523,7 @@ void arch_get_info_guest(struct vcpu *v, c.cmp->ctrlreg[3] =3D compat_pfn_to_cr3(l4e_get_pfn(*l4e)); unmap_domain_page(l4e); } +#endif =20 if ( guest_kernel_mode(v, &v->arch.user_regs) ) c(flags |=3D VGCF_in_kernel); --- a/xen/arch/x86/efi/Makefile +++ b/xen/arch/x86/efi/Makefile @@ -8,13 +8,14 @@ cmd_objcopy_o_ihex =3D $(OBJCOPY) -I ihex =20 boot.init.o: buildid.o =20 -EFIOBJ :=3D boot.init.o pe.init.o ebmalloc.o compat.o runtime.o +EFIOBJ-y :=3D boot.init.o pe.init.o ebmalloc.o runtime.o +EFIOBJ-$(CONFIG_COMPAT) +=3D compat.o =20 $(call cc-option-add,cflags-stack-boundary,CC,-mpreferred-stack-boundary= =3D4) -$(EFIOBJ): CFLAGS-stack-boundary :=3D $(cflags-stack-boundary) +$(EFIOBJ-y): CFLAGS-stack-boundary :=3D $(cflags-stack-boundary) =20 obj-y :=3D stub.o -obj-$(XEN_BUILD_EFI) :=3D $(filter-out %.init.o,$(EFIOBJ)) -obj-bin-$(XEN_BUILD_EFI) :=3D $(filter %.init.o,$(EFIOBJ)) +obj-$(XEN_BUILD_EFI) :=3D $(filter-out %.init.o,$(EFIOBJ-y)) +obj-bin-$(XEN_BUILD_EFI) :=3D $(filter %.init.o,$(EFIOBJ-y)) extra-$(XEN_BUILD_EFI) +=3D buildid.o relocs-dummy.o nocov-$(XEN_BUILD_EFI) +=3D stub.o --- a/xen/arch/x86/hypercall.c +++ b/xen/arch/x86/hypercall.c @@ -21,10 +21,15 @@ =20 #include =20 +#ifdef CONFIG_COMPAT #define ARGS(x, n) \ [ __HYPERVISOR_ ## x ] =3D { n, n } #define COMP(x, n, c) \ [ __HYPERVISOR_ ## x ] =3D { n, c } +#else +#define ARGS(x, n) [ __HYPERVISOR_ ## x ] =3D { n } +#define COMP(x, n, c) ARGS(x, n) +#endif =20 const hypercall_args_t hypercall_args_table[NR_hypercalls] =3D { @@ -113,7 +118,11 @@ unsigned long hypercall_create_continuat =20 regs->rax =3D op; =20 +#ifdef CONFIG_COMPAT if ( !curr->hcall_compat ) +#else + if ( true ) +#endif { for ( i =3D 0; *p !=3D '\0'; i++ ) { --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -877,9 +877,11 @@ int __init dom0_construct_pv(struct doma pv_shim_setup_dom(d, l4start, v_start, vxenstore_start, vconsole_s= tart, vphysmap_start, si); =20 +#ifdef CONFIG_COMPAT if ( is_pv_32bit_domain(d) ) xlat_start_info(si, pv_shim ? XLAT_start_info_console_domU : XLAT_start_info_console_dom0); +#endif =20 /* Return to idle domain's page tables. */ mapcache_override_current(NULL); --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -27,8 +27,10 @@ #include #include #include +#ifdef CONFIG_COMPAT #include #include +#endif #include #include #include @@ -1615,10 +1617,12 @@ void __init noreturn __start_xen(unsigne BUILD_BUG_ON(sizeof(shared_info_t) > PAGE_SIZE); BUILD_BUG_ON(sizeof(struct vcpu_info) !=3D 64); =20 +#ifdef CONFIG_COMPAT BUILD_BUG_ON(sizeof_field(struct compat_platform_op, u) !=3D sizeof_field(struct compat_platform_op, u.pad)); BUILD_BUG_ON(sizeof(start_info_compat_t) > PAGE_SIZE); BUILD_BUG_ON(sizeof(struct compat_vcpu_info) !=3D 64); +#endif =20 /* Check definitions in public headers match internal defs. */ BUILD_BUG_ON(__HYPERVISOR_VIRT_START !=3D HYPERVISOR_VIRT_START); --- a/xen/arch/x86/oprofile/backtrace.c +++ b/xen/arch/x86/oprofile/backtrace.c @@ -27,7 +27,6 @@ struct __packed frame_head_32bit { uint32_t ret; }; typedef struct frame_head_32bit frame_head32_t; -DEFINE_COMPAT_HANDLE(frame_head32_t); =20 static struct frame_head * dump_hypervisor_backtrace(struct vcpu *vcpu, const struct frame_head *head, @@ -58,8 +57,10 @@ dump_guest_backtrace(struct vcpu *vcpu, { frame_head_t bufhead; =20 +#ifdef CONFIG_COMPAT if ( is_32bit_vcpu(vcpu) ) { + DEFINE_COMPAT_HANDLE(frame_head32_t); __compat_handle_const_frame_head32_t guest_head =3D { .c =3D (unsigned long)head }; frame_head32_t bufhead32; @@ -73,6 +74,7 @@ dump_guest_backtrace(struct vcpu *vcpu, bufhead.ret =3D bufhead32.ret; } else +#endif { XEN_GUEST_HANDLE_PARAM(const_frame_head_t) guest_head =3D const_guest_handle_from_ptr(head, frame_head_t); --- a/xen/arch/x86/oprofile/xenoprof.c +++ b/xen/arch/x86/oprofile/xenoprof.c @@ -12,7 +12,6 @@ #include #include #include -#include #include =20 #include "op_counter.h" @@ -54,6 +53,9 @@ int xenoprof_arch_ibs_counter(XEN_GUEST_ return 0; } =20 +#ifdef CONFIG_COMPAT +#include + int compat_oprof_arch_counter(XEN_GUEST_HANDLE_PARAM(void) arg) { struct compat_oprof_counter counter; @@ -73,6 +75,7 @@ int compat_oprof_arch_counter(XEN_GUEST_ =20 return 0; } +#endif =20 int xenoprofile_get_mode(struct vcpu *curr, const struct cpu_user_regs *re= gs) { --- a/xen/arch/x86/x86_64/Makefile +++ b/xen/arch/x86/x86_64/Makefile @@ -8,9 +8,9 @@ obj-y +=3D acpi_mmcfg.o obj-y +=3D mmconf-fam10h.o obj-y +=3D mmconfig_64.o obj-y +=3D mmconfig-shared.o -obj-y +=3D domain.o -obj-y +=3D cpu_idle.o -obj-y +=3D cpufreq.o +obj-$(CONFIG_COMPAT) +=3D domain.o +obj-$(CONFIG_COMPAT) +=3D cpu_idle.o +obj-$(CONFIG_COMPAT) +=3D cpufreq.o obj-bin-$(CONFIG_KEXEC) +=3D kexec_reloc.o =20 obj-$(CONFIG_CRASH_DEBUG) +=3D gdbstub.o --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -1347,7 +1347,9 @@ void set_gpfn_from_mfn(unsigned long mfn machine_to_phys_mapping[mfn] =3D entry; } =20 +#ifdef CONFIG_COMPAT #include "compat/mm.c" +#endif =20 /* * Local variables: --- a/xen/common/time.c +++ b/xen/common/time.c @@ -108,7 +108,7 @@ void update_domain_wallclock_time(struct sec =3D wc_sec + d->time_offset.seconds; shared_info(d, wc_sec) =3D sec; shared_info(d, wc_nsec) =3D wc_nsec; -#ifdef CONFIG_X86 +#if defined(CONFIG_X86) && defined(CONFIG_COMPAT) if ( likely(!has_32bit_shinfo(d)) ) d->shared_info->native.wc_sec_hi =3D sec >> 32; else --- a/xen/include/asm-x86/compat.h +++ b/xen/include/asm-x86/compat.h @@ -2,11 +2,15 @@ * compat.h */ =20 +#ifdef CONFIG_COMPAT + #define COMPAT_BITS_PER_LONG 32 =20 typedef uint32_t compat_ptr_t; typedef unsigned long full_ptr_t; =20 +#endif + struct domain; #ifdef CONFIG_PV32 int switch_compat(struct domain *); --- a/xen/include/asm-x86/hypercall.h +++ b/xen/include/asm-x86/hypercall.h @@ -23,7 +23,10 @@ typedef struct { } hypercall_table_t; =20 typedef struct { - uint8_t native, compat; + uint8_t native; +#ifdef CONFIG_COMPAT + uint8_t compat; +#endif } hypercall_args_t; =20 extern const hypercall_args_t hypercall_args_table[NR_hypercalls]; --- a/xen/include/asm-x86/shared.h +++ b/xen/include/asm-x86/shared.h @@ -1,6 +1,8 @@ #ifndef __XEN_X86_SHARED_H__ #define __XEN_X86_SHARED_H__ =20 +#ifdef CONFIG_COMPAT + #define nmi_reason(d) (!has_32bit_shinfo(d) ? \ (u32 *)&(d)->shared_info->native.arch.nmi_reason : \ (u32 *)&(d)->shared_info->compat.arch.nmi_reason) @@ -37,6 +39,34 @@ static inline void arch_set_##field(stru v->vcpu_info->compat.arch.field =3D val; \ } =20 +#else + +#define nmi_reason(d) (&(d)->shared_info->arch.nmi_reason) + +#define GET_SET_SHARED(type, field) \ +static inline type arch_get_##field(const struct domain *d) \ +{ \ + return d->shared_info->arch.field; \ +} \ +static inline void arch_set_##field(struct domain *d, \ + type val) \ +{ \ + d->shared_info->arch.field =3D val; \ +} + +#define GET_SET_VCPU(type, field) \ +static inline type arch_get_##field(const struct vcpu *v) \ +{ \ + return v->vcpu_info->arch.field; \ +} \ +static inline void arch_set_##field(struct vcpu *v, \ + type val) \ +{ \ + v->vcpu_info->arch.field =3D val; \ +} + +#endif + GET_SET_SHARED(unsigned long, max_pfn) GET_SET_SHARED(xen_pfn_t, pfn_to_mfn_frame_list_list) GET_SET_SHARED(unsigned long, nmi_reason) --- a/xen/include/xen/compat.h +++ b/xen/include/xen/compat.h @@ -5,10 +5,11 @@ #ifndef __XEN_COMPAT_H__ #define __XEN_COMPAT_H__ =20 -#ifdef CONFIG_COMPAT - #include #include + +#ifdef CONFIG_COMPAT + #include =20 #define __DEFINE_COMPAT_HANDLE(name, type) \ --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -1047,7 +1047,6 @@ static always_inline bool is_pv_vcpu(con return is_pv_domain(v->domain); } =20 -#ifdef CONFIG_COMPAT static always_inline bool is_pv_32bit_domain(const struct domain *d) { #ifdef CONFIG_PV32 @@ -1078,7 +1077,7 @@ static always_inline bool is_pv_64bit_vc { return is_pv_64bit_domain(v->domain); } -#endif + static always_inline bool is_hvm_domain(const struct domain *d) { return IS_ENABLED(CONFIG_HVM) &&