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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483bd68826asm220079295e9.0.2026.02.26.03.51.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Feb 2026 03:51:38 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 82f5fc2e-1309-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1772106699; x=1772711499; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lX9hIaB9WTE6h7+Wjpyh48oNfuDqQhQlogYAFoYLY7c=; b=lQnyGQpef4bwDXDEq0XlJct/7CAurJ2PUFl+4JIpaOAwYsrR39ruZRSP4Cx/oqS6oZ sPtYO+q5aKXvBwXi9giwCJBKl28WcxOFMd/73JBDJ5zjBKjrTMlkgQHFO9CQbah4NQfA OBPR13MmC2R4eMBO6tqr9ZU2k7OOsp7oc23m4MnqBJN3p14O1QGwMjBHxDcwtT8KI2Ly Gt882zXpKibg3i2ECRX9cupq4IEtqTfksBPTJJFGAkIX2nd4kA1LNe/9gsfXnLd4z+KP avEpt8zlCvZ84ZBWDJzRtK8Ja20kIiCJHWmsrzuBO/fmRhgf0UY6auSkDxzSrEvSLVoR YvFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772106699; x=1772711499; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=lX9hIaB9WTE6h7+Wjpyh48oNfuDqQhQlogYAFoYLY7c=; b=rz0VKU17bmmvZu8OBVfP29p7tJENBmpDRjOJyMBD6Z3JlNFZp/rwaAC/knZwgU7b8d TQWK0OPvKAjstgRd627eNz0ZRQh7MWtMSkPSyOhbYxBZRpb257AHyrWtC1DgjYS33/mL EHzi6gu0tCTt5N4JkCs0VCuJSqxGrVlA1L9Pg1slmhkHXF0di6hi06piDZ7Vd90gEp1N U/sS/4OBwRlbdi5EY27vdz1lCeaAMGTATOCI+U4G44siNFT7n69G+ZLJ+tMZd65vm7d/ 2B+D1Rv5LpgQmE5jTBfjk8Lb7ZFCF239CFbZ5HYvfrjrrSsEhGahlEXSLIwtZfLKHpJ+ ca0w== X-Gm-Message-State: AOJu0Yz4Hei1+ikQQeAarLbM0EkHvkIS8FvMNiaKDLbxUUmcCnJRbAg1 QPeZuY1bB5Nq3ULbRDzxaeSCltOspkL4usw7oa21Jw3Gme/LClVFA3zWEhDOTQ== X-Gm-Gg: ATEYQzw5o556W9VI+sIl4aiSdMUSsRcSL0U84aDF5lGSzi/vyPtpn8V7JKMJk2Umw2w 09FqC6s7fETIaztD2AeEe11b7zYuCMyfxxbAitNJvXIa1+adZIUdtJU9izkIBb+cQU0IhqoD46i 1CvFSFu57mR0dIkhmCF2MXYcyeqiDg5vVZ9N+f5BcNs6rZXil3CvxwYLOqPtP2Cs43NvvjuhvTY RRnfzF97FPo4CyxeDk4dV1viB9fZXTFUk09WZLbN5C64v8DG6e4zxF6fErduU3vXvqgELCg8DBG J0kfQWNcI+bj/3htA+S3+reh0JqVvnuWIG3/PwPTRzroaQlfKALBl6n7TNadNIQWItPLvRp7AWl mwjxvBZHTGNE/uXeu/iDKBkpydaWQFSbRxy2mc+YnwPaQAXXRfyshZs7Ypisp7d6c75WrrRMY/E PUiuz2SIgh6ERqlm83s1YcdNEtRmxwGntVt4JQD3bGrJeduK0zQOAqDPlzl3akHA0G5Q== X-Received: by 2002:a05:600c:a009:b0:483:b505:9db4 with SMTP id 5b1f17b1804b1-483c3df45e6mr36295685e9.31.1772106698894; Thu, 26 Feb 2026 03:51:38 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v6 11/14] xen/riscv: implement reprogram_timer() via SBI Date: Thu, 26 Feb 2026 12:51:11 +0100 Message-ID: X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1772106723148158500 Content-Type: text/plain; charset="utf-8" Implement reprogram_timer() on RISC-V using the standard SBI timer call. The privileged architecture only defines machine-mode timer interrupts (using mtime/mtimecmp). Therefore, timer services for S/HS/VS mode must be provided by M-mode via SBI calls. SSTC (Supervisor-mode Timer Control) is optional and is not supported on the boards available to me, so the only viable approach today is to program the timer through SBI. reprogram_timer() enables/disables the supervisor timer interrupt and programs the next timer deadline using sbi_set_timer(). If the SBI call fails, the code panics, because sbi_set_timer() is expected to return either 0 or -ENOSUPP (this has been stable from early OpenSBI versions to the latest ones). The SBI spec does not define a standard negative error code for this call, and without SSTC there is no alternative method to program the timer, so the SBI timer call must be available. reprogram_timer() currently returns int for compatibility with the existing prototype. While it might be cleaner to return bool, keeping the existing signature avoids premature changes in case sbi_set_timer() ever needs to return other values (based on which we could try to avoid panic-ing) in the future. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5 - v6: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Correct the comments in reprogram_timer(). - Move enablement of timer interrupt after sbi_set_timer() to avoid potentially receiving a timer interrupt between these 2 operations. --- Changes in v2: - Add TODO comment above sbi_set_timer() call. - Update the commit message. --- xen/arch/riscv/stubs.c | 5 ----- xen/arch/riscv/time.c | 43 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index eedf8bf9350a..2f3a0ce76af9 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -21,11 +21,6 @@ nodemask_t __read_mostly node_online_map =3D { { [0] =3D= 1UL } }; =20 /* time.c */ =20 -int reprogram_timer(s_time_t timeout) -{ - BUG_ON("unimplemented"); -} - void send_timer_event(struct vcpu *v) { BUG_ON("unimplemented"); diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index 2c7af0a5d63b..7efa76fdbcb1 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -7,6 +7,9 @@ #include #include =20 +#include +#include + unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */ uint64_t __ro_after_init boot_clock_cycles; =20 @@ -40,6 +43,46 @@ static void __init preinit_dt_xen_time(void) cpu_khz =3D rate / 1000; } =20 +int reprogram_timer(s_time_t timeout) +{ + uint64_t deadline, now; + int rc; + + if ( timeout =3D=3D 0 ) + { + /* Disable timer interrupt */ + csr_clear(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; + } + + deadline =3D ns_to_ticks(timeout) + boot_clock_cycles; + now =3D get_cycles(); + if ( deadline <=3D now ) + return 0; + + /* + * TODO: When the SSTC extension is supported, it would be preferable = to + * use the supervisor timer registers directly here for better + * performance, since an SBI call and mode switch would no longer + * be required. + * + * This would also reduce reliance on a specific SBI implementat= ion. + * For example, it is not ideal to panic() if sbi_set_timer() re= turns + * a non-zero value. Currently it can return 0 or -ENOSUPP, and + * without SSTC we still need an implementation because only the + * M-mode timer is available, and it can only be programmed in + * M-mode. + */ + if ( (rc =3D sbi_set_timer(deadline)) ) + panic("%s: timer wasn't set because: %d\n", __func__, rc); + + /* Enable timer interrupt */ + csr_set(CSR_SIE, BIT(IRQ_S_TIMER, UL)); + + return 1; +} + void __init preinit_xen_time(void) { if ( acpi_disabled ) --=20 2.53.0