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[109.243.64.225]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac7c018556bsm929934566b.156.2025.04.08.08.57.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Apr 2025 08:57:29 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2d6a55dd-1492-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1744127850; x=1744732650; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xpeQYUWMQ0EnXPhGUr9CwT2CGE1bPu9ktFLlbeAAZLE=; b=EnztfdtDE76uFITi52RB2yffM3YmtgRORIfEZMJPVShuAj9PM5kqiqCdiBcFbzWyeD 2xZef6gnRIeaY8XsIEch64pBCAjxAxRyxO9/ts6N3FgvtWmirU/2txCagM5UgbamOWRc KrGCFBd2sFdaeNpSTtcCKNCc7Yd+C8oVzioYCvoezAQt4gHH3DOvAE2FzBXfblW1MMlY 3EUPkSURAS478wqIlF7dRNp9ofNxGvjDRbJxDBCg1XxjoM+kvoaPqP1H6FujMJ/vFvPB tI+pYfqY6okGCNmxZEY+Qq0xaBgQDtvf0JU/QhAxGDq0UFG7S+yvoXOt0Xyo6EPP0qwL /yRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1744127850; x=1744732650; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xpeQYUWMQ0EnXPhGUr9CwT2CGE1bPu9ktFLlbeAAZLE=; b=sF7rMK0iRkOk0ePdto/DMFPe2l5vIqZfChIMLW8xOkxbx3IPslhXoy0oQT5g8kwNor 7ssZ49atMxwBkyNFSkDUOPFhtZWQSz+Ut4zVriVhB0tO2dnPH4soRNCrIYtNBx4Yf/+A v6OL75wF+DFVWViXWOWo58QTrRHTZvYNg9C/eXgmDAKXpnbma92pewMjxsMKHB3qkIfk GT+ZaqxlhFM9ZJ87nVDTmgQX1sYJ+aV7lEh+lilRsF6AEgPg0NyqimknnUYb040jfG6T aj0HcTss/Cy01TwxCt4U2mg/RoI+c6mxWzSqVUDWiF7nFhdQwN5ketGVpBYdqSXbp/k1 rCWg== X-Gm-Message-State: AOJu0YwZomf5I32b+fBpUBwOBnWUgNY/wCIkw+CD0uGU5vb522/x+4Az Rj4eZuPBIqwDLNBUlAjj9RFmmFlazGauxVQOzpNzmouMaMsTshOr4n1uMw== X-Gm-Gg: ASbGncsVIWn9x5SPi3bxUBftXXgIiGE1uPj2hFAdqrtGJpl3246RIfNCEBGAZOvwJKi pffPaQLFNzh5uya/FUi1ACmx082mm3x13nlGu11bc7lZjpTYsOntFqdMGZ3QKSMm0sfMb1HPzOE PoalE/9ozZg514FXAyhFq1WCfGJDh2SwD0nLzEkNgUIlDeWsv6+udk8Cpb4fZTpU92JxJyUu7pl C76Mn3M2AShWe6zjQhKfvfVoMVXjjelmF9zmhLFyBZTwA3Nd1EAaP6kbUwMh8XpGM4EAtRuvRI7 B+BmcSxB1qxVj/IuoX4hSfWn7MM+BzyGDXLb9gwnoWOk9t5bcqKcbQ3n0z45b8eSpovXSxzVrT8 68HU94Mi/xyMzzBJKypZD923t X-Google-Smtp-Source: AGHT+IEn04y7KC86eE2BNh70/HPXwqPH/Y/Yt0uP5OBEdcsZQ7+/Gzni+H8MI0kgZ0n6U3pjDLL+rQ== X-Received: by 2002:a17:907:1ca7:b0:ac4:85b:f973 with SMTP id a640c23a62f3a-ac7d1819306mr1292149166b.34.1744127849988; Tue, 08 Apr 2025 08:57:29 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid() implementation Date: Tue, 8 Apr 2025 17:57:10 +0200 Message-ID: X-Mailer: git-send-email 2.49.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1744127882236019000 Content-Type: text/plain; charset="utf-8" Implements riscv_of_processor_hartid() to get the hart ID of the given device tree node and do some checks if CPU is available and given device tree node has proper riscv,isa property. As a helper function of_get_cpu_hwid() is introduced to deal specifically with reg propery of a CPU device node. Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/include/asm/smp.h | 3 ++ xen/arch/riscv/smpboot.c | 68 ++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+) diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/= smp.h index 188c033718..9b68f1e27a 100644 --- a/xen/arch/riscv/include/asm/smp.h +++ b/xen/arch/riscv/include/asm/smp.h @@ -26,6 +26,9 @@ static inline void set_cpuid_to_hartid(unsigned long cpui= d, =20 void setup_tp(unsigned int cpuid); =20 +struct dt_device_node; +int riscv_of_processor_hartid(struct dt_device_node *node, unsigned long *= hart); + void smp_clear_cpu_maps(void); =20 #endif diff --git a/xen/arch/riscv/smpboot.c b/xen/arch/riscv/smpboot.c index 0f4dcc28e1..3193639f00 100644 --- a/xen/arch/riscv/smpboot.c +++ b/xen/arch/riscv/smpboot.c @@ -1,5 +1,8 @@ #include +#include +#include #include +#include =20 cpumask_t cpu_online_map; cpumask_t cpu_present_map; @@ -13,3 +16,68 @@ void __init smp_clear_cpu_maps(void) cpumask_set_cpu(0, &cpu_online_map); cpumask_copy(&cpu_present_map, &cpu_possible_map); } + +/** + * of_get_cpu_hwid - Get the hardware ID from a CPU device node + * + * @cpun: CPU number(logical index) for which device node is required + * @thread: The local thread number to get the hardware ID for. + * + * Return: The hardware ID for the CPU node or ~0ULL if not found. + */ +static uint64_t of_get_cpu_hwid(struct dt_device_node *cpun, unsigned int = thread) +{ + const __be32 *cell; + int ac; + uint32_t len; + + ac =3D dt_n_addr_cells(cpun); + cell =3D dt_get_property(cpun, "reg", &len); + if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) ) + return ~0ULL; + + cell +=3D ac * thread; + return dt_read_number(cell, ac); +} + +/* + * Returns the hart ID of the given device tree node, or -ENODEV if the no= de + * isn't an enabled and valid RISC-V hart node. + */ +int riscv_of_processor_hartid(struct dt_device_node *node, unsigned long *= hart) +{ + const char *isa; + + if ( !dt_device_is_compatible(node, "riscv") ) + { + printk("Found incompatible CPU\n"); + return -ENODEV; + } + + *hart =3D (unsigned long) of_get_cpu_hwid(node, 0); + if ( *hart =3D=3D ~0UL ) + { + printk("Found CPU without hart ID\n"); + return -ENODEV; + } + + if ( !dt_device_is_available(node)) + { + printk("CPU with hartid=3D%lu is not available\n", *hart); + return -ENODEV; + } + + if ( dt_property_read_string(node, "riscv,isa", &isa) ) + { + printk("CPU with hartid=3D%lu has no \"riscv,isa\" property\n", *h= art); + return -ENODEV; + } + + if ( isa[0] !=3D 'r' || isa[1] !=3D 'v' ) + { + printk("CPU with hartid=3D%lu has an invalid ISA of \"%s\"\n", *ha= rt, isa); + return -ENODEV; + } + + return 0; +} --=20 2.49.0