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charset="utf-8" One of the changes comprising the fixes for XSA-378 disallows replacing MMIO mappings by unintended (for this purpose) code paths. This means we need to be more careful about the mappings put in place in this range - mappings should be created exactly once: - iommu_hwdom_init() comes first; it should avoid the first Mb, - pvh_populate_p2m() should insert identity mappings only into ranges not populated as RAM, - pvh_setup_acpi() should again avoid the first Mb, which was already dealt with at that point. Fixes: 753cb68e6530 ("x86/p2m: guard (in particular) identity mapping entri= es") Signed-off-by: Jan Beulich --- Note: Conflicts with the previously submitted "IOMMU/x86: perform PV Dom0 mappings in batches". --- a/xen/arch/x86/hvm/dom0_build.c +++ b/xen/arch/x86/hvm/dom0_build.c @@ -430,17 +430,6 @@ static int __init pvh_populate_p2m(struc int rc; #define MB1_PAGES PFN_DOWN(MB(1)) =20 - /* - * Memory below 1MB is identity mapped initially. RAM regions are - * populated and copied below, replacing the respective mappings. - */ - rc =3D modify_identity_mmio(d, 0, MB1_PAGES, true); - if ( rc ) - { - printk("Failed to identity map low 1MB: %d\n", rc); - return rc; - } - /* Populate memory map. */ for ( i =3D 0; i < d->arch.nr_e820; i++ ) { @@ -472,6 +461,23 @@ static int __init pvh_populate_p2m(struc } } =20 + /* Non-RAM regions of space below 1MB get identity mapped. */ + for ( i =3D rc =3D 0; i < MB1_PAGES; ++i ) + { + p2m_type_t p2mt; + + if ( mfn_eq(get_gfn_query(d, i, &p2mt), INVALID_MFN) ) + rc =3D set_mmio_p2m_entry(d, _gfn(i), _mfn(i), PAGE_ORDER_4K); + else + ASSERT(p2mt =3D=3D p2m_ram_rw); + put_gfn(d, i); + if ( rc ) + { + printk("Failed to identity map PFN %x: %d\n", i, rc); + return rc; + } + } + if ( cpu_has_vmx && paging_mode_hap(d) && !vmx_unrestricted_guest(v) ) { /* @@ -1095,6 +1101,17 @@ static int __init pvh_setup_acpi(struct nr_pages =3D PFN_UP((d->arch.e820[i].addr & ~PAGE_MASK) + d->arch.e820[i].size); =20 + /* Memory below 1MB has been dealt with by pvh_populate_p2m(). */ + if ( pfn < PFN_DOWN(MB(1)) ) + { + if ( pfn + nr_pages <=3D PFN_DOWN(MB(1)) ) + continue; + + /* This shouldn't happen, but is easy to deal with. */ + nr_pages -=3D PFN_DOWN(MB(1)) - pfn; + pfn =3D PFN_DOWN(MB(1)); + } + rc =3D modify_identity_mmio(d, pfn, nr_pages, true); if ( rc ) { --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -337,7 +337,13 @@ void __hwdom_init arch_iommu_hwdom_init( max_pfn =3D (GB(4) >> PAGE_SHIFT) - 1; top =3D max(max_pdx, pfn_to_pdx(max_pfn) + 1); =20 - for ( i =3D 0; i < top; i++ ) + /* + * First Mb will get mapped in one go by pvh_populate_p2m(). Avoid + * setting up potentially conflicting mappings here. + */ + i =3D paging_mode_translate(d) ? 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charset="utf-8" One of the changes comprising the fixes for XSA-378 disallows replacing MMIO mappings by unintended (for this purpose) code paths. At least in the case of PVH Dom0 hitting an RMRR covered by an E820 ACPI region, this is too strict. Generally short-circuit requests establishing the same kind of mapping that's already in place. Further permit "access" to differ in the "executable" attribute. While ideally only ROM regions would get mapped with X set, getting there is quite a bit of work. Therefore, as a temporary measure, permit X to vary. For Dom0 the more permissive of the types will be used, while for DomU it'll be the more restrictive one. While there, also add a log message to the other domain_crash() invocation that did prevent PVH Dom0 from coming up after the XSA-378 changes. Fixes: 753cb68e6530 ("x86/p2m: guard (in particular) identity mapping entri= es") Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -958,9 +958,13 @@ guest_physmap_add_entry(struct domain *d if ( p2m_is_special(ot) ) { /* Don't permit unmapping grant/foreign/direct-MMIO this way. = */ - domain_crash(d); p2m_unlock(p2m); - =20 + printk(XENLOG_G_ERR + "%pd: GFN %lx (%lx:%u:%u) -> (%lx:%u:%u) not permitted\= n", + d, gfn_x(gfn) + i, + mfn_x(omfn), ot, a, + mfn_x(mfn) + i, t, p2m->default_access); + domain_crash(d); return -EPERM; } else if ( p2m_is_ram(ot) && !p2m_is_paged(ot) ) @@ -1302,9 +1306,50 @@ static int set_typed_p2m_entry(struct do } if ( p2m_is_special(ot) ) { - gfn_unlock(p2m, gfn, order); - domain_crash(d); - return -EPERM; + bool done =3D false, bad =3D true; + + /* Special-case (almost) identical mappings. */ + if ( mfn_eq(mfn, omfn) && gfn_p2mt =3D=3D ot ) + { + /* + * For MMIO allow X to differ in the requests (to cover for + * set_identity_p2m_entry() and set_mmio_p2m_entry() differing= in + * the way they specify "access"). For the hardware domain put= (or + * leave) in place the more permissive of the two possibilitie= s, + * while for DomU-s go with the more restrictive variant. + */ + if ( gfn_p2mt =3D=3D p2m_mmio_direct && + access <=3D p2m_access_rwx && + (access ^ a) =3D=3D p2m_access_x ) + { + if ( is_hardware_domain(d) ) + access |=3D p2m_access_x; + else + access &=3D ~p2m_access_x; + bad =3D access =3D=3D p2m_access_n; + } + + if ( access =3D=3D a ) + done =3D true; + } + + if ( done ) + { + gfn_unlock(p2m, gfn, order); + return 0; + } + + if ( bad ) + { + gfn_unlock(p2m, gfn, order); + printk(XENLOG_G_ERR + "%pd: GFN %lx (%lx:%u:%u:%u) -> (%lx:%u:%u:%u) not perm= itted\n", + d, gfn_l, + mfn_x(omfn), cur_order, ot, a, + mfn_x(mfn), order, gfn_p2mt, access); + domain_crash(d); + return -EPERM; + } } else if ( p2m_is_ram(ot) ) { From nobody Fri Nov 29 18:51:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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charset="utf-8" Assuming that the accounting for IOMMU page tables will also take care of the P2M needs was wrong: dom0_paging_pages() can determine a far higher value, high enough for the system to run out of memory while setting up Dom0. Hence in the case of shared page tables the larger of the two values needs to be used (without shared page tables the sum of both continues to be applicable). While there also account for two further aspects in the PV case: With "iommu=3Ddom0-passthrough" no IOMMU page tables would get allocated, so none need accounting for. And if shadow mode is to be enabled, setting aside a suitable amount for the P2M pool to get populated is also necessary (i.e. similar to the non-shared-page-tables case of PVH). Signed-off-by: Jan Beulich --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -318,7 +318,7 @@ unsigned long __init dom0_compute_nr_pag struct domain *d, struct elf_dom_parms *parms, unsigned long initrd_le= n) { nodeid_t node; - unsigned long avail =3D 0, nr_pages, min_pages, max_pages; + unsigned long avail =3D 0, nr_pages, min_pages, max_pages, iommu_pages= =3D 0; bool need_paging; =20 /* The ordering of operands is to work around a clang5 issue. */ @@ -337,18 +337,23 @@ unsigned long __init dom0_compute_nr_pag avail -=3D d->max_vcpus - 1; =20 /* Reserve memory for iommu_dom0_init() (rough estimate). */ - if ( is_iommu_enabled(d) ) + if ( is_iommu_enabled(d) && !iommu_hwdom_passthrough ) { unsigned int s; =20 for ( s =3D 9; s < BITS_PER_LONG; s +=3D 9 ) - avail -=3D max_pdx >> s; + iommu_pages +=3D max_pdx >> s; + + avail -=3D iommu_pages; } =20 - need_paging =3D is_hvm_domain(d) && - (!iommu_use_hap_pt(d) || !paging_mode_hap(d)); + need_paging =3D is_hvm_domain(d) + ? !iommu_use_hap_pt(d) || !paging_mode_hap(d) + : opt_dom0_shadow; for ( ; ; need_paging =3D false ) { + unsigned long paging_pages; + nr_pages =3D get_memsize(&dom0_size, avail); min_pages =3D get_memsize(&dom0_min_size, avail); max_pages =3D get_memsize(&dom0_max_size, avail); @@ -377,11 +382,20 @@ unsigned long __init dom0_compute_nr_pag nr_pages =3D min(nr_pages, max_pages); nr_pages =3D min(nr_pages, avail); =20 - if ( !need_paging ) - break; + paging_pages =3D paging_mode_enabled(d) || need_paging + ? dom0_paging_pages(d, nr_pages) : 0; =20 /* Reserve memory for shadow or HAP. */ - avail -=3D dom0_paging_pages(d, nr_pages); + if ( !need_paging ) + { + if ( paging_pages <=3D iommu_pages ) + break; + + avail -=3D paging_pages - iommu_pages; + } + else + avail -=3D paging_pages; + iommu_pages =3D paging_pages; } =20 if ( is_pv_domain(d) && From nobody Fri Nov 29 18:51:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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charset="utf-8" Leaving shadow setup just to the L1TF tasklet means running Dom0 on a minimally acceptable shadow memory pool, rather than what normally would be used (also, for example, for PVH). Populate the pool before triggering the tasklet, on a best effort basis (again like done for PVH). Signed-off-by: Jan Beulich Acked-by: Tim Deegan --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -1298,7 +1298,7 @@ int shadow_set_allocation(struct domain { struct page_info *sp; =20 - ASSERT(paging_locked_by_me(d)); + ASSERT(paging_locked_by_me(d) || system_state < SYS_STATE_active); =20 if ( pages > 0 ) { --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -21,6 +21,7 @@ #include #include #include +#include =20 /* Allow ring-3 access in long mode as guest cannot use ring 1 ... */ #define BASE_PROT (_PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_USER) @@ -933,7 +934,17 @@ int __init dom0_construct_pv(struct doma #ifdef CONFIG_SHADOW_PAGING if ( opt_dom0_shadow ) { + bool preempted; + printk("Switching dom0 to using shadow paging\n"); + + do { + preempted =3D false; + shadow_set_allocation(d, dom0_paging_pages(d, nr_pages), + &preempted); + process_pending_softirqs(); + } while ( preempted ); + tasklet_schedule(&d->arch.paging.shadow.pv_l1tf_tasklet); } #endif