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charset="utf-8" At least some vPMU functions will be invoked (and hence can further be speculated into) even in the vPMU-disabled case. Convert vpmu_ops to the standard single-instance model being a prerequisite to engaging the alternative_call() machinery, and convert all respective calls. Note that this requires vpmu_init() to become a pre-SMP initcall. This change then also helps performance. To replace a few vpmu->arch_vpmu_ops NULL checks, introduce a new VPMU_INITIALIZED state, such that in the absence of any other suitable vmpu_is_set() checks this state can be checked for. While adding the inclusion of xen/err.h, also prune other xen/*.h inclusions. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -17,12 +17,12 @@ * * Author: Haitao Shan */ -#include -#include -#include -#include #include +#include #include +#include +#include +#include #include #include #include @@ -49,6 +49,7 @@ CHECK_pmu_params; static unsigned int __read_mostly opt_vpmu_enabled; unsigned int __read_mostly vpmu_mode =3D XENPMU_MODE_OFF; unsigned int __read_mostly vpmu_features =3D 0; +static struct arch_vpmu_ops __read_mostly vpmu_ops; =20 static DEFINE_SPINLOCK(vpmu_lock); static unsigned vpmu_count; @@ -120,7 +121,6 @@ int vpmu_do_msr(unsigned int msr, uint64 { struct vcpu *curr =3D current; struct vpmu_struct *vpmu; - const struct arch_vpmu_ops *ops; int ret =3D 0; =20 /* @@ -133,14 +133,13 @@ int vpmu_do_msr(unsigned int msr, uint64 goto nop; =20 vpmu =3D vcpu_vpmu(curr); - ops =3D vpmu->arch_vpmu_ops; - if ( !ops ) + if ( !vpmu_is_set(vpmu, VPMU_INITIALIZED) ) goto nop; =20 - if ( is_write && ops->do_wrmsr ) - ret =3D ops->do_wrmsr(msr, *msr_content, supported); - else if ( !is_write && ops->do_rdmsr ) - ret =3D ops->do_rdmsr(msr, msr_content); + if ( is_write && vpmu_ops.do_wrmsr ) + ret =3D alternative_call(vpmu_ops.do_wrmsr, msr, *msr_content, sup= ported); + else if ( !is_write && vpmu_ops.do_rdmsr ) + ret =3D alternative_call(vpmu_ops.do_rdmsr, msr, msr_content); else goto nop; =20 @@ -153,7 +152,7 @@ int vpmu_do_msr(unsigned int msr, uint64 vpmu_is_set(vpmu, VPMU_CACHED) ) { vpmu_set(vpmu, VPMU_CONTEXT_SAVE); - ops->arch_vpmu_save(curr, 0); + alternative_vcall(vpmu_ops.arch_vpmu_save, curr, 0); vpmu_reset(vpmu, VPMU_CONTEXT_SAVE | VPMU_CONTEXT_LOADED); } =20 @@ -202,7 +201,7 @@ void vpmu_do_interrupt(struct cpu_user_r sampling =3D sampled; =20 vpmu =3D vcpu_vpmu(sampling); - if ( !vpmu->arch_vpmu_ops ) + if ( !vpmu_is_set(vpmu, VPMU_INITIALIZED) ) return; =20 /* PV(H) guest */ @@ -220,7 +219,7 @@ void vpmu_do_interrupt(struct cpu_user_r =20 /* PV guest will be reading PMU MSRs from xenpmu_data */ vpmu_set(vpmu, VPMU_CONTEXT_SAVE | VPMU_CONTEXT_LOADED); - vpmu->arch_vpmu_ops->arch_vpmu_save(sampling, 1); + alternative_vcall(vpmu_ops.arch_vpmu_save, sampling, 1); vpmu_reset(vpmu, VPMU_CONTEXT_SAVE | VPMU_CONTEXT_LOADED); =20 if ( is_hvm_vcpu(sampled) ) @@ -321,7 +320,7 @@ void vpmu_do_interrupt(struct cpu_user_r /* We don't support (yet) HVM dom0 */ ASSERT(sampling =3D=3D sampled); =20 - if ( !vpmu->arch_vpmu_ops->do_interrupt(regs) || + if ( !alternative_call(vpmu_ops.do_interrupt, regs) || !is_vlapic_lvtpc_enabled(vlapic) ) return; =20 @@ -349,8 +348,7 @@ static void vpmu_save_force(void *arg) =20 vpmu_set(vpmu, VPMU_CONTEXT_SAVE); =20 - if ( vpmu->arch_vpmu_ops ) - (void)vpmu->arch_vpmu_ops->arch_vpmu_save(v, 0); + alternative_vcall(vpmu_ops.arch_vpmu_save, v, 0); =20 vpmu_reset(vpmu, VPMU_CONTEXT_SAVE); =20 @@ -368,9 +366,8 @@ void vpmu_save(struct vcpu *v) vpmu->last_pcpu =3D pcpu; per_cpu(last_vcpu, pcpu) =3D v; =20 - if ( vpmu->arch_vpmu_ops ) - if ( vpmu->arch_vpmu_ops->arch_vpmu_save(v, 0) ) - vpmu_reset(vpmu, VPMU_CONTEXT_LOADED); + if ( alternative_call(vpmu_ops.arch_vpmu_save, v, 0) ) + vpmu_reset(vpmu, VPMU_CONTEXT_LOADED); =20 apic_write(APIC_LVTPC, PMU_APIC_VECTOR | APIC_LVT_MASKED); } @@ -426,13 +423,13 @@ int vpmu_load(struct vcpu *v, bool_t fro vpmu_is_set(vpmu, VPMU_CACHED)) ) return 0; =20 - if ( vpmu->arch_vpmu_ops && vpmu->arch_vpmu_ops->arch_vpmu_load ) + if ( vpmu_ops.arch_vpmu_load ) { int ret; =20 apic_write(APIC_LVTPC, vpmu->hw_lapic_lvtpc); /* Arch code needs to set VPMU_CONTEXT_LOADED */ - ret =3D vpmu->arch_vpmu_ops->arch_vpmu_load(v, from_guest); + ret =3D alternative_call(vpmu_ops.arch_vpmu_load, v, from_guest); if ( ret ) { apic_write(APIC_LVTPC, vpmu->hw_lapic_lvtpc | APIC_LVT_MASKED); @@ -572,7 +569,7 @@ static void vpmu_arch_destroy(struct vcp on_selected_cpus(cpumask_of(vpmu->last_pcpu), vpmu_clear_last, v, 1); =20 - if ( vpmu->arch_vpmu_ops && vpmu->arch_vpmu_ops->arch_vpmu_destroy ) + if ( vpmu_ops.arch_vpmu_destroy ) { /* * Unload VPMU first if VPMU_CONTEXT_LOADED being set. @@ -582,7 +579,7 @@ static void vpmu_arch_destroy(struct vcp on_selected_cpus(cpumask_of(vcpu_vpmu(v)->last_pcpu), vpmu_save_force, v, 1); =20 - vpmu->arch_vpmu_ops->arch_vpmu_destroy(v); + alternative_vcall(vpmu_ops.arch_vpmu_destroy, v); } =20 vpmu_reset(vpmu, VPMU_CONTEXT_ALLOCATED); @@ -689,10 +686,9 @@ static void pvpmu_finish(struct domain * /* Dump some vpmu information to console. Used in keyhandler dump_domains(= ). */ void vpmu_dump(struct vcpu *v) { - struct vpmu_struct *vpmu =3D vcpu_vpmu(v); - - if ( vpmu->arch_vpmu_ops && vpmu->arch_vpmu_ops->arch_vpmu_dump ) - vpmu->arch_vpmu_ops->arch_vpmu_dump(v); + if ( vpmu_is_set(vcpu_vpmu(v), VPMU_INITIALIZED) && + vpmu_ops.arch_vpmu_dump ) + alternative_vcall(vpmu_ops.arch_vpmu_dump, v); } =20 long do_xenpmu_op(unsigned int op, XEN_GUEST_HANDLE_PARAM(xen_pmu_params_t= ) arg) @@ -870,6 +866,7 @@ static struct notifier_block cpu_nfb =3D { static int __init vpmu_init(void) { int vendor =3D current_cpu_data.x86_vendor; + const struct arch_vpmu_ops *ops =3D NULL; =20 if ( !opt_vpmu_enabled ) return 0; @@ -886,36 +883,36 @@ static int __init vpmu_init(void) switch ( vendor ) { case X86_VENDOR_AMD: - if ( amd_vpmu_init() ) - vpmu_mode =3D XENPMU_MODE_OFF; + ops =3D amd_vpmu_init(); break; =20 case X86_VENDOR_HYGON: - if ( hygon_vpmu_init() ) - vpmu_mode =3D XENPMU_MODE_OFF; + ops =3D hygon_vpmu_init(); break; =20 case X86_VENDOR_INTEL: - if ( core2_vpmu_init() ) - vpmu_mode =3D XENPMU_MODE_OFF; + ops =3D core2_vpmu_init(); break; =20 default: printk(XENLOG_WARNING "VPMU: Unknown CPU vendor: %d. " "Turning VPMU off.\n", vendor); - vpmu_mode =3D XENPMU_MODE_OFF; break; } =20 - if ( vpmu_mode !=3D XENPMU_MODE_OFF ) + if ( !IS_ERR_OR_NULL(ops) ) { + vpmu_ops =3D *ops; register_cpu_notifier(&cpu_nfb); printk(XENLOG_INFO "VPMU: version " __stringify(XENPMU_VER_MAJ) "." __stringify(XENPMU_VER_MIN) "\n"); } else + { + vpmu_mode =3D XENPMU_MODE_OFF; opt_vpmu_enabled =3D 0; + } =20 return 0; } -__initcall(vpmu_init); +presmp_initcall(vpmu_init); --- a/xen/arch/x86/cpu/vpmu_amd.c +++ b/xen/arch/x86/cpu/vpmu_amd.c @@ -21,9 +21,9 @@ * */ =20 -#include +#include #include -#include +#include #include #include #include @@ -483,7 +483,7 @@ static void amd_vpmu_dump(const struct v } } =20 -static const struct arch_vpmu_ops amd_vpmu_ops =3D { +static const struct arch_vpmu_ops __initconstrel amd_vpmu_ops =3D { .do_wrmsr =3D amd_vpmu_do_wrmsr, .do_rdmsr =3D amd_vpmu_do_rdmsr, .do_interrupt =3D amd_vpmu_do_interrupt, @@ -529,13 +529,12 @@ int svm_vpmu_initialise(struct vcpu *v) offsetof(struct xen_pmu_amd_ctxt, regs)); } =20 - vpmu->arch_vpmu_ops =3D &amd_vpmu_ops; + vpmu_set(vpmu, VPMU_INITIALIZED | VPMU_CONTEXT_ALLOCATED); =20 - vpmu_set(vpmu, VPMU_CONTEXT_ALLOCATED); return 0; } =20 -static int __init common_init(void) +static const struct arch_vpmu_ops *__init common_init(void) { unsigned int i; =20 @@ -543,7 +542,7 @@ static int __init common_init(void) { printk(XENLOG_WARNING "VPMU: Unsupported CPU family %#x\n", current_cpu_data.x86); - return -EINVAL; + return ERR_PTR(-EINVAL); } =20 if ( sizeof(struct xen_pmu_data) + @@ -553,7 +552,7 @@ static int __init common_init(void) "VPMU: Register bank does not fit into VPMU shared page\n"); counters =3D ctrls =3D NULL; num_counters =3D 0; - return -ENOSPC; + return ERR_PTR(-ENOSPC); } =20 for ( i =3D 0; i < num_counters; i++ ) @@ -562,10 +561,10 @@ static int __init common_init(void) ctrl_rsvd[i] &=3D CTRL_RSVD_MASK; } =20 - return 0; + return &amd_vpmu_ops; } =20 -int __init amd_vpmu_init(void) +const struct arch_vpmu_ops *__init amd_vpmu_init(void) { switch ( current_cpu_data.x86 ) { @@ -592,7 +591,7 @@ int __init amd_vpmu_init(void) return common_init(); } =20 -int __init hygon_vpmu_init(void) +const struct arch_vpmu_ops *__init hygon_vpmu_init(void) { switch ( current_cpu_data.x86 ) { --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -18,9 +18,9 @@ * Author: Haitao Shan */ =20 +#include #include #include -#include #include #include #include @@ -819,7 +819,7 @@ static void core2_vpmu_destroy(struct vc vpmu_clear(vpmu); } =20 -static const struct arch_vpmu_ops core2_vpmu_ops =3D { +static const struct arch_vpmu_ops __initconstrel core2_vpmu_ops =3D { .do_wrmsr =3D core2_vpmu_do_wrmsr, .do_rdmsr =3D core2_vpmu_do_rdmsr, .do_interrupt =3D core2_vpmu_do_interrupt, @@ -893,12 +893,12 @@ int vmx_vpmu_initialise(struct vcpu *v) if ( is_pv_vcpu(v) && !core2_vpmu_alloc_resource(v) ) return -EIO; =20 - vpmu->arch_vpmu_ops =3D &core2_vpmu_ops; + vpmu_set(vpmu, VPMU_INITIALIZED); =20 return 0; } =20 -int __init core2_vpmu_init(void) +const struct arch_vpmu_ops *__init core2_vpmu_init(void) { unsigned int version =3D 0; unsigned int i; @@ -921,13 +921,13 @@ int __init core2_vpmu_init(void) default: printk(XENLOG_WARNING "VPMU: PMU version %u is not supported\n", version); - return -EINVAL; + return ERR_PTR(-EINVAL); } =20 if ( current_cpu_data.x86 !=3D 6 ) { printk(XENLOG_WARNING "VPMU: only family 6 is supported\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } =20 arch_pmc_cnt =3D core2_get_arch_pmc_count(); @@ -972,9 +972,9 @@ int __init core2_vpmu_init(void) printk(XENLOG_WARNING "VPMU: Register bank does not fit into VPMU share page\n"); arch_pmc_cnt =3D fixed_pmc_cnt =3D 0; - return -ENOSPC; + return ERR_PTR(-ENOSPC); } =20 - return 0; + return &core2_vpmu_ops; } =20 --- a/xen/include/asm-x86/vpmu.h +++ b/xen/include/asm-x86/vpmu.h @@ -49,10 +49,10 @@ struct arch_vpmu_ops { void (*arch_vpmu_dump)(const struct vcpu *); }; =20 -int core2_vpmu_init(void); +const struct arch_vpmu_ops *core2_vpmu_init(void); int vmx_vpmu_initialise(struct vcpu *); -int amd_vpmu_init(void); -int hygon_vpmu_init(void); +const struct arch_vpmu_ops *amd_vpmu_init(void); +const struct arch_vpmu_ops *hygon_vpmu_init(void); int svm_vpmu_initialise(struct vcpu *); =20 struct vpmu_struct { @@ -61,25 +61,25 @@ struct vpmu_struct { u32 hw_lapic_lvtpc; void *context; /* May be shared with PV guest */ void *priv_context; /* hypervisor-only */ - const struct arch_vpmu_ops *arch_vpmu_ops; struct xen_pmu_data *xenpmu_data; spinlock_t vpmu_lock; }; =20 /* VPMU states */ -#define VPMU_CONTEXT_ALLOCATED 0x1 -#define VPMU_CONTEXT_LOADED 0x2 -#define VPMU_RUNNING 0x4 -#define VPMU_CONTEXT_SAVE 0x8 /* Force context save */ -#define VPMU_FROZEN 0x10 /* Stop counters while V= CPU is not running */ -#define VPMU_PASSIVE_DOMAIN_ALLOCATED 0x20 +#define VPMU_INITIALIZED 0x1 +#define VPMU_CONTEXT_ALLOCATED 0x2 +#define VPMU_CONTEXT_LOADED 0x4 +#define VPMU_RUNNING 0x8 +#define VPMU_CONTEXT_SAVE 0x10 /* Force context save */ +#define VPMU_FROZEN 0x20 /* Stop counters while V= CPU is not running */ +#define VPMU_PASSIVE_DOMAIN_ALLOCATED 0x40 /* PV(H) guests: VPMU registers are accessed by guest from shared page */ -#define VPMU_CACHED 0x40 -#define VPMU_AVAILABLE 0x80 +#define VPMU_CACHED 0x80 +#define VPMU_AVAILABLE 0x100 =20 /* Intel-specific VPMU features */ -#define VPMU_CPU_HAS_DS 0x100 /* Has Debug Store */ -#define VPMU_CPU_HAS_BTS 0x200 /* Has Branch Trace Stor= e */ +#define VPMU_CPU_HAS_DS 0x1000 /* Has Debug Store */ +#define VPMU_CPU_HAS_BTS 0x2000 /* Has Branch Trace Sto= re */ =20 static inline void vpmu_set(struct vpmu_struct *vpmu, const u32 mask) {