From nobody Fri Dec 19 02:49:20 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21D90757F3 for ; Mon, 28 Apr 2025 06:58:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745823518; cv=none; b=cbx1nG57ONnjaOSL9Kk/FqYPSD3+zGjj44bnND7fQpunu8ay3141doojEUkEghJemp1weYEavbueUscNC5e65AAfRbc8PxaDLY4ObM30/YxlK1dISccR7QJNclkd9b1PBelq1Edfkdm7VUFfI7x7fagn86DXlFU9VCr1q7RZixI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745823518; c=relaxed/simple; bh=pPJ8R19J2/szrRXylX5/tWCymsrUsn/Hl5OGFoBEBSY=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=PnYcM+2d7aBGTUwqX7tCzzRtXGMg6GRJcR1C3dUuZhrMPXSUopfqkD8RgVM/aobOwruMEAjjJ7bgr5QqWWPuarElhsm1IOypdslpX8ChJhvwXZnaxfEAmwI4B+aBa8ZYytMfrbOFVxciYkFWFLN5UQJTrvdefDJs696EeeBvfCw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dBwmuAg8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dBwmuAg8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E5CD1C4CEE4; Mon, 28 Apr 2025 06:58:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1745823517; bh=pPJ8R19J2/szrRXylX5/tWCymsrUsn/Hl5OGFoBEBSY=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=dBwmuAg8gdgySu+Dso+50czrM27i9adBTCNGKbFopGertwGmXvg+EXHTGSC/LII3w OOiQvXI6nmTe5mdAul07ryxnGeqbNKU2TJV55XvbjBOkhs+Sf0TAHsFtzzzAnN+El/ 4zfWFWERnPei7BLat2VsFSYo3DGbPWaTo+XG1yMW31vZbiMjOMZr2igKVwaKxRwOCc hA8L8g50+TPIGA6RNsgrXNeH8TuH33QJeDeOmpIszuvwc+j7gtFBgNJMyL3TZYFzE8 1UGB1hQLdXt52S3MeiHESNkgrVuaFhfLCbEgjghtIffhPpyD+KMZNihmVsINSybWxz 5Rin8vh5R2oig== Date: Mon, 28 Apr 2025 08:58:31 +0200 From: Ingo Molnar To: Linus Torvalds Cc: Andrew Cooper , Arnd Bergmann , Arnd Bergmann , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Boris Ostrovsky , Alexander Usyskin , Greg Kroah-Hartman , Mateusz =?utf-8?Q?Jo=C5=84czyk?= , Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org Subject: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case handling to C Message-ID: References: <20250425141740.734030-1-arnd@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" * Linus Torvalds wrote: > On Sun, 27 Apr 2025 at 12:17, Andrew Cooper w= rote: > > > > ffs/fls are commonly found inside loops where x is the loop condition > > too. Therefore, using statically_true() to provide a form without the > > zero compatibility turns out to be a win. >=20 > We already have the version without the zero capability - it's just > called "__ffs()" and "__fls()", and performance-critical code uses > those. >=20 > So fls/ffs are the "standard" library functions that have to handle > zero, and add that stupid "+1" because that interface was designed by > some Pascal person who doesn't understand that we start counting from > 0. >=20 > Standards bodies: "companies aren't sending their best people". >=20 > But it's silly that we then spend effort on magic cmov in inline asm > on those things when it's literally the "don't use this version unless > you don't actually care about performance" case. >=20 > I don't think it would be wrong to just make the x86-32 code just do > the check against zero ahead of time - in C. >=20 > And yes, that will generate some extra code - you'll test for zero > before, and then the caller might also test for a zero result that > then results in another test for zero that can't actually happen (but > the compiler doesn't know that). But I suspect that on the whole, it > is likely to generate better code anyway just because the compiler > sees that first test and can DTRT. >=20 > UNTESTED patch applied in case somebody wants to play with this. It > removes 10 lines of silly code, and along with them that 'cmov' use. >=20 > Anybody? Makes sense - it seems to boot here, but I only did some very light=20 testing. There's a minor text size increase on x86-32 defconfig, GCC 14.2.0: text data bss dec hex filename 16577728 7598826 1744896 25921450 18b87aa vmlinux.before 16577908 7598838 1744896 25921642 18b886a vmlinux.after bloatometer output: add/remove: 2/1 grow/shrink: 201/189 up/down: 5681/-3486 (2195) Patch with changelog and your SOB added attached. Does it look good to=20 you? Thanks, Ingo =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D> From: Linus Torvalds Date: Mon, 28 Apr 2025 08:38:35 +0200 Subject: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case hand= ling to C Don't do the complicated and probably questionable BS*L+CMOVZL asm() optimization in variable_ffs() and fls(): performance-critical code is already using __ffs() and __fls() that use sane interfaces close to the machine instruction ABI. Check ahead for zero in C. There's a minor text size increase on x86-32 defconfig: text data bss dec hex filename 16577728 7598826 1744896 25921450 18b87aa vmlinux.before 16577908 7598838 1744896 25921642 18b886a vmlinux.after bloatometer output: add/remove: 2/1 grow/shrink: 201/189 up/down: 5681/-3486 (2195) Signed-off-by: Linus Torvalds Signed-off-by: Ingo Molnar --- arch/x86/include/asm/bitops.h | 22 ++++++---------------- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index 100413aff640..6061c87f14ac 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -321,15 +321,10 @@ static __always_inline int variable_ffs(int x) asm("bsfl %1,%0" : "=3Dr" (r) : ASM_INPUT_RM (x), "0" (-1)); -#elif defined(CONFIG_X86_CMOV) - asm("bsfl %1,%0\n\t" - "cmovzl %2,%0" - : "=3D&r" (r) : "rm" (x), "r" (-1)); #else - asm("bsfl %1,%0\n\t" - "jnz 1f\n\t" - "movl $-1,%0\n" - "1:" : "=3Dr" (r) : "rm" (x)); + if (!x) + return 0; + asm("bsfl %1,%0" : "=3Dr" (r) : "rm" (x)); #endif return r + 1; } @@ -378,15 +373,10 @@ static __always_inline int fls(unsigned int x) asm("bsrl %1,%0" : "=3Dr" (r) : ASM_INPUT_RM (x), "0" (-1)); -#elif defined(CONFIG_X86_CMOV) - asm("bsrl %1,%0\n\t" - "cmovzl %2,%0" - : "=3D&r" (r) : "rm" (x), "rm" (-1)); #else - asm("bsrl %1,%0\n\t" - "jnz 1f\n\t" - "movl $-1,%0\n" - "1:" : "=3Dr" (r) : "rm" (x)); + if (!x) + return 0; + asm("bsrl %1,%0" : "=3Dr" (r) : "rm" (x)); #endif return r + 1; }