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Message-ID: Date: Mon, 17 Apr 2023 14:23:08 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 From: Jan Beulich Subject: [PATCH v2] x86emul: avoid triggering event related assertions To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=c3=a9?= Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: FR0P281CA0058.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:49::19) To VE1PR04MB6560.eurprd04.prod.outlook.com (2603:10a6:803:122::25) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VE1PR04MB6560:EE_|PAXPR04MB9203:EE_ X-MS-Office365-Filtering-Correlation-Id: f8b57309-4107-4807-245f-08db3f3e81b8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: d+N1tjEJNsAA+rCmzz4WN4v/WwwGo7Q7OLqw+gi8F4drXfDWv4LPvs7ZcYvW9gDuuRglgMjn8huSBknOAd/tzkGbKBRCI8zog0ao8bL6ePrAxliE8iQt59/nXYXm5ATJOD1//9YM3/UUPwczwPfklq7X2DBD9MX1A9O9xx3HTDFMSq57fGNf8DllAbobU7NX9oDcxD9VNTElMiuepotizdXDoIujZ3ZFM4Fab+k/zEQehY1RGrIJskqnqjWOYwuzv/CcTxV1btVxF7A/ev2cbEbRUybLpRue0kcHs2QmDI9XIEDrTD4NqCHug4efe93VT3SMZiCYDLwLpo33okh4WSbdbag6J9ynfDXlq5hQOWgRi/1DBSmW35Rtd/2ay/hSq4oh6WDlaBbSwFyIODs8SICS3ifevM1WHUWkvTXgaRg6OZwoF9zEKUbvUbcccmGcHUX2KDfdhbyUhOSCOkDjq/d4KoYX97OxQYZzcSY+RTa9pl1RGuKdEwEp50zyfzs3SDqjJwmtuH2AUVCimXi3ulSHJZO9uY+kIrpWWRXQd+aiN+X0Oi7fCpuGTeCZrm+yCqnotDZMA+pbGUeDwcU6HsRPOrdr2l1G9BMm9rGxKk7VVwXNqIg/xhHKTq9KFjyhcJMfWqU2q6v2L3zlscFwwA== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VE1PR04MB6560.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230028)(346002)(136003)(39860400002)(396003)(366004)(376002)(451199021)(38100700002)(8676002)(8936002)(5660300002)(2906002)(36756003)(86362001)(31696002)(478600001)(6486002)(54906003)(31686004)(186003)(2616005)(26005)(6506007)(6512007)(66946007)(66476007)(83380400001)(316002)(41300700001)(4326008)(6916009)(66556008)(43740500002)(45980500001);DIR:OUT;SFP:1101; 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charset="utf-8" The assertion at the end of x86_emulate_wrapper() as well as the ones in x86_emul_{hw_exception,pagefault}() can trigger if we ignore X86EMUL_EXCEPTION coming back from certain hook functions. Squash exceptions when merely probing MSRs, plus on SWAPGS'es "best effort" error handling path. In adjust_bnd() add another assertion after the read_xcr(0, ...) invocation, paralleling the one in x86emul_get_fpu() - XCR0 reads should never fault when XSAVE is (implicitly) known to be available. Also update the respective comment in x86_emulate_wrapper(). Fixes: 14a6be89ec04 ("x86emul: correct EFLAGS.TF handling") Fixes: cb2626c75813 ("x86emul: conditionally clear BNDn for branches") Fixes: 6eb43fcf8a0b ("x86emul: support SWAPGS") Reported-by: AFL Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- EFER reads won't fault in any of the handlers we have, so in principle the respective check could be omitted (and hence has no Fixes: tag). Thoughts? The Fixes: tags are for the commits introducing the affected code; I'm not entirely sure whether the raising of exceptions from hook functions actually pre-dates them, but even if not the issues were at least latent ones already before. --- v2: Also update the respective comment in x86_emulate_wrapper(). --- a/xen/arch/x86/x86_emulate/0f01.c +++ b/xen/arch/x86/x86_emulate/0f01.c @@ -200,8 +200,10 @@ int x86emul_0f01(struct x86_emulate_stat if ( (rc =3D ops->write_segment(x86_seg_gs, &sreg, ctxt)) !=3D X86EMUL_OKAY ) { - /* Best effort unwind (i.e. no error checking). */ - ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, ctxt); + /* Best effort unwind (i.e. no real error checking). */ + if ( ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, + ctxt) =3D=3D X86EMUL_EXCEPTION ) + x86_emul_reset_event(ctxt); goto done; } break; --- a/xen/arch/x86/x86_emulate/0fae.c +++ b/xen/arch/x86/x86_emulate/0fae.c @@ -55,7 +55,10 @@ int x86emul_0fae(struct x86_emulate_stat cr4 =3D X86_CR4_OSFXSR; if ( !ops->read_msr || ops->read_msr(MSR_EFER, &msr_val, ctxt) !=3D X86EMUL_= OKAY ) + { + x86_emul_reset_event(ctxt); msr_val =3D 0; + } if ( !(cr4 & X86_CR4_OSFXSR) || (mode_64bit() && mode_ring0() && (msr_val & EFER_FFXS= E)) ) s->op_bytes =3D offsetof(struct x86_fxsr, xmm[0]); --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1143,10 +1143,18 @@ static bool is_branch_step(struct x86_em const struct x86_emulate_ops *ops) { uint64_t debugctl; + int rc =3D X86EMUL_UNHANDLEABLE; =20 - return ops->read_msr && - ops->read_msr(MSR_IA32_DEBUGCTLMSR, &debugctl, ctxt) =3D=3D X86= EMUL_OKAY && - (debugctl & IA32_DEBUGCTLMSR_BTF); + if ( !ops->read_msr || + (rc =3D ops->read_msr(MSR_IA32_DEBUGCTLMSR, &debugctl, + ctxt)) !=3D X86EMUL_OKAY ) + { + if ( rc =3D=3D X86EMUL_EXCEPTION ) + x86_emul_reset_event(ctxt); + debugctl =3D 0; + } + + return debugctl & IA32_DEBUGCTLMSR_BTF; } =20 static void adjust_bnd(struct x86_emulate_ctxt *ctxt, @@ -1160,13 +1168,21 @@ static void adjust_bnd(struct x86_emulat =20 if ( !ops->read_xcr || ops->read_xcr(0, &xcr0, ctxt) !=3D X86EMUL_OKAY= || !(xcr0 & X86_XCR0_BNDREGS) || !(xcr0 & X86_XCR0_BNDCSR) ) + { + ASSERT(!ctxt->event_pending); return; + } =20 if ( !mode_ring0() ) bndcfg =3D read_bndcfgu(); else if ( !ops->read_msr || - ops->read_msr(MSR_IA32_BNDCFGS, &bndcfg, ctxt) !=3D X86EMUL_= OKAY ) + (rc =3D ops->read_msr(MSR_IA32_BNDCFGS, &bndcfg, + ctxt)) !=3D X86EMUL_OKAY ) + { + if ( rc =3D=3D X86EMUL_EXCEPTION ) + x86_emul_reset_event(ctxt); return; + } if ( (bndcfg & IA32_BNDCFGS_ENABLE) && !(bndcfg & IA32_BNDCFGS_PRESERV= E) ) { /* @@ -8395,7 +8411,9 @@ int x86_emulate_wrapper( * An event being pending should exactly match returning * X86EMUL_EXCEPTION. (If this trips, the chances are a codepath has * called hvm_inject_hw_exception() rather than using - * x86_emul_hw_exception().) + * x86_emul_hw_exception(), or the invocation of a hook has caused an + * exception to be raised, while the caller was only checking for + * success/failure.) */ ASSERT(ctxt->event_pending =3D=3D (rc =3D=3D X86EMUL_EXCEPTION));