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charset="utf-8" No hardware has VT-d support while not having cx16 support, consider disabl= ing IOMMU in this case to avoid potentially buggy code. Now that IOMMU is only enabled if cx16 is supported, drop dead code that ha= ndles cases where cx16 isn't supported. Signed-off-by Teddy Astie --- xen/drivers/passthrough/amd/iommu_map.c | 43 +++++++-------------- xen/drivers/passthrough/amd/pci_amd_iommu.c | 6 +++ 2 files changed, 21 insertions(+), 28 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthro= ugh/amd/iommu_map.c index e0f4fe736a..c8c1c0cfae 100644 --- a/xen/drivers/passthrough/amd/iommu_map.c +++ b/xen/drivers/passthrough/amd/iommu_map.c @@ -167,15 +167,14 @@ int amd_iommu_set_root_page_table(struct amd_iommu_dt= e *dte, { bool valid =3D flags & SET_ROOT_VALID; =20 - if ( dte->v && dte->tv && - (cpu_has_cx16 || (flags & SET_ROOT_WITH_UNITY_MAP)) ) + if ( dte->v && dte->tv ) { union { struct amd_iommu_dte dte; uint64_t raw64[4]; __uint128_t raw128[2]; } ldte =3D { .dte =3D *dte }; - __uint128_t old =3D ldte.raw128[0]; + __uint128_t res, old =3D ldte.raw128[0]; int ret =3D 0; =20 ldte.dte.domain_id =3D domain_id; @@ -185,33 +184,21 @@ int amd_iommu_set_root_page_table(struct amd_iommu_dt= e *dte, ldte.dte.paging_mode =3D paging_mode; ldte.dte.v =3D valid; =20 - if ( cpu_has_cx16 ) - { - __uint128_t res =3D cmpxchg16b(dte, &old, &ldte.raw128[0]); + =20 + res =3D cmpxchg16b(dte, &old, &ldte.raw128[0]); =20 - /* - * Hardware does not update the DTE behind our backs, so the - * return value should match "old". - */ - if ( res !=3D old ) - { - printk(XENLOG_ERR - "Dom%d: unexpected DTE %016lx_%016lx (expected %016= lx_%016lx)\n", - domain_id, - (uint64_t)(res >> 64), (uint64_t)res, - (uint64_t)(old >> 64), (uint64_t)old); - ret =3D -EILSEQ; - } - } - else /* Best effort, updating domain_id last. */ + /* + * Hardware does not update the DTE behind our backs, so the + * return value should match "old". + */ + if ( res !=3D old ) { - uint64_t *ptr =3D (void *)dte; - - write_atomic(ptr + 0, ldte.raw64[0]); - /* No barrier should be needed between these two. */ - write_atomic(ptr + 1, ldte.raw64[1]); - - ret =3D 1; + printk(XENLOG_ERR + "Dom%d: unexpected DTE %016lx_%016lx (expected %016lx_%= 016lx)\n", + domain_id, + (uint64_t)(res >> 64), (uint64_t)res, + (uint64_t)(old >> 64), (uint64_t)old); + ret =3D -EILSEQ; } =20 return ret; diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/pass= through/amd/pci_amd_iommu.c index f6efd88e36..656c5eda5d 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -312,6 +312,12 @@ static int __init cf_check iov_detect(void) return -ENODEV; } =20 + if ( unlikely(!cpu_has_cx16) ) + { + printk("AMD-Vi: CPU doesn't support CMPXCHG16B, disabling\n"); + return -ENOSYS; + } + init_done =3D 1; =20 if ( !amd_iommu_perdev_intremap ) --=20 2.44.0 Teddy Astie | Vates XCP-ng Intern XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech