From nobody Sun May 5 00:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=linutronix.de ARC-Seal: i=1; a=rsa-sha256; t=1685448576; cv=none; d=zohomail.com; s=zohoarc; b=RpC00NMZV0tCmX/+ie4BpixXK0zArVu77r4tiNhzyfe13cHfkN/YFT8G/2zk8cpHHxr7v8s8wF7glVtQdbPGLH5HrlQ9lYX/DKLVLL7gglYa0RcdYQrKCQDaButfmCM5nEL0ldC2bzfD90mbQKowukgCme7p5EmnpUIDdShVvX0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1685448576; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=iZKRAQ6PZ8GK4gaM6K1HebRWTpJfBGLswDCJGgLN5o0=; b=dzTcuUH9raKi4Yt8fTmGEru1QELbuzODKnKQlokfWJpT6dDoR9Yuwbo1jZOM1w9fGfuAAdB9F9Sa5Pzn5ZZ+QNjoEyhPyJpjz0HxFyI++Ykw9SDeV32FqFxIWUula0y8L2yfhhAz8wbZ1ge9fHe7NZLKdJ/IrZQnqymTL19lDPU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1685448576668272.31900652061336; Tue, 30 May 2023 05:09:36 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.541139.843559 (Exim 4.92) (envelope-from ) id 1q3yAC-0004da-QW; Tue, 30 May 2023 12:09:20 +0000 Received: by outflank-mailman (output) from mailman id 541139.843559; Tue, 30 May 2023 12:09:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q3yAC-0004dT-Ns; Tue, 30 May 2023 12:09:20 +0000 Received: by outflank-mailman (input) for mailman id 541139; Tue, 30 May 2023 12:09:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q3yAB-0004dJ-P2 for xen-devel@lists.xenproject.org; Tue, 30 May 2023 12:09:19 +0000 Received: from galois.linutronix.de (galois.linutronix.de [193.142.43.55]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id cd7a40b1-fee2-11ed-b231-6b7b168915f2; Tue, 30 May 2023 14:09:18 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cd7a40b1-fee2-11ed-b231-6b7b168915f2 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1685448557; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=iZKRAQ6PZ8GK4gaM6K1HebRWTpJfBGLswDCJGgLN5o0=; b=m4WMewK162ZNFwFaX5aCd5h4XR9fVfFKlcOKr0XvrKt28u52sp90XWujVFM8gK3h4ofwRI SOK74XcgObHGkHLKgrJtnZmuimwWXh/wXN5q9j6Dv8gCxwb+AXijmXtlT1aYPYK1KlmCia BRY4IEuplIYlboTaZlXuZ97GEPZdzEDaxJWuCfBZTFHFXe1n4ZZe6munDRdPajOfnef4JY B2aRHT8SvnCVu5Z0nVzDGLL0t8nspaFR5wLfetwgGrG6VTVTYbuigWgnfZFxZNY8e+e9jz fk5DZ/0bhEUcm9JiTR/8v3EDg6m0oY8ot+sN837vZzmjbxzjbsdTnvzWX7grnA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1685448557; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=iZKRAQ6PZ8GK4gaM6K1HebRWTpJfBGLswDCJGgLN5o0=; b=ePubrlCxuRaMVoLtUqukHirTYLds6qKP6f4ORS+5dYI6s8wS4PLvyw0YznjLBK3j2Pn/GB 8pWP8hu7tKt0KJDA== To: "Kirill A. Shutemov" Cc: LKML , x86@kernel.org, David Woodhouse , Andrew Cooper , Brian Gerst , Arjan van de Veen , Paolo Bonzini , Paul McKenney , Tom Lendacky , Sean Christopherson , Oleksandr Natalenko , Paul Menzel , "Guilherme G. Piccoli" , Piotr Gorski , Usama Arif , Juergen Gross , Boris Ostrovsky , xen-devel@lists.xenproject.org, Russell King , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Guo Ren , linux-csky@vger.kernel.org, Thomas Bogendoerfer , linux-mips@vger.kernel.org, "James E.J. Bottomley" , Helge Deller , linux-parisc@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , linux-riscv@lists.infradead.org, Mark Rutland , Sabin Rapan , "Michael Kelley (LINUX)" , Dave Hansen Subject: [patch] x86/smpboot: Disable parallel bootup if cc_vendor != NONE In-Reply-To: <87jzwqjeey.ffs@tglx> References: <20230508181633.089804905@linutronix.de> <20230508185218.962208640@linutronix.de> <20230524204818.3tjlwah2euncxzmh@box.shutemov.name> <87y1lbl7r6.ffs@tglx> <87sfbhlwp9.ffs@tglx> <20230529023939.mc2akptpxcg3eh2f@box.shutemov.name> <87bki3kkfi.ffs@tglx> <20230529203129.sthnhzgds7ynddxd@box.shutemov.name> <20230530005428.jyrc2ezx5raohlrt@box.shutemov.name> <87mt1mjhk3.ffs@tglx> <87jzwqjeey.ffs@tglx> Date: Tue, 30 May 2023 14:09:17 +0200 Message-ID: <87cz2ija1e.ffs@tglx> MIME-Version: 1.0 X-ZohoMail-DKIM: pass (identity @linutronix.de) X-ZM-MESSAGEID: 1685448579152100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The decision to allow parallel bringup of secondary CPUs checks CC_ATTR_GUEST_STATE_ENCRYPT to detect encrypted guests. Those cannot use parallel bootup because accessing the local APIC is intercepted and raises a #VC or #VE, which cannot be handled at that point. The check works correctly, but only for AMD encrypted guests. TDX does not set that flag. Check for cc_vendor !=3D CC_VENDOR_NONE instead. That might be overbroad, b= ut definitely works for both AMD and Intel. Fixes: 0c7ffa32dbd6 ("x86/smpboot/64: Implement arch_cpuhp_init_parallel_br= ingup() and enable it") Reported-by: Kirill A. Shutemov Signed-off-by: Thomas Gleixner --- arch/x86/kernel/smpboot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1282,7 +1282,7 @@ bool __init arch_cpuhp_init_parallel_bri * Intel-TDX has a secure RDMSR hypercall, but that needs to be * implemented seperately in the low level startup ASM code. */ - if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT)) { + if (cc_get_vendor() !=3D CC_VENDOR_NONE) { pr_info("Parallel CPU startup disabled due to guest state encryption\n"); return false; }