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charset="utf-8" Hardware can support more than 8 general or 3 fixed counters, which could l= ead to inconsistent access to MSRs (thus failure to initialize vPMU in guest) a= s we don't support accessing more than these limits. Signed-off-by: Teddy Astie --- I'm not aware of a processor that have more than that, but the specification tells that this is possible. xen/arch/x86/cpu-policy.c | 6 ++++++ xen/arch/x86/cpu/vpmu_intel.c | 15 +++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 7f4456d5a2..46db7f0726 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -276,6 +276,12 @@ switch ( p->x86_vendor ) if ( p->basic.pmu.version > 2 ) p->basic.pmu.version =3D 2; =20 + /* Truncate control register count to what we support */ + if ( p->basic.pmu.num_gp_ctrs > 8 ) + p->basic.pmu.num_gp_ctrs =3D 8; + + if ( p->basic.pmu.num_fixed_ctr > 3 ) + p->basic.pmu.num_fixed_ctr =3D 3; break; } } diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index 85539ce6c5..0871795218 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -924,7 +924,22 @@ const struct arch_vpmu_ops *__init core2_vpmu_init(voi= d) } =20 arch_pmc_cnt =3D core2_get_arch_pmc_count(); + if ( arch_pmc_cnt > 8 ) + { + printk(XENLOG_INFO + "VPMU: Too many general counters (%u), emulating 8 register= s\n", + arch_pmc_cnt); + arch_pmc_cnt =3D 8; + } + fixed_pmc_cnt =3D core2_get_fixed_pmc_count(); + if ( fixed_pmc_cnt > 3 ) + { + printk(XENLOG_INFO + "VPMU: Too many fixed counters (%u), emulating 3 registers\= n", + arch_pmc_cnt); + fixed_pmc_cnt =3D 3; + } =20 if ( cpu_has_pdcm ) { --=20 2.53.0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech