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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-485359bf807sm119619845e9.2.2026.03.10.10.09.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Mar 2026 10:09:20 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e1d78722-1ca3-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773162561; x=1773767361; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/11lx8z8RjsX/40S39HnVeCzAcwg/3pYH5ySRoyED38=; b=IDEcmZtXox9yFNvqonGXK66GEwZ8hOgVJ9ldECm3HF4HnrcKAgCD9bQmbt3NkejLKz sdFTs8eZiSibYdmsemV+yd3LbUtbquVV0uhXKNNr5IzLy96CiONXz0RhV1mwz9vX2AIF DhAlhQRlKXlxBCX3L5BZxIUZuRKor3XEdBcdluvtcCMMQZRUKRirgzBX0WyXogatKA6d O7bl9YlQnGHvDSfQk9QPAyJzHi42BjFUZyUodtQjDhGDftXTMRr4zer/tM3cizD6Ic3B EAvnKxaWS9KD5L5E9/7556H+gqzMUraDv7bxFDeI4EIffLzLJHEvKYowo/j/MiTe41LC UT7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1773162561; x=1773767361; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=/11lx8z8RjsX/40S39HnVeCzAcwg/3pYH5ySRoyED38=; b=CRWfW/Tcqf/4O5n2z+vdGd1EkJFoj8ETzqQbFzza6bwNM3aqLmviiGzY2RYWqfZkkf GLWGV9trwy0j8leNeGBog4UN9k40FWxssMLCPbQmcmW+5Q3TLuVIxTgvYwJGlgHylpPZ QZZEE7qUEFiX0qpZ+G7PgsADv5brc5deqM0N8dpS6TUU1QQnkCuDhsLDei36/9z9aibr /FgH0hpGtMaBGsL+GwAz8EQNJ89NzCodqSuDq48zM4dmvjZLXm/NeOFZ2r+T4lnOAtXy n91DNHgaYVrlH+hjlJA/+pPgIQgfcm8Nr74a40LH60XJr2pCh9c6rpcRF1mH3q62MCE3 29FA== X-Gm-Message-State: AOJu0YxUvUYQEm0bOtzuO/LFtNmbjerprvL+cciWT2P8z/7gH9UcvFuE TUa8Qi85CIKk7wEZmux4iQlyB+ZdYRuwzCjJn+i+qeWEDIKi4LQ2bu/N6qd9kSJ6 X-Gm-Gg: ATEYQzywI2CmxGHr/bRg7Gg9HwC2JEqO8WXqrWQxtdbq+5iJNW69pAd9Cnwh8XShtxj 3tXTXLtiBaDYNLDIbepkJUirpMOnL8DRhb+c21uGU8Syed0l+hDnIcrFoMAq9HlADFSa+umo7/B E2XozrkjJb+cMLIbAV4WS1f39b4+T+n4JdJ8EY1a2Tq4LtYi2PFvRpy948/gmI03DJFirkzTXW3 A+biSlWWcxlUcgdtOZQva7QIhZAZyQDziR2M5wXRJfDFlvEp+/5tTB0UPUA57GDNsSRQUYeqFW0 nPAW9inxFGfgJT1YwOLyrSJg04TwrUSAgACVu2lX/15j+tgkvVNGOcpClbE+Ot525Ttbo+qt+l4 o0sPn01xr9j6IrgCbSt/RgSur75MY8L4qadCvenwoEH6vDWJeYhW6cIFIbj5gtv6CfzF5Tno4YB W563V8QHfqyO4eEYGe/oTXnw4TILIoiJs5ZPkRW0uX6piMjZ91ewfdmlD3lr58OpNPvC46qQ== X-Received: by 2002:a05:600c:468b:b0:47e:e981:78b4 with SMTP id 5b1f17b1804b1-48541a00b6fmr69385575e9.12.1773162561036; Tue, 10 Mar 2026 10:09:21 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 10/27] xen/riscv: generate IMSIC DT node for guest domains Date: Tue, 10 Mar 2026 18:08:43 +0100 Message-ID: <8154eae081d14da89f27bad581270cc5bba6ccfc.1773157782.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1773162585187154100 Content-Type: text/plain; charset="utf-8" Guests using the IMSIC interrupt controller require a corresponding Device Tree description. Add support for generating an IMSIC node when building the guest DT. Keep a reference to the host IMSIC DT node and reuse its compatible property while constructing the guest-visible node. The generated node contains guest-specific information such as the MMIO region sized for the number of vCPUs and the interrupts-extended property referencing per-vCPU interrupt controllers. This allows guests to discover and use the IMSIC interrupt controller. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/imsic.c | 113 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/imsic.h | 7 ++ 2 files changed, 120 insertions(+) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index a4460576f620..0956b187705f 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -13,8 +13,11 @@ #include #include #include +#include #include +#include #include +#include #include #include #include @@ -329,6 +332,8 @@ int __init imsic_init(const struct dt_device_node *node) struct imsic_mmios *mmios; struct imsic_msi *msi =3D NULL; =20 + imsic_cfg.host_node =3D node; + /* Parse IMSIC node */ rc =3D imsic_parse_node(node, &nr_parent_irqs, &nr_mmios); /* @@ -487,3 +492,111 @@ int __init imsic_init(const struct dt_device_node *no= de) =20 return rc; } + +static int __init imsic_make_reg_property(struct domain *d, void *fdt) +{ + __be32 regs[4]; + + regs[0] =3D cpu_to_be32(imsic_cfg.base_addr >> 32); + regs[1] =3D cpu_to_be32(imsic_cfg.base_addr); + regs[2] =3D cpu_to_be32((IMSIC_MMIO_PAGE_SZ * d->max_vcpus) >> 32); + regs[3] =3D cpu_to_be32(IMSIC_MMIO_PAGE_SZ * d->max_vcpus); + + return fdt_property(fdt, "reg", regs, sizeof(regs)); +} + +static int __init imsic_set_interrupt_extended_prop(struct domain *d, + void *fdt) +{ + uint32_t len =3D 0, pos =3D 0, cpu, phandle; + uint32_t *irq_ext; + char buf[64]; + int res; + + irq_ext =3D xvzalloc_array(uint32_t, d->max_vcpus * 2); + if ( !irq_ext ) + return -ENOMEM; + + for ( cpu =3D 0; cpu < d->max_vcpus; cpu++ ) + { + snprintf(buf, sizeof(buf), "/cpus/cpu@%u/interrupt-controller", cp= u); + phandle =3D fdt_get_phandle(fdt, fdt_path_offset(fdt, buf)); + + if ( phandle <=3D 0 ) + return phandle; + + irq_ext[pos++] =3D cpu_to_be32(phandle); + len +=3D sizeof(uint32_t); + irq_ext[pos++] =3D cpu_to_be32(IRQ_S_EXT); + len +=3D sizeof(uint32_t); + } + + res =3D fdt_property(fdt, "interrupts-extended", irq_ext, len); + + XVFREE(irq_ext); + + return res; +} + +int __init imsic_make_dt_node(const struct kernel_info *kinfo) +{ + uint32_t len; + const void *data =3D NULL; + int res =3D 0; + void *fdt =3D kinfo->fdt; + const struct dt_device_node *host_imsic_node =3D imsic_cfg.host_node; + uint32_t *next_phandle =3D &kinfo->bd.d->arch.next_phandle; + + res =3D fdt_begin_node(fdt, host_imsic_node->full_name); + if ( res ) + return res; + + data =3D dt_get_property(host_imsic_node, "compatible", &len); + if ( !data ) + { + printk(XENLOG_ERR "%s: Can't find 'compatible' property\n", + host_imsic_node->full_name); + + return -ENOENT; + } + + res =3D fdt_property(fdt, "compatible", data, len); + if ( res ) + return res; + + res =3D imsic_make_reg_property(kinfo->bd.d, fdt); + if ( res ) + return res; + + res =3D imsic_set_interrupt_extended_prop(kinfo->bd.d, fdt); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "riscv,num-ids", imsic_cfg.nr_ids); + if ( res ) + return res; + + res =3D fdt_property(fdt, "msi-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "#msi-cells", 0); + if ( res ) + return res; + + res =3D fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res =3D fdt_property_u32(fdt, "#interrupt-cells", 0); + if ( res ) + return res; + + imsic_cfg.phandle =3D (*next_phandle)++; + + res =3D fdt_property_cell(fdt, "phandle", imsic_cfg.phandle); + if ( res ) + return res; + + return fdt_end_node(fdt); +} diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/as= m/imsic.h index c6c59215df20..a63d56fbd5d9 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -57,11 +57,16 @@ struct imsic_config { /* MSI */ const struct imsic_msi *msi; =20 + /* DT node of IMSIC */ + const struct dt_device_node *host_node; + /* Lock to protect access to IMSIC's stuff */ spinlock_t lock; }; =20 struct dt_device_node; +struct kernel_info; + int imsic_init(const struct dt_device_node *node); =20 const struct imsic_config *imsic_get_config(void); @@ -71,4 +76,6 @@ void imsic_irq_disable(unsigned int hwirq); =20 void imsic_ids_local_delivery(bool enable); =20 +int imsic_make_dt_node(const struct kernel_info *kinfo); + #endif /* ASM_RISCV_IMSIC_H */ --=20 2.53.0