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[109.243.69.225]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad1891a3cb9sm740295366b.60.2025.05.06.09.52.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 May 2025 09:52:04 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 70c041a5-2a9a-11f0-9eb4-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1746550325; x=1747155125; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MagsnbbonM4RCqIwn/oarouHR237rcv9tp4MRYfZzDU=; b=jlEIAx19NdoCXVUPoyFwGEv7wp+YcJ3cDwbi5u0UsVnrNwjwWlbz6Uov5nk/ZtGuLA dQhYWonH9Gehgmtn/gJYZghdxZcyhd6nX1X++vo/bXYGxfl26vO8ZZwNrKAA5FRRYHGi C2NTjocoK1zKp0I0qVleM7P1tC9eDMCnI9v+iFLOZaH9Ei6A6IAI7vSEuBeNmtou7q2C Fq8D+GyCxesv1L5cwK6R3VoIvhSCF5WhMLtADyqcirMaa+ZRFAX3B4dx6hEHPCIqYrKI 5WEDi0X57R0xodwxZGhCZI+SRvCg5zABSHWnrvgAxbWxPOLGXbf61iEDI4HImXeKi49o xNvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1746550325; x=1747155125; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MagsnbbonM4RCqIwn/oarouHR237rcv9tp4MRYfZzDU=; b=kT1Y8Fxyxb+sYh/jVGS6IWlz8PHMN//EIzJjtMUfHyY/1NMBZQMfPuvuXvOV0JhhXi BiaxdwzqZ+HOmJKyITkIlz0DbXnhs9ZYncgUIVthhRa7a5SYJEWPVVSi1HOMMCWSJjuU 1iGz/WgHRZ5UkaPrm78bviOoyE3NM6OfQ8RjgZ/IXLjhMh72cnZopQ/fYe4PqdPZtjK1 hV03Kxw16B++iyjcYiMVts8eLl8BTCnLdFjV9CiKTTdp2Pl0tKJCi99VN4t5Vd/lmMU7 YhimZ8NTn8VRExg9ytN/blxld/ZIFHXr9ILtTgl20THzjF19Tj8HE7OcGVRv8tiNYSUI 0SJg== X-Gm-Message-State: AOJu0YzFfWGJZ1OCImpPP7Z89ltQNXQxEPDqJhJ68SmEe0xxnuGxTV69 GN+eZNBvYQJP9MP3e6xRrU/k/IXJBS77Gpt6umxruHFaeemwg/q2De3eNA== X-Gm-Gg: ASbGncvGN69oDvtKV2cZIEznHQX4yTPRsMas96kaxi3WwmX8GzvBlyMin7qcW90NnQz h7zsmRdWPfML7UKaQX+i/z4qkfxgqaEXiX8JRZmMQkjxy6ZpKH5dPyQrKRe4dUgQ+fGsMTli0ac FIArWVybTpKiOfaVSrwpya9Jod0aRl2aC1tPNGg73E2luIYAem876EvIu/g4XExkmDT/K6GMmyU ipsanLUbRF6XXF1f2godiNsY8aXVIsvKMAUk/OjstAlcPkOiWDDAQrd5IskE9HUoMP9ydUmleWH Q7xZvGAELCh8EMtOL8FGp32VHJkfwhsmtRiNtJscOR2sk42NHwyjOmmrc7ZcQRTpwebqEHtVVSo NeBfsWA00WQ== X-Google-Smtp-Source: AGHT+IHXVcgZWqmG8m0i6ryn+QDye6ieZnyr5R5iVbzKSImUtMH6siYhduEiVLati9KAvZAxaemw6Q== X-Received: by 2002:a17:907:3f9a:b0:ad1:d061:e8b6 with SMTP id a640c23a62f3a-ad1e8bc8d20mr17508666b.21.1746550324581; Tue, 06 May 2025 09:52:04 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Romain Caritey Subject: [PATCH v2 09/16] xen/riscv: introduce register_intc_ops() and intc_hw_ops. Date: Tue, 6 May 2025 18:51:39 +0200 Message-ID: <7cd7d3780bb6db45b92c971ff8bcf2634570431f.1746530883.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1746550350993116600 Content-Type: text/plain; charset="utf-8" Introduce the intc_hw_operations structure to encapsulate interrupt controller-specific data and operations. This structure includes: - A pointer to interrupt controller information (`intc_info`) - Callbacks to initialize the controller and set IRQ type/priority - A reference to an interupt controller descriptor (`host_irq_type`) - number of interrupt controller irqs. Add function register_intc_ops() to mentioned above structure. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in V2: - This patch was part of "xen/riscv: Introduce intc_hw_operations abstract= ion" and splitted to have ability to merge some patches from this patch series into one patch. - Declare host_irq_type member of intc_hw_operations as pointer-to-const. - Moved up forward declaration of irq_desc. - Use attribute __init for register_intc_ops(). - Use attribute __ro_after_init for intc_hw_ops variable. - Update prototype of register_intc_ops() because of what mention in the previous point. --- xen/arch/riscv/include/asm/intc.h | 22 ++++++++++++++++++++++ xen/arch/riscv/intc.c | 9 +++++++++ 2 files changed, 31 insertions(+) diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm= /intc.h index 52ba196d87..e72d5fd9d3 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -8,6 +8,8 @@ #ifndef ASM__RISCV__INTERRUPT_CONTOLLER_H #define ASM__RISCV__INTERRUPT_CONTOLLER_H =20 +#include + enum intc_version { INTC_APLIC, }; @@ -17,6 +19,26 @@ struct intc_info { const struct dt_device_node *node; }; =20 +struct irq_desc; + +struct intc_hw_operations { + /* Hold intc hw information */ + const struct intc_info *info; + /* Initialize the intc and the boot CPU */ + int (*init)(void); + + /* hw_irq_controller to enable/disable/eoi host irq */ + const hw_irq_controller *host_irq_type; + + /* Set IRQ type */ + void (*set_irq_type)(struct irq_desc *desc, unsigned int type); + /* Set IRQ priority */ + void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority); + +}; + void intc_preinit(void); =20 +void register_intc_ops(struct intc_hw_operations *ops); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 4061a3c457..122e7b32b5 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -5,6 +5,15 @@ #include #include =20 +#include + +static struct __ro_after_init intc_hw_operations *intc_hw_ops; + +void __init register_intc_ops(struct intc_hw_operations *ops) +{ + intc_hw_ops =3D ops; +} + void __init intc_preinit(void) { if ( acpi_disabled ) --=20 2.49.0