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[109.243.67.101]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8edacf1564sm415776866b.52.2026.02.09.08.52.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Feb 2026 08:52:46 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c311b7df-05d7-11f1-b162-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1770655966; x=1771260766; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ftXQlefZdbz0dncAwMVaBMfjTGZihapLiGK/88smptw=; b=B0Fl9Oikdm84wh+lWNu8SEQwSI3fs3ich86nX53CWPZZV6m4bOBw9QBOCHM/9I+6hm znXl9GJxzvFAkMlE+RceJeJtvozQUvMkYV/N640MbLk+NYn3zm3Dzo2xigdH45dCFhF2 fLfl3xS8UNxeJrrHFBtxHSI0braQkUjUZciCBuV1POntaMrRi/wKHWydfTTZ/EQLMrRF 4wvCove5+oyfM6RFr9pgrGzWzS34OVXq8elrtivle3c0G+AEacfmADXkmpdrOC0W4UUz gRB8nGk18BGWNq+8Rhfr6fum26WgNtrjIeGhXt8PJDr14JLGzE7Ie2geK/tauItqk7me g3Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1770655966; x=1771260766; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ftXQlefZdbz0dncAwMVaBMfjTGZihapLiGK/88smptw=; b=Sk44xEyp8B90E6TraQOo2FUfvHfgOjt+t/0OeJancWyoiTJvCWGrXcOVDoEX0jccnS +YxI8c83BJGZ7/38HG76X498SDNY0/C59hDNSVO0FPIBRAm1x7dONqpX/oCOmTTSeamN JiVRqh/2NUuT2Lt/crx9jepQtz9IHQ4jhanGpdC1jJsgFTL74ChyARgPGH5olSxUUZKL iwukE/3VJtX4Qcu/lBxcaPuheSQCqng42mJLGPM/0AxoVQge8ezg00Sr0L6IGJGSSZUw G7QaJxkaEnbwO2hQVSQ58vclosblZocyXod2mjavl59pUvOCDlaHr0su6+CGvcoTCp3G nb2w== X-Gm-Message-State: AOJu0Yxrqmcpd9ThMqG04GGEpysYeIUCeFTKuYbX5D05Cbfel72c40K2 TVhFXULs/4iW/Ggn2FqRj7zdFUTE7cLqnA+muzaQnJ+HJfyl8KeMNJYzgselqcyE X-Gm-Gg: AZuq6aLGheRZEpZk8n6RK+6UDWEeXXBIHooetrr15MzGL/ltH1AjWnb6rxxGGY3E7Wv mzB2HgelYDKPkmqT8Dofe/VuELBqSNVJgf6xKIwfqIZFITzVqjn80un27XzzrFyKpYelntwYMYs 1W4tFKpGumaioHD8k4cQHU5ArYvVRd9XHpzaTBTHx21fTJdTJ+gcQWY0bW8Pfak3BteYOs1wFKW LR78oG8jLIrnejaQ/9BhRifZZICczaBgGx7Omnp9dLNe+cRjPoH/PuyT7u15RmglHrtnjHw/KVG 0G8Mza1a6Idg5uG5XFEJdopdPw6sq/riJ1T5dGL1jW5s83hKLG0iUiJgIn5Bv+8yzkDFl5wsuzm ptWOtNuvrhspDmhQ75KoNbLMJjJ/DtHSXiuq97XnWj4UBH5ald7o093PFxJymya6CIRZMIPykOF 2TBxg29IWQUC60+/0utSURLp76tHggaZC6BA0q3TfXYY0NJmGZ2hD1Mg== X-Received: by 2002:a17:907:868f:b0:b87:fad:442b with SMTP id a640c23a62f3a-b8edf11f316mr720701766b.3.1770655966298; Mon, 09 Feb 2026 08:52:46 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v3 08/16] xen/riscv: introduce basic vtimer infrastructure for guests Date: Mon, 9 Feb 2026 17:52:21 +0100 Message-ID: <792ea928d748e9ff7bd331b8e8b0262695a062e9.1770650552.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1770655990970154100 Lay the groundwork for guest timer support by introducing a per-vCPU virtual timer backed by Xen=E2=80=99s common timer infrastructure. The virtual timer is programmed in response to the guest SBI sbi_set_timer() call and injects a virtual supervisor timer interrupt into the vCPU when it expires. While a dedicated struct vtimer is not strictly required at present, it is expected to become necessary once SSTC support is introduced. In particular, it will need to carry additional state such as whether SSTC is enabled, the next compare value (e.g. for the VSTIMECMP CSR) to be saved and restored across context switches, and time delta state (e.g. HTIMEDELTA) required for use cases such as migration. Introducing struct vtimer now avoids a later refactoring. Signed-off-by: Oleksii Kurochko --- Changes in v3: - use one container_of() to get vcpu instead of two container_of()s. --- Changes in v2: - Drop domain_vtimer_init() as it does nothing. - Drop "struct vcpu *v;" from struct vtimer as it could be taken from arch_vcpu using container_of(). - Drop vtimer_initialized, use t->status =3D=3D TIMER_STATUS_invalid instead to understand if timer was or wasn't initialized. - Drop inclusion of xen/domain.h as xen/sched.h already includes it. - s/ xen/time.h/ xen.timer.h in vtimer.c. - Drop ULL in if-conidtion in vtimer_set_timer() as with the cast it isn't necessary to have suffix ULL. - Add migrate timer to vtimer_set_timer() to be sure that vtimer will occur on pCPU it was ran, so the signalling to that vCPU will (commonly) be cheaper. - Check if the timeout has already expired and just inject the event in vtimer_vtimer_set_timer(). - Drop const for ticks argument of vtimer_set_timer(). - Merge two patches to one: - xen/riscv: introduce vtimer - xen/riscv: introduce vtimer_set_timer() and vtimer_expired() --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain.c | 8 +++- xen/arch/riscv/include/asm/domain.h | 3 ++ xen/arch/riscv/include/asm/vtimer.h | 20 ++++++++ xen/arch/riscv/vtimer.c | 71 +++++++++++++++++++++++++++++ 5 files changed, 101 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vtimer.h create mode 100644 xen/arch/riscv/vtimer.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 868514c25006..7439d029cc45 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -22,6 +22,7 @@ obj-y +=3D traps.o obj-y +=3D vmid.o obj-y +=3D vm_event.o obj-y +=3D vsbi/ +obj-y +=3D vtimer.o =20 $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 67437912605a..3f4b062b6ce8 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -10,6 +10,7 @@ #include #include #include +#include =20 #define HEDELEG_DEFAULT (BIT(CAUSE_MISALIGNED_FETCH, U) | \ BIT(CAUSE_FETCH_ACCESS, U) | \ @@ -105,11 +106,14 @@ int arch_vcpu_create(struct vcpu *v) if ( is_idle_vcpu(v) ) return rc; =20 + if ( (rc =3D vcpu_vtimer_init(v)) ) + goto fail; + /* - * As the vtimer and interrupt controller (IC) are not yet implemented, + * As interrupt controller (IC) is not yet implemented, * return an error. * - * TODO: Drop this once the vtimer and IC are implemented. + * TODO: Drop this once IC is implemented. */ rc =3D -EOPNOTSUPP; goto fail; diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index de5aecb862b5..b5a8a9f711ac 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -8,6 +8,7 @@ #include =20 #include +#include =20 struct vcpu_vmid { uint64_t generation; @@ -49,6 +50,8 @@ struct arch_vcpu { =20 struct cpu_info *cpu_info; =20 + struct vtimer vtimer; + register_t hcounteren; register_t hedeleg; register_t henvcfg; diff --git a/xen/arch/riscv/include/asm/vtimer.h b/xen/arch/riscv/include/a= sm/vtimer.h new file mode 100644 index 000000000000..0d1555511755 --- /dev/null +++ b/xen/arch/riscv/include/asm/vtimer.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * (c) 2023-2024 Vates + */ + +#ifndef ASM__RISCV__VTIMER_H +#define ASM__RISCV__VTIMER_H + +#include + +struct vtimer { + struct timer timer; +}; + +int vcpu_vtimer_init(struct vcpu *v); +void vcpu_timer_destroy(struct vcpu *v); + +void vtimer_set_timer(struct vtimer *t, uint64_t ticks); + +#endif /* ASM__RISCV__VTIMER_H */ diff --git a/xen/arch/riscv/vtimer.c b/xen/arch/riscv/vtimer.c new file mode 100644 index 000000000000..32d142bcdfcd --- /dev/null +++ b/xen/arch/riscv/vtimer.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +#include + +static void vtimer_expired(void *data) +{ + struct vtimer *t =3D data; + struct vcpu *v =3D container_of(t, struct vcpu, arch.vtimer); + + vcpu_set_interrupt(v, IRQ_VS_TIMER); +} + +int vcpu_vtimer_init(struct vcpu *v) +{ + struct vtimer *t =3D &v->arch.vtimer; + + init_timer(&t->timer, vtimer_expired, t, v->processor); + + return 0; +} + +void vcpu_timer_destroy(struct vcpu *v) +{ + struct vtimer *t =3D &v->arch.vtimer; + + if ( t->timer.status =3D=3D TIMER_STATUS_invalid ) + return; + + kill_timer(&v->arch.vtimer.timer); +} + +void vtimer_set_timer(struct vtimer *t, const uint64_t ticks) +{ + struct vcpu *v =3D container_of(t, struct vcpu, arch.vtimer); + s_time_t expires =3D ticks_to_ns(ticks - boot_clock_cycles); + + vcpu_unset_interrupt(v, IRQ_VS_TIMER); + + /* + * According to the RISC-V sbi spec: + * If the supervisor wishes to clear the timer interrupt without + * scheduling the next timer event, it can either request a timer + * interrupt infinitely far into the future (i.e., (uint64_t)-1), + * or it can instead mask the timer interrupt by clearing sie.STIE C= SR + * bit. + */ + if ( ticks =3D=3D ((uint64_t)~0) ) + { + stop_timer(&t->timer); + + return; + } + + if ( expires < NOW() ) + { + /* + * Simplify the logic if the timeout has already expired and just + * inject the event. + */ + stop_timer(&t->timer); + vcpu_set_interrupt(v, IRQ_VS_TIMER); + + return; + } + + migrate_timer(&t->timer, smp_processor_id()); + set_timer(&t->timer, expires); +} --=20 2.52.0