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[109.243.64.38]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-60566c2aba9sm10443034a12.2.2025.06.05.08.59.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jun 2025 08:59:12 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 06dda368-4226-11f0-b894-0df219b8e170 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1749139153; x=1749743953; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=GaIQRtc9d3iSedrxQcJBg3temD5lEMJYTzMYZJj6Vlw=; b=QwV/na8SYaZzCLPwdlGYAhC5LxLVV5x50//XKIrK3kLnwHwckxu0G0zD/IxVpc6vOw 3KkH0UTVhUHkS8i6JjCJ1KKK3A7Yw6T5LdZ3wytJdgrP0eb/8QmEavVtPDrCY9JOCcwH ir6xvMHkOz9Xn/i85CUwqkJJN0aFpsOc23oLWI34rOuDJHpyqORBYY0jzWIw0GErTqZB IP3kRgPigxWrY5UYkaCUNPbc3pjutUYZYnW6BCawVBEz6Fcw/mF8os+Caf8mEoz7EhRp WpPXzRUmdNkgE9p/lgtXQI0dP+8jAPZKHZ2/1QsMjQaSml6buTvPdKTdkTYBX0HSP3yx wmCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1749139153; x=1749743953; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GaIQRtc9d3iSedrxQcJBg3temD5lEMJYTzMYZJj6Vlw=; b=H8tWz4UdxfbT8OnN2r/A5jbV9MxSZCX6I8/0No8tn7XOLUDmOA+bs3xXawt1eblgIO NFmd7PNT+xoV9x/s1SQYbZVCRqtF+K+CSIkS716TFH/GKZBt4+GW0XQfyWGkJ2eHitEL o4TI68CxU+nRwk1lO2yNwLaw/4lVAIsPZ7AJ+Om88eTeWKpNyw4nGyGLkkmIk/DyoW+l u8CUowGuX2816vFzNN5Q9L7xjBLAaaFu/Q+78Cqcfg6j/M60LXUQGm86z75aNqJ6mULf 60N0l41+w+8oPN7azW1vLd+WgtRwCI3r2n91F7Y14QCaywANOhUfqpGJFT3eji8aNB2d foVA== X-Gm-Message-State: AOJu0YyTbc/JimhhEVaVpJqLILpGYz9yBhVsxLuQvYqrRRWGZcxjodP5 KNhKYGS365Hni6B5yxszusAfMsV77USjBqbjF+4rUFg0NOQNFIMkXygsszi9RQ== X-Gm-Gg: ASbGncsblRNkMnnMLGzYQW456oaxZW+ZSqJVdle+D5Bddbo9zD4v6xAAEP3SDlHPFCH gkjXH0NbqlwmRWIsGF2ESaw34FCOurjxzoTBd/oVA0+FLUvZZdN2IpGlJ7GV8M/GsXjqJQ+BbMb N5/30y65OwouDnUM3I8uwPv3QvTu3ZMPY3ujnLzn1iJ5yTyK2Fs76Qk+7QWmp4hxGoY2CxdNBy0 vX/TIB9XWCa7DaYDEwtuLH96Qfc+DQJzcaaeduyBL7AA0pRMSjM+DHYpE9sstI6BD+Ola/Dpo3R bEPPd/FTuq2LVmD1gbi2sYI3GqaH/flRtvOT7kirCCj2AMyxI7rpt7BGlbrftI0rLkuXw9I+iuN WfbUF9HGkGQW09ervMcCe5EMIrtjg X-Google-Smtp-Source: AGHT+IEWPlkK/iMLYQiBhbCLgaRh59G0rEJ5K074BH6um0qrYe3P2tGlwobmKcfS7rA2jE8i4RCk1A== X-Received: by 2002:a05:6402:350b:b0:607:32e8:652 with SMTP id 4fb4d7f45d1cf-60732e806ccmr1706776a12.19.1749139153169; Thu, 05 Jun 2025 08:59:13 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v4 1/9] xen/riscv: dt_processor_hartid() implementation Date: Thu, 5 Jun 2025 17:58:57 +0200 Message-ID: <751343d295c0fa6a9a7d8f2265ece3faecd44b64.1749121437.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1749139183358116600 Content-Type: text/plain; charset="utf-8" Implements dt_processor_hartid() to get the hart ID of the given device tree node and do some checks if CPU is available and given device tree node has proper riscv,isa property. As a helper function dt_get_hartid() is introduced to deal specifically with reg propery of a CPU device node. Signed-off-by: Oleksii Kurochko --- Changes in V4: - Sort properly inculsion of xen/types.h in riscv/smpboot.c. - Add overflow check of got address cell value in dt_get_hartid(). - Use "%#lx" for loging recieved hartid from DTB. - s/-EINVAL/-ENODEV for recieved isa string from DTB. --- Changes in V3: - s/dt_processor_cpuid/dt_processor_hartid. - s/dt_get_cpuid/dt_get_hartid. - use ~0UL in dt_get_cpuid() and in the comment above it. - change type for local variable ac in dt_get_cpuid() to unsigned int. - Update the return errors for dt_processor_cpuid(). - Update the commit message + subject: s/cpuid/hartid. --- Changes in V2: - s/of_get_cpu_hwid()/dt_get_cpu_id(). - Update prototype of dt_get_cpu_hwid(), use pointer-to-const for cpun arg. - Add empty line before last return in dt_get_cpu_hwid(). - s/riscv_of_processor_hartid/dt_processor_cpuid(). - Use pointer-to_const for node argument of dt_processor_cpuid(). - Use for hart_id unsigned long type as according to the spec for RV128 mhartid register will be 128 bit long. - Update commit message and subject. - use 'CPU' instead of 'HART'. - Drop thread argument of dt_get_cpu_id() (of_get_cpu_hwid) as it is expected to be always 0 according to RISC-V's DTS binding. --- xen/arch/riscv/include/asm/smp.h | 4 ++ xen/arch/riscv/smpboot.c | 77 ++++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/= smp.h index 5e170b57b3..eb58b6576b 100644 --- a/xen/arch/riscv/include/asm/smp.h +++ b/xen/arch/riscv/include/asm/smp.h @@ -26,6 +26,10 @@ static inline void set_cpuid_to_hartid(unsigned long cpu= id, =20 void setup_tp(unsigned int cpuid); =20 +struct dt_device_node; +int dt_processor_hartid(const struct dt_device_node *node, + unsigned long *hartid); + #endif =20 /* diff --git a/xen/arch/riscv/smpboot.c b/xen/arch/riscv/smpboot.c index 0f9c2cc54a..8011876372 100644 --- a/xen/arch/riscv/smpboot.c +++ b/xen/arch/riscv/smpboot.c @@ -1,6 +1,9 @@ #include +#include +#include #include #include +#include =20 #include =20 @@ -14,3 +17,77 @@ void __init smp_prepare_boot_cpu(void) cpumask_set_cpu(0, &cpu_possible_map); cpumask_set_cpu(0, &cpu_online_map); } + +/** + * dt_get_hartid - Get the hartid from a CPU device node + * + * @cpun: CPU number(logical index) for which device node is required + * + * Return: The hartid for the CPU node or ~0UL if not found. + */ +static unsigned long dt_get_hartid(const struct dt_device_node *cpun) +{ + const __be32 *cell; + unsigned int ac; + uint32_t len; + unsigned int max_cells =3D UINT32_MAX / sizeof(*cell); + + ac =3D dt_n_addr_cells(cpun); + cell =3D dt_get_property(cpun, "reg", &len); + + if (ac > max_cells) { + printk("%s: cell count overflow (ac=3D%u, max=3D%u)\n", __func__, = ac, + max_cells); + return ~0UL; + } + + if ( !cell || !ac || ((sizeof(*cell) * ac) > len) ) + return ~0UL; + + return dt_read_number(cell, ac); +} + +/* + * Returns the hartid of the given device tree node, or -ENODEV if the node + * isn't an enabled and valid RISC-V hart node. + */ +int dt_processor_hartid(const struct dt_device_node *node, + unsigned long *hartid) +{ + const char *isa; + int ret; + + if ( !dt_device_is_compatible(node, "riscv") ) + { + printk("Found incompatible CPU\n"); + return -ENODEV; + } + + *hartid =3D dt_get_hartid(node); + if ( *hartid =3D=3D ~0UL ) + { + printk("Found CPU without CPU ID\n"); + return -ENODATA; + } + + if ( !dt_device_is_available(node)) + { + printk("CPU with hartid=3D%#lx is not available\n", *hartid); + return -ENODEV; + } + + if ( (ret =3D dt_property_read_string(node, "riscv,isa", &isa)) ) + { + printk("CPU with hartid=3D%#lx has no \"riscv,isa\" property\n", *= hartid); + return ret; + } + + if ( isa[0] !=3D 'r' || isa[1] !=3D 'v' ) + { + printk("CPU with hartid=3D%#lx has an invalid ISA of \"%s\"\n", *h= artid, + isa); + return -ENODEV; + } + + return 0; +} --=20 2.49.0