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charset="utf-8" Calibration logic assumes that the platform timer (HPET or ACPI PM timer) and the TSC are read at about the same time. This assumption may not hold when a long latency event (e.g. SMI or NMI) occurs between the two reads. Reduce the risk of reading uncorrelated values by doing at least four pairs of reads, using the tuple where the delta between the enclosing TSC reads was smallest. From the fourth iteration onwards bail if the new TSC delta isn't better (smaller) than the best earlier one. Signed-off-by: Jan Beulich --- Obviously (I think) instead of having both read_{hpet,pmtmr}_and_tsc() the calibration logic could be folded between HPET and PMTMR, at the expense of a couple more indirect calls (which may not be that much of a problem as this is all boot-time only). Really such folding would have been possible already before, just that the amount of duplicate code hasn't been this large so far. IOW if so desired, then perhaps the folding should be a separate prereq patch. --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -392,9 +392,36 @@ static u64 read_hpet_count(void) return hpet_read32(HPET_COUNTER); } =20 +static uint32_t __init read_hpet_and_tsc(uint64_t *tsc) +{ + uint64_t tsc_prev =3D *tsc =3D rdtsc_ordered(), tsc_min =3D ~0; + uint32_t best =3D best; + unsigned int i; + + for ( i =3D 0; ; ++i ) + { + uint32_t hpet =3D hpet_read32(HPET_COUNTER); + uint64_t tsc_cur =3D rdtsc_ordered(); + uint64_t tsc_delta =3D tsc_cur - tsc_prev; + + if ( tsc_delta < tsc_min ) + { + tsc_min =3D tsc_delta; + *tsc =3D tsc_cur; + best =3D hpet; + } + else if ( i > 2 ) + break; + + tsc_prev =3D tsc_cur; + } + + return best; +} + static int64_t __init init_hpet(struct platform_timesource *pts) { - uint64_t hpet_rate, start; + uint64_t hpet_rate, start, end; uint32_t count, target, elapsed; /* * Allow HPET to be setup, but report a frequency of 0 so it's not sel= ected @@ -466,13 +493,13 @@ static int64_t __init init_hpet(struct p =20 pts->frequency =3D hpet_rate; =20 - count =3D hpet_read32(HPET_COUNTER); - start =3D rdtsc_ordered(); + count =3D read_hpet_and_tsc(&start); target =3D CALIBRATE_VALUE(hpet_rate); while ( (elapsed =3D hpet_read32(HPET_COUNTER) - count) < target ) continue; + elapsed =3D read_hpet_and_tsc(&end) - count; =20 - return adjust_elapsed(rdtsc_ordered() - start, elapsed, target); + return adjust_elapsed(end - start, elapsed, target); } =20 static void resume_hpet(struct platform_timesource *pts) @@ -505,9 +532,36 @@ static u64 read_pmtimer_count(void) return inl(pmtmr_ioport); } =20 +static uint32_t __init read_pmtmr_and_tsc(uint64_t *tsc) +{ + uint64_t tsc_prev =3D *tsc =3D rdtsc_ordered(), tsc_min =3D ~0; + uint32_t best =3D best; + unsigned int i; + + for ( i =3D 0; ; ++i ) + { + uint32_t pmtmr =3D inl(pmtmr_ioport); + uint64_t tsc_cur =3D rdtsc_ordered(); + uint64_t tsc_delta =3D tsc_cur - tsc_prev; + + if ( tsc_delta < tsc_min ) + { + tsc_min =3D tsc_delta; + *tsc =3D tsc_cur; + best =3D pmtmr; + } + else if ( i > 2 ) + break; + + tsc_prev =3D tsc_cur; + } + + return best; +} + static s64 __init init_pmtimer(struct platform_timesource *pts) { - uint64_t start; + uint64_t start, end; uint32_t count, target, mask, elapsed; =20 if ( !pmtmr_ioport || (pmtmr_width !=3D 24 && pmtmr_width !=3D 32) ) @@ -516,13 +570,13 @@ static s64 __init init_pmtimer(struct pl pts->counter_bits =3D pmtmr_width; mask =3D 0xffffffff >> (32 - pmtmr_width); =20 - count =3D inl(pmtmr_ioport); - start =3D rdtsc_ordered(); + count =3D read_pmtmr_and_tsc(&start); target =3D CALIBRATE_VALUE(ACPI_PM_FREQUENCY); - while ( (elapsed =3D (inl(pmtmr_ioport) - count) & mask) < target ) + while ( ((inl(pmtmr_ioport) - count) & mask) < target ) continue; + elapsed =3D read_pmtmr_and_tsc(&end) - count; =20 - return adjust_elapsed(rdtsc_ordered() - start, elapsed, target); + return adjust_elapsed(end - start, elapsed, target); } =20 static struct platform_timesource __initdata plt_pmtimer =3D