From nobody Wed Aug 26 18:01:51 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1783353561; cv=none; d=zohomail.com; s=zohoarc; b=j4dZn3x5WA/uP7J377mKsgPa9iVGr+LcbzrMSQnPxIyxLf8er6HMFrBkj4c8f/iMx65sBnfVvIvjzvd8HrnjNbUL55bli0tcnhW5l3rBkemqhwfCucuSudpMg8g6dRL/9Wmo8/1wqYPxsIsIZn1hRQ4vpSJaKCFl+N2Meooyd6o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1783353561; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FHkgIPf46HKPOxJxqgCmDuDrFwFnSVGNxj+iOnJ7uQ0=; b=TSaK9GnF5pOO4MFcMhfMpaGWK93XnMvrvYp5HjiLC4szJI6WBasrm32FnfOuc4bEVc2+c/TZBFey7e8dc6uvXtSGMfDuT7ZbQPX1dKuXYPH2BMnpDBG0RnhLrPOfpvE39SfPbHqzTtjIndOZg/NuF7ePDZ52NurgqROp/Jc4fEo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1783353561335656.5348024005225; Mon, 6 Jul 2026 08:59:21 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1355519.1610399 (Exim 4.92) (envelope-from ) id 1wgliW-0002Qz-F6; Mon, 06 Jul 2026 15:58:44 +0000 Received: by outflank-mailman (output) from mailman id 1355519.1610399; Mon, 06 Jul 2026 15:58:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wgliV-0002OI-ML; Mon, 06 Jul 2026 15:58:43 +0000 Received: by outflank-mailman (input) for mailman id 1355519; Mon, 06 Jul 2026 15:58:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wgliT-0001mr-AA for xen-devel@lists.xenproject.org; Mon, 06 Jul 2026 15:58:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wgliS-003COz-NC for xen-devel@lists.xenproject.org; Mon, 06 Jul 2026 17:58:40 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a4bd092-2eae-0a2a0a5409dd-0a2a4502b80a-46 for ; Mon, 06 Jul 2026 17:58:40 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a4bd0b0-5a27-0a2a45020019-d1558029e442-3 for ; Mon, 06 Jul 2026 17:58:40 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-493bc8fda98so35469985e9.0 for ; Mon, 06 Jul 2026 08:58:40 -0700 (PDT) Received: from fedora (user-109-243-144-234.play-internet.pl. [109.243.144.234]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-493cce03fa1sm284910325e9.11.2026.07.06.08.58.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jul 2026 08:58:39 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1783353520; x=1783958320; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=FHkgIPf46HKPOxJxqgCmDuDrFwFnSVGNxj+iOnJ7uQ0=; b=CCh6zxhC3iUas9wAlCoEZ9Q4JbJWYVcmSEunx7SjDLGNwxQ594Jz7o/FV7cYPdIZVL h5bVYyYgAmS2ADNl9a0Eb3fn+My+L+mktap4MPDy4l/BBXZIvSn+Q5PzGXKO7K8jMbj9 kUEpEILaZaTpctWWCNEs1e1wn1wp5qG9Fc8gZK7jReg8Gn6NXULVyp4asw7zIaNiqco2 fMguOjSwZkXn0+FekZomsDi80MMY70Lq8/yCk7BDNgJlnK/An4BD8zXaSfDx/wkqNjWC 2lixyBrLEgEtJ6h8ryDaegP6mVeScTZ8eOFwboPg9jbmrwSxyo8Xp6n/sVDJx3I8jnJQ p9bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783353520; x=1783958320; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=FHkgIPf46HKPOxJxqgCmDuDrFwFnSVGNxj+iOnJ7uQ0=; b=IIIXWwjkOecRtqlDOSF0QeREPTyF0IFJanwDl7cWrOlkhq4Bj01xZ3pY1wPBxpUVcj NossPFXtAuwySvc4YMn5rxMSUWnKXjomhZdZo5ovJ7z/oiaF1kSWxoNGiV0XjHL+RM1N 15R6QlMWQ9IOD84OJWRNerLxS811HaNO8umR9Fbh/Nmbn3HexF7yr+VbXWYSg5dKAg9w N1BD+ceXP8xpkFrn5saQGBUTf3rFu4PGMS1uUNclwjpboi1ps0Bha1zf5lrty5oWlOLH t2oUVqgqZ7DqlbzT7AWCPC6UXYc/CksJavLjeZVYoC/z5H81LjE9QDqeaGZ44MMMExkd mzow== X-Gm-Message-State: AOJu0Yz5Wo9xc1/U/ZZXPbHFLQYlm+aB5B10TrRU1KqzndekQdSLzVZ2 BRfHv/m95BHA6XBC53MPcyzGsjJaM1M7T85D8DfVOZD+5s2IwA1PQhexwoZr1Q== X-Gm-Gg: AfdE7cnU4TN59wiKpRIpjRePMfjLSYvEjWmKFpz3e7OrK0m1TSW7lO6XlJ2SYYJ6jHP hd6uD3sEksrtTr+zkLbmp1rVoM41kc3Xp261/GIbajLp08FbnSuPXfMhnW8fieTRzA5gMd22G9U 2U+auv8u9Zmigj/c8JPer+1yUzJDhWR88VwGW4q3c5Rbl7k3luZD2ODozrY2hy09ja3j34Uzz8Y ajsQW06TpWoB53tDZw7KrHm4kdk3F7/oSXOaMJyGyWF2MKq1f0e1mU0nvb3vCUxqSMmhAw7tqx2 YP1bsD5hV00yokCvpR0XLOR+ozPUCYgg/HfWksytEPcKJ8uIzfeMmNizY3VelIPxb+bnjtYvxNA HdO7EGhuWMjruLj2nvt9ZbWbGKlm61WgTTyXFxfc2JUsOfQvtjBI4aDBTxzR4qGWC9IABuJTUFn enOIwINZb5WqqwytTtmRs9BOq2y+bn4sjOCcouZ9RAjgPjVxpCIE1IhGWbNw== X-Received: by 2002:a05:600c:8b82:b0:493:bd2a:93bb with SMTP id 5b1f17b1804b1-493df038790mr14690605e9.3.1783353520093; Mon, 06 Jul 2026 08:58:40 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Baptiste Le Duc , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 16/26] xen/riscv: introduce per-vCPU IMSIC state Date: Mon, 6 Jul 2026 17:57:57 +0200 Message-ID: <5d7e0342ac4eeb65defd58a923267c4b0f8029b7.1783331040.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1783353520-4D50C7C5-F6A1770B/10/73395122804 X-purgate-type: spam X-purgate-size: 6433 X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1783353562924158500 Content-Type: text/plain; charset="utf-8" Each vCPU interacting with the IMSIC requires state to track the associated guest interrupt file and its backing context. Introduce a per-vCPU structure to hold IMSIC-related state, including the guest interrupt file identifier and the CPU providing the backing VS-file. Access to the guest file identifier is protected by a lock. Initialize this structure during vCPU setup and store it in arch_vcpu. The initial state marks the VS-file as software-backed until it becomes associated with a physical CPU. Add helper to retrieve the guest interrupt file identifier: - vcpu_guest_file_id() is going to be used during update of APLIC's target register with the pair of information (to have MSI delivery mode work properly) when guest is trying to access vAPLIC's target register. It will be used in the follow up patches. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Move v->arch.vimsic_state =3D imsic_state; after full initialization of the struct, so the pointer only becomes globally visible once all fields are set up. - Add Acked-by: Jan Beulich . --- Changes in v4: - s/w vs h/w IMSIC VS-file commentary for struct vimsic_state: - fix the vsfile_pcpu h/w condition: "vsfile_pcpu >=3D 0" -> "vsfile_pcpu < NR_CPUS" (the old wording conflicted with the s/w "=3D=3D NR_CPUS" case). - reorder both comment blocks to the "s/w ... / h/w ..." form for readab= ility. - drop IMPOSSIBLE_GUEST_FILE_ID: the s/w IMSIC VS-file is always available and corresponds to guest_file_id =3D=3D 0, which xvzalloc() already prov= ides, so the explicit initializer in vcpu_imsic_init() and the macro itself are unneeded. --- Changes in v3: - Drop const from imsic_set_guest_file_id() and vcpu_imsic_deinit() as it only works due to vimsic_state being a pointer member. - Use XVFREE() in vcpu_imsic_deinit() to make it idempotent. - Fix SW-file typo in struct vimsic_state comments; should be VS-file. - Drop imsic_set_guest_file_id() here, it will be added later when it will be nessary to initialise guest file id as the correspondendt code in this patch series was reworked and there is no need to use this function in arch_vcpu_create(). - Introduce IMPOSSIBLE_GUEST_FILE_ID and init with it ->guest_file_id. --- Changes in v2: - Rename imsic_state to vimsic_state. - Use 'unsigned int' for vsfile_pcpu. - Drop initialzation of ->guest_file_id as it will be by default zero. - Add the comment about ->guest_file_id field. - Drop __init for vcpu_imsic_init() as it could be used during post-boot vCPU creation. - Update the commit message. - Drop locks around ->guest_file_id() in vcpu_guest_file_id() and imsic_s= et_guest_file_id(). --- --- xen/arch/riscv/imsic.c | 35 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/imsic.h | 22 ++++++++++++++++++ 3 files changed, 59 insertions(+) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index f7b70a8da09e..5a5758e45dc2 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -56,6 +57,11 @@ do { \ csr_clear(CSR_SIREG, v); \ } while (0) =20 +unsigned int vcpu_guest_file_id(const struct vcpu *v) +{ + return ACCESS_ONCE(v->arch.vimsic_state->guest_file_id); +} + void __init imsic_ids_local_delivery(bool enable) { if ( enable ) @@ -312,6 +318,35 @@ static int imsic_parse_node(const struct dt_device_nod= e *node, return 0; } =20 +int vcpu_imsic_init(struct vcpu *v) +{ + struct vimsic_state *imsic_state; + + /* Allocate IMSIC context */ + imsic_state =3D xvzalloc(struct vimsic_state); + if ( !imsic_state ) + return -ENOMEM; + + /* Setup IMSIC context */ + rwlock_init(&imsic_state->vsfile_lock); + + /* + * xvzalloc() already cleared the context, so guest_file_id =3D=3D 0, = i.e. the + * always-available s/w IMSIC VS-file. Only vsfile_pcpu needs an expli= cit + * initializer as its s/w VS-file value is NR_CPUS rather than 0. + */ + imsic_state->vsfile_pcpu =3D NR_CPUS; + + v->arch.vimsic_state =3D imsic_state; + + return 0; +} + +void vcpu_imsic_deinit(struct vcpu *v) +{ + XVFREE(v->arch.vimsic_state); +} + /* * Initialize the imsic_cfg structure based on the IMSIC DT node. * diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index bdc6086a1752..a0f681e25c33 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,6 +54,8 @@ struct arch_vcpu { =20 struct vtimer vtimer; =20 + struct vimsic_state *vimsic_state; + register_t hcounteren; register_t hedeleg; register_t hideleg; diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/as= m/imsic.h index c6c59215df20..e2c413487d24 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -11,6 +11,7 @@ #ifndef ASM_RISCV_IMSIC_H #define ASM_RISCV_IMSIC_H =20 +#include #include #include #include @@ -61,7 +62,24 @@ struct imsic_config { spinlock_t lock; }; =20 +struct vimsic_state { + /* IMSIC VS-file */ + rwlock_t vsfile_lock; + /* + * s/w IMSIC VS-file -> guest_file_id =3D=3D 0 + * h/w IMSIC VS-file -> guest_file_id > 0 + */ + unsigned int guest_file_id; + /* + * s/w IMSIC VS-file -> vsfile_pcpu =3D=3D NR_CPUS + * h/w IMSIC VS-file -> vsfile_pcpu < NR_CPUS + */ + unsigned int vsfile_pcpu; +}; + struct dt_device_node; +struct vcpu; + int imsic_init(const struct dt_device_node *node); =20 const struct imsic_config *imsic_get_config(void); @@ -71,4 +89,8 @@ void imsic_irq_disable(unsigned int hwirq); =20 void imsic_ids_local_delivery(bool enable); =20 +int vcpu_imsic_init(struct vcpu *v); +void vcpu_imsic_deinit(struct vcpu *v); +unsigned int vcpu_guest_file_id(const struct vcpu *v); + #endif /* ASM_RISCV_IMSIC_H */ --=20 2.54.0