From nobody Tue Mar 3 04:55:55 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1771604388; cv=none; d=zohomail.com; s=zohoarc; b=OAC57UNRrtiD8L5D4aP14u9PCt+WC2tX4LH/k5JAIrFBdUxqUOAXQi1PehfbQxLsd0YqtkFVfF843Zw3aaNysyzRCIIplRJja08usP3YsaBvS9gmhjMwyCf+BkWMHeF3MgBp60CoiK5L7K52dH9xHGp+ESqIqJGfYsCLZ8aHQ1E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1771604388; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=VGHRmL2iWDUaQ6x5sen7QQ6MZAJ2q1tuNN96Ty+TTdE=; b=WLtLrvbKmcYkDpxQyW3XonExJoVYWmXrFXcaOAntfynv684u5Rq0Y++S3+iEk3DKLoNRSsk0tEDG9fk7Zck56EOBJ4QiNBiIdlIvqCPY8Br+6Zdbhima/TtNSToA4iKJXgmLeSn+v1lsBL+6aXLmvFHFd3SZY0TXOFQBVKUamVo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1771604388745357.36780776324815; Fri, 20 Feb 2026 08:19:48 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1237333.1539685 (Exim 4.92) (envelope-from ) id 1vtTDw-0000Sw-0I; Fri, 20 Feb 2026 16:19:24 +0000 Received: by outflank-mailman (output) from mailman id 1237333.1539685; Fri, 20 Feb 2026 16:19:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDv-0000SD-Qw; Fri, 20 Feb 2026 16:19:23 +0000 Received: by outflank-mailman (input) for mailman id 1237333; Fri, 20 Feb 2026 16:19:22 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vtTDu-0000Q4-BJ for xen-devel@lists.xenproject.org; Fri, 20 Feb 2026 16:19:22 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e8b2aab6-0e77-11f1-9ccf-f158ae23cfc8; Fri, 20 Feb 2026 17:19:19 +0100 (CET) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-4327790c4e9so1559300f8f.2 for ; Fri, 20 Feb 2026 08:19:19 -0800 (PST) Received: from fedora (user-109-243-67-101.play-internet.pl. [109.243.67.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43796a6c1bfsm56991068f8f.13.2026.02.20.08.19.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Feb 2026 08:19:18 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e8b2aab6-0e77-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771604359; x=1772209159; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VGHRmL2iWDUaQ6x5sen7QQ6MZAJ2q1tuNN96Ty+TTdE=; b=ZQLrgv8eFLYDpJg95KnrAGIIavZTmeLkRnxv06MDoVAzytzIjfz9He51eiBQBZPA/+ sW6KJO9Ej/pkMXWYJA7xDt0DtgVxx8vJ0ZIsIKfpqqNKaUIbZ2LccySj3sZZH5UITa7V YvqVT07i9gBRMAdLzD5KPrwa6TEOm0bmfHPa4ZsEgz14RjsoeHASsbMflfs0jwHbfwJP 4uYYctL4sS/u8g+Tf4cdBIFQqCJ7AqT9J6ypk9P/MR3w5WB47GFX4jcQ4cGgWve9XGc3 tRjawvmvPmWL7W2qXTuWNKT+WLmUBZmYHbKfxXRHCX74bxBuqcizNtSFhlbvFJhyFVe3 jngA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771604359; x=1772209159; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=VGHRmL2iWDUaQ6x5sen7QQ6MZAJ2q1tuNN96Ty+TTdE=; b=Bwoh3DQ2B2ZCGboU76Mr25XXZdOke4rQ2eTzcFNbuHVjXDbBA0gqoU5JeWbVy0evtd taig8jAVlSw96ml3XmNUhV8OB0F3241jCeeObcQ0cEGRkhUj/opYyw2WSpW2jCuIbJnt EVgK252e1N1qpudxwgc5qfIT67V7RH61hlrnwyy5o1YZdPOojaNS9IqLqKcdCPaiK88s LSLZ8AqYVJF0qj/tv9CUevIlSe0hw2sT+9xQ2Fc/DhiAM9SJltIZShttuCQHZfgm6Vng fF+KpJqpTVudZKKk7LjOK12RHLXFeHMKVKhmgMsmPqP0VFsOaFLhzY2uAlLW26IWKdN8 L+6g== X-Gm-Message-State: AOJu0YyQrFhcZoAnSBuH8sspuEHAzUmKvFeqJD4Q4JPecDpqEQy3AAog ssHTBs8+IKljHgNYzYal9BlQmK6jjIUyIJQykuav6ebpPLDV9x2kieICfZ3JzQ== X-Gm-Gg: AZuq6aIpCwDzsomnfPtG/qmgUgtGeWIiplgi50mrmbN/GUOnAnw8wmZ1O8JsZZ3XaP5 2WaLP3Gfav3111EEgdWBTjDL4jtcARcJ7EU9jKNFBQm9LQuKMNR0nkMbhP9u0orTr9Y6GUFwgQp IvE83iK/P8braeEC8WRvqua0fwyW6mDqyVxG7ld07bu3YbKbaS8KdQRRK42dqidRZ/Ub7Zes5sF v3pFaA47OUVpeME4b+ejjO1ak1Z/LkRLCaji5jSLoc8+IuFYTIKWexJTHAkDKSpV+ePtaVwiVfd k+lvLg/XsvVER92TB1EatL1edCTO3eUsxkGddPLvbToSLrxbBRbDlg4acy1ZCsCvS8bNnD6A9HY BrKIOuwJsEjEauCVfpXRrOi/vcgz4nelcrma5h3YMZwkMYkaL7Adm2TdLP+lomt7MN/ljcBECt9 u+IdckcDy/sE7zSf79qsB8x7vWSXWUNzzv1gmZ8IiYR6C5zdwcg6nGXss23cTZ+czD2A== X-Received: by 2002:a05:6000:26cd:b0:436:369f:39f9 with SMTP id ffacd0b85a97d-4396f1a70b5mr756546f8f.57.1771604358526; Fri, 20 Feb 2026 08:19:18 -0800 (PST) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v5 01/14] xen/riscv: detect and store supported hypervisor CSR bits at boot Date: Fri, 20 Feb 2026 17:18:56 +0100 Message-ID: <4f36d83e58bfba807660ebc1fc48e71ae056805a.1771590794.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1771604392954158500 Content-Type: text/plain; charset="utf-8" Some hypervisor CSRs expose optional functionality and may not implement all architectural bits. Writing unsupported bits can either be ignored or raise an exception depending on the platform. Detect the set of writable bits for selected hypervisor CSRs at boot and store the resulting masks for later use. This allows safely programming these CSRs during vCPU context switching and avoids relying on hardcoded architectural assumptions. Note that csr_set() is used instead of csr_write() to write all ones to the mask, as the CSRRS instruction, according to the RISC-V specification, sets only those bits that are writable (note that the quote consider only non-read-only CSRs as writing to read-only CSRs according to the spec. will raise an exception): Any bit that is high in rs1 will cause the corresponding bit to be set in the CSR, if that CSR bit is writable. In contrast, the CSRRW instruction does not take CSR bit writability into account, which could lead to unintended side effects when writing all ones to a CSR. Masks are calculated at the moment only for hedeleg, henvcfg, hideleg, hstateen0 registers as only them are going to be used in the follow up patch. If the Smstateen extension is not implemented, hstateen0 cannot be read because the register is considered non-existent. Instructions that attempt to access a CSR that is not implemented or not visible in the current mode are reserved and will raise an illegal-instruction exception. Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich --- Changes in V5: - Move everything related to csr_masks to domain.c and make it static. - Move declaration of old variable in init_csr_masks() inside INIT_CSR_MAS= K. - Use csr_swap() in INIT_CSR_MASK(). --- Changes in V4: - Move csr_masks defintion to domain.c. Make it static as at the moment it is going to be used only in domain.c. - Rename and refactor X macros inside init_csr_masks(). --- Changes in V3: - New patch. --- xen/arch/riscv/domain.c | 30 ++++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/setup.h | 2 ++ xen/arch/riscv/setup.c | 2 ++ 3 files changed, 34 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index b60320b90def..8b05f0f23b77 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -2,9 +2,39 @@ =20 #include #include +#include #include #include =20 +#include +#include + +struct csr_masks { + register_t hedeleg; + register_t henvcfg; + register_t hideleg; + register_t hstateen0; +}; + +static struct csr_masks __ro_after_init csr_masks; + +void __init init_csr_masks(void) +{ +#define INIT_CSR_MASK(csr, field) do { \ + register_t old; \ + old =3D csr_read(CSR_##csr); \ + csr_set(CSR_##csr, ULONG_MAX); \ + csr_masks.field =3D csr_swap(CSR_##csr, old); \ +} while (0) + + INIT_CSR_MASK(HEDELEG, hedeleg); + INIT_CSR_MASK(HENVCFG, henvcfg); + INIT_CSR_MASK(HIDELEG, hideleg); + + if ( riscv_isa_extension_available(NULL, RISCV_ISA_EXT_smstateen) ) + INIT_CSR_MASK(HSTATEEN0, hstateen0); +} + static void continue_new_vcpu(struct vcpu *prev) { BUG_ON("unimplemented\n"); diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/as= m/setup.h index c9d69cdf5166..2215894cfbb1 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -11,6 +11,8 @@ void setup_mm(void); =20 void copy_from_paddr(void *dst, paddr_t paddr, unsigned long len); =20 +void init_csr_masks(void); + #endif /* ASM__RISCV__SETUP_H */ =20 /* diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 9b4835960d20..bca6ca09eddd 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -137,6 +137,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, =20 riscv_fill_hwcap(); =20 + init_csr_masks(); + preinit_xen_time(); =20 intc_preinit(); --=20 2.53.0