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Wed, 14 Jan 2026 05:43:30 -0800 (PST) Message-ID: Date: Wed, 14 Jan 2026 14:43:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 1/6] x86/cpu-policy: define bits of leaf 6 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1768398230079158500 Content-Type: text/plain; charset="utf-8" ... as far as we presently use them in the codebase. Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk --- Or should we make both parts proper featureset elements? At least APERFMPERF could likely be made visible to guests (in principle). --- v3: Use SDM-conforming names. (Sorry Jason, had to drop you R-b once again.) v2: Use bool and unions. --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -121,7 +121,46 @@ struct cpu_policy uint64_t :64, :64; /* Leaf 0x3 - PSN. */ uint64_t :64, :64; /* Leaf 0x4 - Structured Cache. */ uint64_t :64, :64; /* Leaf 0x5 - MONITOR. */ - uint64_t :64, :64; /* Leaf 0x6 - Therm/Perf. */ + + /* Leaf 0x6 - Therm/Perf. */ + union { + uint32_t _6a; + struct { + bool :1, + turbo_boost:1, + arat:1, + :1, + :1, + :1, + :1, + hwp:1, + hwp_interrupt:1, + hwp_activity_window:1, + hwp_epp:1, + hwp_request_pkg:1, + :1, + hdc:1, + :1, + :1, + hwp_peci_override:1, + :1, + :1, + hw_feedback:1; + }; + }; + union { + uint32_t _6b; + }; + union { + uint32_t _6c; + struct { + bool hw_feedback_cap:1; + }; + }; + union { + uint32_t _6d; + }; + uint64_t :64, :64; /* Leaf 0x7 - Structured Features. */ uint64_t :64, :64; /* Leaf 0x8 - rsvd */ uint64_t :64, :64; /* Leaf 0x9 - DCA */ From nobody Mon Jan 26 07:40:28 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=quarantine dis=none) header.from=suse.com ARC-Seal: i=1; a=rsa-sha256; t=1768398247; cv=none; d=zohomail.com; s=zohoarc; b=Trba/F56FCCMhSw4LDwy9bX5WB/JDoih2sB4pY6NFI+ovd/0tUQ46PG0itfxUkXkd30jv5hCdJtkeMfZWmeB+AoGfSI2Mp7EtsCeC4h3tfWzF1A5MDnOe8YAF32I2Ps12WUk6kpcfI6H4eUNRImkTAKTqusjaNzX63gtv65JwXk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1768398247; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KQ36zvjxXpDCUHe0Pi5BKTF7mvA6vIQwzP/JbYlUIEI=; b=X+G4ARi7LTxRaNJGVNgwf3PXAEkcHBhm8YRNE38PuJ1mHNF+tBxge2P7REXF+Jydr1PeiwKhoHkZ0NrEtdWwFvcHb6NnwTjfCxXjfIdNLCVQ5r6g58PSUcz86IIEvpTqwb31LCLAFC58QW65x2RgGue7Nq4KmYaNBEWpsZDoq5c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1768398247911820.9497128302648; Wed, 14 Jan 2026 05:44:07 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1203103.1518400 (Exim 4.92) (envelope-from ) id 1vg1A9-0002KZ-BE; Wed, 14 Jan 2026 13:43:53 +0000 Received: by outflank-mailman (output) from mailman id 1203103.1518400; Wed, 14 Jan 2026 13:43:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vg1A9-0002KS-7r; Wed, 14 Jan 2026 13:43:53 +0000 Received: by outflank-mailman (input) for mailman id 1203103; Wed, 14 Jan 2026 13:43:52 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vg1A8-0002Ig-9G for xen-devel@lists.xenproject.org; Wed, 14 Jan 2026 13:43:52 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0ea617b9-f14f-11f0-9ccf-f158ae23cfc8; Wed, 14 Jan 2026 14:43:50 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-47775fb6c56so83045085e9.1 for ; Wed, 14 Jan 2026 05:43:50 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 14 Jan 2026 05:43:49 -0800 (PST) Message-ID: <29eb0997-bf74-4cde-ba7b-6977223c3829@suse.com> Date: Wed, 14 Jan 2026 14:43:49 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 2/6] x86: replace APERFMPERF synthetic feature bit From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1768398248662158500 Content-Type: text/plain; charset="utf-8" Use the respective host CPU policy bit instead. This has the (tolerable, as we generally assume symmetry anyway) effect of using the BSP's (unleveled) setting, rather than the result of leveling (as is done by identify_cpu() on boot_cpu_data, rendering the variable name somewhat misleading). Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk --- The leveling of boot_cpu_data is problematic anyway, as that way features can in principle disappear post-boot (as CPUs are being brought online; just that we don't think anymore that we really support physical CPU hotplug). --- v3: Re-base over naming changes. v2: Extend description. --- a/xen/arch/x86/acpi/cpufreq/cpufreq.c +++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c @@ -80,7 +80,7 @@ unsigned int get_measured_perf(unsigned return 0; =20 policy =3D per_cpu(cpufreq_cpu_policy, cpu); - if ( !policy || !cpu_has_aperfmperf ) + if ( !policy || !cpu_has_hw_feedback_cap ) return 0; =20 switch (flag) --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -523,10 +523,6 @@ static void generic_identify(struct cpui if ( cpu_has(c, X86_FEATURE_CLFLUSH) ) c->x86_clflush_size =3D ((ebx >> 8) & 0xff) * 8; =20 - if ( (c->cpuid_level >=3D CPUID_PM_LEAF) && - (cpuid_ecx(CPUID_PM_LEAF) & CPUID6_ECX_APERFMPERF_CAPABILITY) ) - __set_bit(X86_FEATURE_APERFMPERF, c->x86_capability); - /* AMD-defined flags: level 0x80000001 */ if (c->extended_cpuid_level >=3D 0x80000001) cpuid(0x80000001, &tmp, &tmp, --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -11,7 +11,9 @@ #include =20 #ifndef __ASSEMBLER__ +#include #include +#include #else #include #endif @@ -121,7 +123,6 @@ static inline bool boot_cpu_has(unsigned #define CPUID6_EAX_HDC BIT(13, U) #define CPUID6_EAX_HWP_PECI BIT(16, U) #define CPUID6_EAX_HW_FEEDBACK BIT(19, U) -#define CPUID6_ECX_APERFMPERF_CAPABILITY BIT(0, U) =20 /* CPUID level 0x00000001.edx */ #define cpu_has_fpu 1 @@ -175,6 +176,9 @@ static inline bool boot_cpu_has(unsigned #define cpu_has_fma4 boot_cpu_has(X86_FEATURE_FMA4) #define cpu_has_tbm boot_cpu_has(X86_FEATURE_TBM) =20 +/* CPUID level 0x00000006.ecx */ +#define cpu_has_hw_feedback_cap host_cpu_policy.basic.hw_feedback_cap + /* CPUID level 0x0000000D:1.eax */ #define cpu_has_xsaveopt boot_cpu_has(X86_FEATURE_XSAVEOPT) #define cpu_has_xsavec boot_cpu_has(X86_FEATURE_XSAVEC) @@ -292,7 +296,6 @@ static inline bool boot_cpu_has(unsigned /* Synthesized. */ #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) -#define cpu_has_aperfmperf boot_cpu_has(X86_FEATURE_APERFMPERF) #define cpu_has_xen_lbr boot_cpu_has(X86_FEATURE_XEN_LBR) #define cpu_has_xen_shstk (IS_ENABLED(CONFIG_XEN_SHSTK) && \ boot_cpu_has(X86_FEATURE_XEN_SHSTK)) --- a/xen/arch/x86/include/asm/cpufeatures.h +++ b/xen/arch/x86/include/asm/cpufeatures.h @@ -19,7 +19,7 @@ XEN_CPUFEATURE(TSC_RELIABLE, X86_SY XEN_CPUFEATURE(XTOPOLOGY, X86_SYNTH( 5)) /* cpu topology enum exte= nsions */ XEN_CPUFEATURE(CPUID_FAULTING, X86_SYNTH( 6)) /* cpuid faulting */ XEN_CPUFEATURE(XEN_FRED, X86_SYNTH( 7)) /* Xen uses FRED */ -XEN_CPUFEATURE(APERFMPERF, X86_SYNTH( 8)) /* APERFMPERF */ +/* Bit 8 unused */ XEN_CPUFEATURE(MFENCE_RDTSC, X86_SYNTH( 9)) /* MFENCE synchronizes RD= TSC */ XEN_CPUFEATURE(XEN_SMEP, X86_SYNTH(10)) /* SMEP gets used by Xen = itself */ XEN_CPUFEATURE(XEN_SMAP, X86_SYNTH(11)) /* SMAP gets used by Xen = itself */ From nobody Mon Jan 26 07:40:28 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Wed, 14 Jan 2026 05:44:28 -0800 (PST) Message-ID: <9d7de9e6-11ef-4cd5-94e1-4c1829ea94a3@suse.com> Date: Wed, 14 Jan 2026 14:44:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 3/6] x86: rename ARAT feature flag From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1768398288330158500 Content-Type: text/plain; charset="utf-8" Add a XEN infix, to properly distinguish it from the CPUID feature flag (leaf 6 EAX bit 2). Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk --- Question is whether we still need opt_arat (and the command line option), or whether we could go directly from the CPUID bit (overriding it to 1 for older AMD [and Hygon?] CPUs). Or whether to have opt_arat affect the (host) CPU policy directly. --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -109,7 +109,7 @@ void (*__read_mostly lapic_timer_on)(voi =20 bool lapic_timer_init(void) { - if ( boot_cpu_has(X86_FEATURE_ARAT) ) + if ( boot_cpu_has(X86_FEATURE_XEN_ARAT) ) { lapic_timer_off =3D lapic_timer_nop; lapic_timer_on =3D lapic_timer_nop; @@ -1463,7 +1463,7 @@ static void amd_cpuidle_init(struct acpi =20 if ( !vendor_override ) { - if ( !boot_cpu_has(X86_FEATURE_ARAT) ) + if ( !boot_cpu_has(X86_FEATURE_XEN_ARAT) ) hpet_broadcast_init(); =20 if ( !lapic_timer_init() ) --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1239,7 +1239,7 @@ static void cf_check init_amd(struct cpu * running in deep C states. */ if ( opt_arat && c->x86 > 0x11 ) - __set_bit(X86_FEATURE_ARAT, c->x86_capability); + __set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability); =20 /* * Prior to Family 0x14, perf counters are not reset during warm reboot. --- a/xen/arch/x86/cpu/hygon.c +++ b/xen/arch/x86/cpu/hygon.c @@ -81,7 +81,7 @@ static void cf_check init_hygon(struct c =20 /* Hygon processors have APIC timer running in deep C states. */ if (opt_arat) - __set_bit(X86_FEATURE_ARAT, c->x86_capability); + __set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability); =20 if (cpu_has(c, X86_FEATURE_EFRO)) { rdmsrl(MSR_K8_HWCR, value); --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -668,7 +668,7 @@ static void cf_check init_intel(struct c if ( opt_arat && ( c->cpuid_level >=3D 0x00000006 ) && ( cpuid_eax(0x00000006) & (1u<<2) ) ) - __set_bit(X86_FEATURE_ARAT, c->x86_capability); + __set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability); =20 if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c =3D=3D &boot_cpu_data ) --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -1633,7 +1633,7 @@ static int __init mwait_idle_probe(void) icpu =3D id->driver_data; cpuidle_state_table =3D icpu->state_table; =20 - if (boot_cpu_has(X86_FEATURE_ARAT)) + if (boot_cpu_has(X86_FEATURE_XEN_ARAT)) lapic_timer_reliable_states =3D LAPIC_TIMER_ALWAYS_RELIABLE; =20 pr_debug(PREFIX "v" MWAIT_IDLE_VERSION " model %#x\n", @@ -1792,7 +1792,7 @@ int __init mwait_idle_init(struct notifi return -ENODEV; =20 err =3D mwait_idle_probe(); - if (!err && !boot_cpu_has(X86_FEATURE_ARAT)) { + if (!err && !boot_cpu_has(X86_FEATURE_XEN_ARAT)) { hpet_broadcast_init(); if (xen_cpuidle < 0 && !hpet_broadcast_is_available()) err =3D -ENODEV; --- a/xen/arch/x86/include/asm/cpufeatures.h +++ b/xen/arch/x86/include/asm/cpufeatures.h @@ -13,7 +13,7 @@ /* Synthetic features */ XEN_CPUFEATURE(CONSTANT_TSC, X86_SYNTH( 0)) /* TSC ticks at a constan= t rate */ XEN_CPUFEATURE(NONSTOP_TSC, X86_SYNTH( 1)) /* TSC does not stop in C= states */ -XEN_CPUFEATURE(ARAT, X86_SYNTH( 2)) /* Always running APIC ti= mer */ +XEN_CPUFEATURE(XEN_ARAT, X86_SYNTH( 2)) /* Xen may utilize always= running APIC timer */ XEN_CPUFEATURE(ARCH_PERFMON, X86_SYNTH( 3)) /* Intel Architectural Pe= rfMon */ XEN_CPUFEATURE(TSC_RELIABLE, X86_SYNTH( 4)) /* TSC is known to be rel= iable */ XEN_CPUFEATURE(XTOPOLOGY, X86_SYNTH( 5)) /* cpu topology enum exte= nsions */ --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2644,7 +2644,7 @@ static int _disable_pit_irq(bool init) * XXX dom0 may rely on RTC interrupt delivery, so only enable * hpet_broadcast if FSB mode available or if force_hpet_broadcast. */ - if ( cpuidle_using_deep_cstate() && !boot_cpu_has(X86_FEATURE_ARAT) ) + if ( cpuidle_using_deep_cstate() && !boot_cpu_has(X86_FEATURE_XEN_ARAT= ) ) { init ? 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Wed, 14 Jan 2026 05:45:16 -0800 (PST) Message-ID: Date: Wed, 14 Jan 2026 14:45:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 4/6] x86/Intel: use host CPU policy for ARAT checking From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1768398455318158500 Content-Type: text/plain; charset="utf-8" There's no need to invoke CPUID yet another time. However, as the host CPU policy is set up only shortly after init_intel() ran on the BSP, defer the logic to a pre-SMP initcall. This can't be (a new) one in cpu/intel.c though, as that's linked after acpi/cpu_idle.c (which is where we already need the feature set). Since opt_arat is local to the cpu/ subtree, introduce a new Intel-specific helper to hold the code needed. Further, as we assume symmetry anyway, use setup_force_cpu_cap() and hence limit the checking to the boot CPU. Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk --- The need to move where cpu_has_arat is checked would go away if we did away with opt_arat (as mentioned in the previous patch), and hence could use cpu_has_arat directly where right now XEN_ARAT is checked. --- v3: Re-base over naming changes. --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -1666,6 +1666,9 @@ static int __init cf_check cpuidle_presm { void *cpu =3D (void *)(long)smp_processor_id(); =20 + if ( boot_cpu_data.vendor =3D=3D X86_VENDOR_INTEL ) + intel_init_arat(); + if ( !xen_cpuidle ) return 0; =20 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -665,10 +665,6 @@ static void cf_check init_intel(struct c __set_bit(X86_FEATURE_NONSTOP_TSC, c->x86_capability); __set_bit(X86_FEATURE_TSC_RELIABLE, c->x86_capability); } - if ( opt_arat && - ( c->cpuid_level >=3D 0x00000006 ) && - ( cpuid_eax(0x00000006) & (1u<<2) ) ) - __set_bit(X86_FEATURE_XEN_ARAT, c->x86_capability); =20 if ((opt_cpu_info && !(c->apicid & (c->x86_num_siblings - 1))) || c =3D=3D &boot_cpu_data ) @@ -693,3 +689,9 @@ const struct cpu_dev __initconst_cf_clob .c_early_init =3D early_init_intel, .c_init =3D init_intel, }; + +void __init intel_init_arat(void) +{ + if ( opt_arat && cpu_has_arat ) + setup_force_cpu_cap(X86_FEATURE_XEN_ARAT); +} --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -176,6 +176,9 @@ static inline bool boot_cpu_has(unsigned #define cpu_has_fma4 boot_cpu_has(X86_FEATURE_FMA4) #define cpu_has_tbm boot_cpu_has(X86_FEATURE_TBM) =20 +/* CPUID level 0x00000006.eax */ +#define cpu_has_arat host_cpu_policy.basic.arat + /* CPUID level 0x00000006.ecx */ #define cpu_has_hw_feedback_cap host_cpu_policy.basic.hw_feedback_cap =20 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -102,6 +102,7 @@ extern void setup_force_cpu_cap(unsigned extern bool is_forced_cpu_cap(unsigned int cap); extern void print_cpu_info(unsigned int cpu); extern void init_intel_cacheinfo(struct cpuinfo_x86 *c); +extern void intel_init_arat(void); =20 #define cpu_to_core(_cpu) (cpu_data[_cpu].cpu_core_id) #define cpu_to_socket(_cpu) (cpu_data[_cpu].phys_proc_id) From nobody Mon Jan 26 07:40:28 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Wed, 14 Jan 2026 05:45:33 -0800 (PST) Message-ID: Date: Wed, 14 Jan 2026 14:45:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 5/6] x86/cpufreq: use host CPU policy for Turbo checking From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1768398352869158500 Content-Type: text/plain; charset="utf-8" There's no need to invoke CPUID yet another time - we assume symmetry anyway. With symmetry assumed, logging per-CPU also isn't very useful. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper Reviewed-by: Jason Andryuk --- v3: Re-base over naming changes. --- a/xen/arch/x86/acpi/cpufreq/acpi.c +++ b/xen/arch/x86/acpi/cpufreq/acpi.c @@ -220,14 +220,11 @@ static unsigned int cf_check get_cur_fre =20 void intel_feature_detect(struct cpufreq_policy *policy) { - unsigned int eax; - - eax =3D cpuid_eax(6); - if (eax & 0x2) { + if ( cpu_has_turbo_boost ) + { policy->turbo =3D CPUFREQ_TURBO_ENABLED; - if (cpufreq_verbose) - printk(XENLOG_INFO "CPU%u: Turbo Mode detected and enabled\n", - smp_processor_id()); + if ( cpufreq_verbose ) + printk_once(XENLOG_INFO "Turbo Mode detected and enabled\n"); } } =20 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -177,6 +177,7 @@ static inline bool boot_cpu_has(unsigned #define cpu_has_tbm boot_cpu_has(X86_FEATURE_TBM) =20 /* CPUID level 0x00000006.eax */ +#define cpu_has_turbo_boost host_cpu_policy.basic.turbo_boost #define cpu_has_arat host_cpu_policy.basic.arat =20 /* CPUID level 0x00000006.ecx */ From nobody Mon Jan 26 07:40:28 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=quarantine dis=none) header.from=suse.com ARC-Seal: i=1; a=rsa-sha256; t=1768398372; cv=none; d=zohomail.com; s=zohoarc; b=OjE4lFv68hFcY7JQnzTKtvMGy+EVbYnTwiWsQXtwknb8fqm1BlHWZAo4vp+nM2IAVB2IxvAbGHydgxDO38mzDMgOIO9OpL0HMo42VZk9mBzj2pEbOrkG1oaeOkiFc8HU1xa6+fcsa8JLZ0gzF2MAksEu8LUV9L7UFcziJ/Wd8ws= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1768398372; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=of3ZVzYQS2KutMf+Jt2/4ruObRoSOuVu1pCONx6TmkE=; b=FmF3KKW+cNNeVJb9FXDt+LnMIALRVJA7mFqY0FU9YSIcTi5iI3RBTodzJv8xbu1tO897Q6+s1k3RzNOElgl4YI8DUbB/MBPaSj18LFzf/eNqafc53aQg/zUDeRomngH/7YmGT4kW+RZEU5nZyU+7m/djDJbK+6GtEMaaParEz8k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1768398372263941.1904915665784; Wed, 14 Jan 2026 05:46:12 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1203130.1518430 (Exim 4.92) (envelope-from ) id 1vg1C7-0003vB-87; Wed, 14 Jan 2026 13:45:55 +0000 Received: by outflank-mailman (output) from mailman id 1203130.1518430; Wed, 14 Jan 2026 13:45:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vg1C7-0003v4-5J; Wed, 14 Jan 2026 13:45:55 +0000 Received: by outflank-mailman (input) for mailman id 1203130; Wed, 14 Jan 2026 13:45:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vg1C5-0003Y4-H7 for xen-devel@lists.xenproject.org; Wed, 14 Jan 2026 13:45:53 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 573dba35-f14f-11f0-9ccf-f158ae23cfc8; Wed, 14 Jan 2026 14:45:51 +0100 (CET) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-47d5e021a53so65472905e9.3 for ; Wed, 14 Jan 2026 05:45:51 -0800 (PST) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 14 Jan 2026 05:45:51 -0800 (PST) Message-ID: <7d52c0cf-c097-4c32-9af6-5044727c3ef8@suse.com> Date: Wed, 14 Jan 2026 14:45:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 6/6] x86/cpufreq: use host CPU policy in HWP driver From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4d3a3576-2d3c-42ec-8551-18f1f0982e17@suse.com> Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1768398372836158500 Content-Type: text/plain; charset="utf-8" There's no need to invoke CPUID yet another time. This way two of the static booleans can also go away. Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk Reviewed-by: Teddy Astie --- v3: Undo some line wrapping. Correct padding in asm/cpufeature.h. Re-base over naming changes. v2: Introduce cpu_has_*. --- a/xen/arch/x86/acpi/cpufreq/hwp.c +++ b/xen/arch/x86/acpi/cpufreq/hwp.c @@ -18,9 +18,6 @@ =20 static bool __ro_after_init hwp_in_use; =20 -static bool __ro_after_init feature_hwp_notification; -static bool __ro_after_init feature_hwp_activity_window; - static bool __read_mostly feature_hdc; =20 static bool __ro_after_init opt_cpufreq_hdc =3D true; @@ -165,8 +162,6 @@ bool hwp_active(void) =20 static bool __init hwp_available(void) { - unsigned int eax; - if ( boot_cpu_data.cpuid_level < CPUID_PM_LEAF ) { hwp_verbose("cpuid_level (%#x) lacks HWP support\n", @@ -183,29 +178,22 @@ static bool __init hwp_available(void) return false; } =20 - eax =3D cpuid_eax(CPUID_PM_LEAF); - hwp_verbose("%d notify: %d act-window: %d energy-perf: %d pkg-level: %= d peci: %d\n", - !!(eax & CPUID6_EAX_HWP), - !!(eax & CPUID6_EAX_HWP_NOTIFICATION), - !!(eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW), - !!(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE), - !!(eax & CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST), - !!(eax & CPUID6_EAX_HWP_PECI)); + cpu_has_hwp, cpu_has_hwp_interrupt, + cpu_has_hwp_activity_window, cpu_has_hwp_epp, + cpu_has_hwp_request_pkg, cpu_has_hwp_peci_override); =20 - if ( !(eax & CPUID6_EAX_HWP) ) + if ( !cpu_has_hwp ) return false; =20 - if ( !(eax & CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE) ) + if ( !cpu_has_hwp_epp ) { hwp_verbose("disabled: No energy/performance preference available"= ); =20 return false; } =20 - feature_hwp_notification =3D eax & CPUID6_EAX_HWP_NOTIFICATION; - feature_hwp_activity_window =3D eax & CPUID6_EAX_HWP_ACTIVITY_WINDOW; - feature_hdc =3D eax & CPUID6_EAX_HDC; + feature_hdc =3D cpu_has_hdc; =20 hwp_verbose("Hardware Duty Cycling (HDC) %ssupported%s\n", feature_hdc ? "" : "not ", @@ -213,7 +201,7 @@ static bool __init hwp_available(void) : ""); =20 hwp_verbose("HW_FEEDBACK %ssupported\n", - (eax & CPUID6_EAX_HW_FEEDBACK) ? "" : "not "); + cpu_has_hw_feedback ? "" : "not "); =20 hwp_in_use =3D true; =20 @@ -226,7 +214,7 @@ static int cf_check hwp_cpufreq_verify(s { struct hwp_drv_data *data =3D per_cpu(hwp_drv_data, policy->cpu); =20 - if ( !feature_hwp_activity_window && data->activity_window ) + if ( !cpu_has_hwp_activity_window && data->activity_window ) { hwp_verbose("HWP activity window not supported\n"); =20 @@ -268,7 +256,7 @@ static int cf_check hwp_cpufreq_target(s hwp_req.max_perf =3D data->maximum; hwp_req.desired =3D data->desired; hwp_req.energy_perf =3D data->energy_perf; - if ( feature_hwp_activity_window ) + if ( cpu_has_hwp_activity_window ) hwp_req.activity_window =3D data->activity_window; =20 if ( hwp_req.raw =3D=3D data->curr_req.raw ) @@ -365,7 +353,7 @@ static void cf_check hwp_init_msrs(void } =20 /* Ensure we don't generate interrupts */ - if ( feature_hwp_notification ) + if ( cpu_has_hwp_interrupt ) wrmsr_safe(MSR_HWP_INTERRUPT, 0); =20 if ( !(val & PM_ENABLE_HWP_ENABLE) ) @@ -537,7 +525,7 @@ int get_hwp_para(unsigned int cpu, return -ENODATA; =20 cppc_para->features =3D - (feature_hwp_activity_window ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0= ); + (cpu_has_hwp_activity_window ? XEN_SYSCTL_CPPC_FEAT_ACT_WINDOW : 0= ); cppc_para->lowest =3D data->hw.lowest; cppc_para->lowest_nonlinear =3D data->hw.most_efficient; cppc_para->nominal =3D data->hw.guaranteed; @@ -585,7 +573,7 @@ int set_hwp_para(struct cpufreq_policy * =20 /* Clear out activity window if lacking HW supported. */ if ( (set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ACT_WINDOW) && - !feature_hwp_activity_window ) + !cpu_has_hwp_activity_window ) { set_cppc->set_params &=3D ~XEN_SYSCTL_CPPC_SET_ACT_WINDOW; cleared_act_window =3D true; --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -115,14 +115,6 @@ static inline bool boot_cpu_has(unsigned } =20 #define CPUID_PM_LEAF 6 -#define CPUID6_EAX_HWP BIT(7, U) -#define CPUID6_EAX_HWP_NOTIFICATION BIT(8, U) -#define CPUID6_EAX_HWP_ACTIVITY_WINDOW BIT(9, U) -#define CPUID6_EAX_HWP_ENERGY_PERFORMANCE_PREFERENCE BIT(10, U) -#define CPUID6_EAX_HWP_PACKAGE_LEVEL_REQUEST BIT(11, U) -#define CPUID6_EAX_HDC BIT(13, U) -#define CPUID6_EAX_HWP_PECI BIT(16, U) -#define CPUID6_EAX_HW_FEEDBACK BIT(19, U) =20 /* CPUID level 0x00000001.edx */ #define cpu_has_fpu 1 @@ -179,6 +171,14 @@ static inline bool boot_cpu_has(unsigned /* CPUID level 0x00000006.eax */ #define cpu_has_turbo_boost host_cpu_policy.basic.turbo_boost #define cpu_has_arat host_cpu_policy.basic.arat +#define cpu_has_hwp host_cpu_policy.basic.hwp +#define cpu_has_hwp_interrupt host_cpu_policy.basic.hwp_interrupt +#define cpu_has_hwp_activity_window host_cpu_policy.basic.hwp_activity_win= dow +#define cpu_has_hwp_epp host_cpu_policy.basic.hwp_epp +#define cpu_has_hwp_request_pkg host_cpu_policy.basic.hwp_request_pkg +#define cpu_has_hdc host_cpu_policy.basic.hdc +#define cpu_has_hwp_peci_override host_cpu_policy.basic.hwp_peci_override +#define cpu_has_hw_feedback host_cpu_policy.basic.hw_feedback =20 /* CPUID level 0x00000006.ecx */ #define cpu_has_hw_feedback_cap host_cpu_policy.basic.hw_feedback_cap