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charset="utf-8" ... to accompany hvm_read_entry() when actual copying isn't desirable. This allows to remove open-coded stream accesses from hpet_load(), along with using the helper in hvm_load() itself. Since arch_hvm_load()'s declaration would need changing, and since the function is not used from elsewhere, purge the declaration. With that it makes little sense to keep arch_hvm_save()'s around; convert that function to static then at the same time. In hpet_load() simplify the specific case of error return that's in context anyway: There's no need to hold the lock when only updating a local variable. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- v3: Rename to hvm_get_entry(). v2: New. --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -637,7 +637,7 @@ static int cf_check hpet_save(struct vcp static int cf_check hpet_load(struct domain *d, hvm_domain_context_t *h) { HPETState *hp =3D domain_vhpet(d); - struct hvm_hw_hpet *rec; + const struct hvm_hw_hpet *rec; uint64_t cmp; uint64_t guest_time; int i; @@ -645,17 +645,12 @@ static int cf_check hpet_load(struct dom if ( !has_vhpet(d) ) return -ENODEV; =20 - write_lock(&hp->lock); - /* Reload the HPET registers */ - if ( _hvm_check_entry(h, HVM_SAVE_CODE(HPET), HVM_SAVE_LENGTH(HPET), 1= ) ) - { - write_unlock(&hp->lock); + rec =3D hvm_get_entry(HPET, h); + if ( !rec ) return -EINVAL; - } =20 - rec =3D (struct hvm_hw_hpet *)&h->data[h->cur]; - h->cur +=3D HVM_SAVE_LENGTH(HPET); + write_lock(&hp->lock); =20 #define C(x) hp->hpet.x =3D rec->x C(capability); --- a/xen/arch/x86/hvm/save.c +++ b/xen/arch/x86/hvm/save.c @@ -15,7 +15,7 @@ =20 #include =20 -void arch_hvm_save(struct domain *d, struct hvm_save_header *hdr) +static void arch_hvm_save(struct domain *d, struct hvm_save_header *hdr) { uint32_t eax, ebx, ecx, edx; =20 @@ -30,7 +30,7 @@ void arch_hvm_save(struct domain *d, str d->arch.hvm.sync_tsc =3D rdtsc(); } =20 -int arch_hvm_load(struct domain *d, struct hvm_save_header *hdr) +static int arch_hvm_load(struct domain *d, const struct hvm_save_header *h= dr) { uint32_t eax, ebx, ecx, edx; =20 @@ -277,7 +277,7 @@ int hvm_save(struct domain *d, hvm_domai =20 int hvm_load(struct domain *d, hvm_domain_context_t *h) { - struct hvm_save_header hdr; + const struct hvm_save_header *hdr; struct hvm_save_descriptor *desc; hvm_load_handler handler; struct vcpu *v; @@ -286,11 +286,12 @@ int hvm_load(struct domain *d, hvm_domai if ( d->is_dying ) return -EINVAL; =20 - /* Read the save header, which must be first */ - if ( hvm_load_entry(HEADER, h, &hdr) !=3D 0 ) + /* Get at the save header, which must be first */ + hdr =3D hvm_get_entry(HEADER, h); + if ( !hdr ) return -ENODATA; =20 - rc =3D arch_hvm_load(d, &hdr); + rc =3D arch_hvm_load(d, hdr); if ( rc ) return rc; =20 --- a/xen/arch/x86/include/asm/hvm/save.h +++ b/xen/arch/x86/include/asm/hvm/save.h @@ -39,6 +39,21 @@ void _hvm_write_entry(struct hvm_domain_ int _hvm_check_entry(struct hvm_domain_context *h, uint16_t type, uint32_t len, bool strict_length); =20 +/* + * Unmarshalling: check, then return pointer. Evaluates to non-NULL on suc= cess. + * This macro requires the save entry to be the same size as the dest stru= cture. + */ +#define hvm_get_entry(x, h) ({ \ + const void *ptr =3D NULL; \ + BUILD_BUG_ON(HVM_SAVE_HAS_COMPAT(x)); \ + if ( _hvm_check_entry(h, HVM_SAVE_CODE(x), \ + HVM_SAVE_LENGTH(x), true) =3D=3D 0 ) \ + { \ + ptr =3D &(h)->data[(h)->cur]; \ + h->cur +=3D HVM_SAVE_LENGTH(x); \ + } \ + ptr; }) + /* Unmarshalling: copy the contents in a type-safe way */ void _hvm_read_entry(struct hvm_domain_context *h, void *dest, uint32_t dest_len); @@ -127,9 +142,4 @@ int hvm_save_one(struct domain *d, unsig XEN_GUEST_HANDLE_64(uint8) handle, uint64_t *bufsz); int hvm_load(struct domain *d, hvm_domain_context_t *h); =20 -/* Arch-specific definitions. */ -struct hvm_save_header; -void arch_hvm_save(struct domain *d, struct hvm_save_header *hdr); -int arch_hvm_load(struct domain *d, struct hvm_save_header *hdr); - #endif /* __XEN_HVM_SAVE_H__ */ From nobody Sat Nov 23 14:52:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Message-ID: Date: Tue, 28 Nov 2023 11:34:04 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 2/6] x86/HVM: split restore state checking from state loading Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <49a17ffa-c873-4b0f-81ed-9587053ca159@suse.com> Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <49a17ffa-c873-4b0f-81ed-9587053ca159@suse.com> Content-Type: text/plain; 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Note that only one of the two uses of hvm_load() is accompanied with hvm_check(). The other directly consumes hvm_save() output, which ought to be well-formed. This means that while input data related checks don't need repeating in the "load" function when already done by the "check" one (albeit assertions to this effect may be desirable), domain state related checks (e.g. has_xyz(d)) will be required in both places. Suggested-by: Roger Pau Monn=C3=A9 Signed-off-by: Jan Beulich --- Do we really need all the copying involved in use of _hvm_read_entry() (backing hvm_load_entry()? Zero-extending loads are likely easier to handle that way, but for strict loads all we gain is a reduced risk of unaligned accesses (compared to simply pointing into h->data[]). Would the hvm_sr_handlers[] better use array_access_nospec()? --- v2: New. --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -379,6 +379,10 @@ long arch_do_domctl( if ( copy_from_guest(c.data, domctl->u.hvmcontext.buffer, c.size) = !=3D 0 ) goto sethvmcontext_out; =20 + ret =3D hvm_check(d, &c); + if ( ret ) + goto sethvmcontext_out; + domain_pause(d); ret =3D hvm_load(d, &c); domain_unpause(d); --- a/xen/arch/x86/hvm/save.c +++ b/xen/arch/x86/hvm/save.c @@ -30,7 +30,8 @@ static void arch_hvm_save(struct domain d->arch.hvm.sync_tsc =3D rdtsc(); } =20 -static int arch_hvm_load(struct domain *d, const struct hvm_save_header *h= dr) +static int arch_hvm_check(const struct domain *d, + const struct hvm_save_header *hdr) { uint32_t eax, ebx, ecx, edx; =20 @@ -55,6 +56,11 @@ static int arch_hvm_load(struct domain * "(%#"PRIx32") and restored on another (%#"PRIx32").\n", d->domain_id, hdr->cpuid, eax); =20 + return 0; +} + +static void arch_hvm_load(struct domain *d, const struct hvm_save_header *= hdr) +{ /* Restore guest's preferred TSC frequency. */ if ( hdr->gtsc_khz ) d->arch.tsc_khz =3D hdr->gtsc_khz; @@ -66,13 +72,12 @@ static int arch_hvm_load(struct domain * =20 /* VGA state is not saved/restored, so we nobble the cache. */ d->arch.hvm.stdvga.cache =3D STDVGA_CACHE_DISABLED; - - return 0; } =20 /* List of handlers for various HVM save and restore types */ static struct { hvm_save_handler save; + hvm_check_handler check; hvm_load_handler load; const char *name; size_t size; @@ -88,6 +93,7 @@ void __init hvm_register_savevm(uint16_t { ASSERT(typecode <=3D HVM_SAVE_CODE_MAX); ASSERT(hvm_sr_handlers[typecode].save =3D=3D NULL); + ASSERT(hvm_sr_handlers[typecode].check =3D=3D NULL); ASSERT(hvm_sr_handlers[typecode].load =3D=3D NULL); hvm_sr_handlers[typecode].save =3D save_state; hvm_sr_handlers[typecode].load =3D load_state; @@ -275,6 +281,78 @@ int hvm_save(struct domain *d, hvm_domai return 0; } =20 +int hvm_check(const struct domain *d, hvm_domain_context_t *h) +{ + const struct hvm_save_header *hdr; + int rc; + + if ( d->is_dying ) + return -EINVAL; + + /* Get at the save header, which must be first. */ + hdr =3D hvm_get_entry(HEADER, h); + if ( !hdr ) + return -ENODATA; + + rc =3D arch_hvm_check(d, hdr); + if ( rc ) + return rc; + + for ( ; ; ) + { + const struct hvm_save_descriptor *desc; + hvm_check_handler handler; + + if ( h->size - h->cur < sizeof(*desc) ) + { + /* Run out of data */ + printk(XENLOG_G_ERR + "HVM restore %pd: save did not end with a null entry\n", + d); + return -ENODATA; + } + + /* Read the typecode of the next entry and check for the end-marke= r. */ + desc =3D (const void *)&h->data[h->cur]; + if ( desc->typecode =3D=3D HVM_SAVE_CODE(END) ) + { + /* Reset cursor for hvm_load(). */ + h->cur =3D 0; + return 0; + } + + /* Find the handler for this entry. */ + if ( desc->typecode >=3D ARRAY_SIZE(hvm_sr_handlers) || + !hvm_sr_handlers[desc->typecode].name || + !hvm_sr_handlers[desc->typecode].load ) + { + printk(XENLOG_G_ERR "HVM restore %pd: unknown entry typecode %= u\n", + d, desc->typecode); + return -EINVAL; + } + + /* Check the entry. */ + handler =3D hvm_sr_handlers[desc->typecode].check; + if ( !handler ) + { + if ( desc->length > h->size - h->cur - sizeof(*desc) ) + return -ENODATA; + h->cur +=3D sizeof(*desc) + desc->length; + } + else if ( (rc =3D handler(d, h)) ) + { + printk(XENLOG_G_ERR + "HVM restore %pd: failed to check %s:%u rc %d\n", + d, hvm_sr_handlers[desc->typecode].name, desc->instance= , rc); + return rc; + } + + process_pending_softirqs(); + } + + /* Not reached */ +} + int hvm_load(struct domain *d, hvm_domain_context_t *h) { const struct hvm_save_header *hdr; @@ -291,9 +369,8 @@ int hvm_load(struct domain *d, hvm_domai if ( !hdr ) return -ENODATA; =20 - rc =3D arch_hvm_load(d, hdr); - if ( rc ) - return rc; + ASSERT(!arch_hvm_check(d, hdr)); + arch_hvm_load(d, hdr); =20 /* Down all the vcpus: we only re-enable the ones that had state saved= . */ for_each_vcpu(d, v) @@ -304,10 +381,7 @@ int hvm_load(struct domain *d, hvm_domai { if ( h->size - h->cur < sizeof(struct hvm_save_descriptor) ) { - /* Run out of data */ - printk(XENLOG_G_ERR - "HVM%d restore: save did not end with a null entry\n", - d->domain_id); + ASSERT_UNREACHABLE(); return -ENODATA; } =20 @@ -320,8 +394,7 @@ int hvm_load(struct domain *d, hvm_domai if ( (desc->typecode > HVM_SAVE_CODE_MAX) || ((handler =3D hvm_sr_handlers[desc->typecode].load) =3D=3D NU= LL) ) { - printk(XENLOG_G_ERR "HVM%d restore: unknown entry typecode %u\= n", - d->domain_id, desc->typecode); + ASSERT_UNREACHABLE(); return -EINVAL; } =20 --- a/xen/arch/x86/include/asm/hvm/save.h +++ b/xen/arch/x86/include/asm/hvm/save.h @@ -103,6 +103,8 @@ static inline unsigned int hvm_load_inst * restoring. Both return non-zero on error. */ typedef int (*hvm_save_handler) (struct vcpu *v, hvm_domain_context_t *h); +typedef int (*hvm_check_handler)(const struct domain *d, + hvm_domain_context_t *h); typedef int (*hvm_load_handler) (struct domain *d, hvm_domain_context_t *h); =20 @@ -140,6 +142,7 @@ size_t hvm_save_size(struct domain *d); int hvm_save(struct domain *d, hvm_domain_context_t *h); int hvm_save_one(struct domain *d, unsigned int typecode, unsigned int ins= tance, XEN_GUEST_HANDLE_64(uint8) handle, uint64_t *bufsz); +int hvm_check(const struct domain *d, hvm_domain_context_t *h); int hvm_load(struct domain *d, hvm_domain_context_t *h); =20 #endif /* __XEN_HVM_SAVE_H__ */ From nobody Sat Nov 23 14:52:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; 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charset="utf-8" Register NULL uniformly as a first step. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- v2: New. --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -374,7 +374,7 @@ static int cf_check vmce_load_vcpu_ctxt( return err ?: vmce_restore_vcpu(v, &ctxt); } =20 -HVM_REGISTER_SAVE_RESTORE(VMCE_VCPU, vmce_save_vcpu_ctxt, +HVM_REGISTER_SAVE_RESTORE(VMCE_VCPU, vmce_save_vcpu_ctxt, NULL, vmce_load_vcpu_ctxt, 1, HVMSR_PER_VCPU); #endif =20 --- a/xen/arch/x86/emul-i8254.c +++ b/xen/arch/x86/emul-i8254.c @@ -458,7 +458,7 @@ static int cf_check pit_load(struct doma return rc; } =20 -HVM_REGISTER_SAVE_RESTORE(PIT, pit_save, pit_load, 1, HVMSR_PER_DOM); +HVM_REGISTER_SAVE_RESTORE(PIT, pit_save, NULL, pit_load, 1, HVMSR_PER_DOM); #endif =20 /* The intercept action for PIT DM retval: 0--not handled; 1--handled. */ --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -692,7 +692,7 @@ static int cf_check hpet_load(struct dom return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(HPET, hpet_save, hpet_load, 1, HVMSR_PER_DOM); +HVM_REGISTER_SAVE_RESTORE(HPET, hpet_save, NULL, hpet_load, 1, HVMSR_PER_D= OM); =20 static void hpet_set(HPETState *h) { --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -793,7 +793,7 @@ static int cf_check hvm_load_tsc_adjust( return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(TSC_ADJUST, hvm_save_tsc_adjust, +HVM_REGISTER_SAVE_RESTORE(TSC_ADJUST, hvm_save_tsc_adjust, NULL, hvm_load_tsc_adjust, 1, HVMSR_PER_VCPU); =20 static int cf_check hvm_save_cpu_ctxt(struct vcpu *v, hvm_domain_context_t= *h) @@ -1189,7 +1189,7 @@ static int cf_check hvm_load_cpu_ctxt(st return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(CPU, hvm_save_cpu_ctxt, hvm_load_cpu_ctxt, 1, +HVM_REGISTER_SAVE_RESTORE(CPU, hvm_save_cpu_ctxt, NULL, hvm_load_cpu_ctxt,= 1, HVMSR_PER_VCPU); =20 #define HVM_CPU_XSAVE_SIZE(xcr0) (offsetof(struct hvm_hw_cpu_xsave, \ @@ -1538,6 +1538,7 @@ static int __init cf_check hvm_register_ hvm_register_savevm(CPU_XSAVE_CODE, "CPU_XSAVE", hvm_save_cpu_xsave_states, + NULL, hvm_load_cpu_xsave_states, HVM_CPU_XSAVE_SIZE(xfeature_mask) + sizeof(struct hvm_save_descriptor), @@ -1546,6 +1547,7 @@ static int __init cf_check hvm_register_ hvm_register_savevm(CPU_MSR_CODE, "CPU_MSR", hvm_save_cpu_msrs, + NULL, hvm_load_cpu_msrs, HVM_CPU_MSR_SIZE(ARRAY_SIZE(msrs_to_send)) + sizeof(struct hvm_save_descriptor), --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -784,9 +784,9 @@ static int cf_check irq_load_link(struct return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(PCI_IRQ, irq_save_pci, irq_load_pci, +HVM_REGISTER_SAVE_RESTORE(PCI_IRQ, irq_save_pci, NULL, irq_load_pci, 1, HVMSR_PER_DOM); -HVM_REGISTER_SAVE_RESTORE(ISA_IRQ, irq_save_isa, irq_load_isa, +HVM_REGISTER_SAVE_RESTORE(ISA_IRQ, irq_save_isa, NULL, irq_load_isa, 1, HVMSR_PER_DOM); -HVM_REGISTER_SAVE_RESTORE(PCI_LINK, irq_save_link, irq_load_link, +HVM_REGISTER_SAVE_RESTORE(PCI_LINK, irq_save_link, NULL, irq_load_link, 1, HVMSR_PER_DOM); --- a/xen/arch/x86/hvm/mtrr.c +++ b/xen/arch/x86/hvm/mtrr.c @@ -773,7 +773,7 @@ static int cf_check hvm_load_mtrr_msr(st return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save_mtrr_msr, hvm_load_mtrr_msr, 1, +HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save_mtrr_msr, NULL, hvm_load_mtrr_msr= , 1, HVMSR_PER_VCPU); =20 void memory_type_changed(struct domain *d) --- a/xen/arch/x86/hvm/pmtimer.c +++ b/xen/arch/x86/hvm/pmtimer.c @@ -300,7 +300,7 @@ static int cf_check acpi_load(struct dom return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(PMTIMER, acpi_save, acpi_load, +HVM_REGISTER_SAVE_RESTORE(PMTIMER, acpi_save, NULL, acpi_load, 1, HVMSR_PER_DOM); =20 int pmtimer_change_ioport(struct domain *d, uint64_t version) --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -797,7 +797,7 @@ static int cf_check rtc_load(struct doma return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(RTC, rtc_save, rtc_load, 1, HVMSR_PER_DOM); +HVM_REGISTER_SAVE_RESTORE(RTC, rtc_save, NULL, rtc_load, 1, HVMSR_PER_DOM); =20 void rtc_reset(struct domain *d) { --- a/xen/arch/x86/hvm/save.c +++ b/xen/arch/x86/hvm/save.c @@ -88,6 +88,7 @@ static struct { void __init hvm_register_savevm(uint16_t typecode, const char *name, hvm_save_handler save_state, + hvm_check_handler check_state, hvm_load_handler load_state, size_t size, int kind) { @@ -96,6 +97,7 @@ void __init hvm_register_savevm(uint16_t ASSERT(hvm_sr_handlers[typecode].check =3D=3D NULL); ASSERT(hvm_sr_handlers[typecode].load =3D=3D NULL); hvm_sr_handlers[typecode].save =3D save_state; + hvm_sr_handlers[typecode].check =3D check_state; hvm_sr_handlers[typecode].load =3D load_state; hvm_sr_handlers[typecode].name =3D name; hvm_sr_handlers[typecode].size =3D size; --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -631,7 +631,8 @@ static int cf_check ioapic_load(struct d return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, ioapic_load, 1, HVMSR_PER_D= OM); +HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, NULL, ioapic_load, 1, + HVMSR_PER_DOM); =20 void vioapic_reset(struct domain *d) { --- a/xen/arch/x86/hvm/viridian/viridian.c +++ b/xen/arch/x86/hvm/viridian/viridian.c @@ -1145,7 +1145,7 @@ static int cf_check viridian_load_domain return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(VIRIDIAN_DOMAIN, viridian_save_domain_ctxt, +HVM_REGISTER_SAVE_RESTORE(VIRIDIAN_DOMAIN, viridian_save_domain_ctxt, NULL, viridian_load_domain_ctxt, 1, HVMSR_PER_DOM); =20 static int cf_check viridian_save_vcpu_ctxt( @@ -1188,7 +1188,7 @@ static int cf_check viridian_load_vcpu_c return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(VIRIDIAN_VCPU, viridian_save_vcpu_ctxt, +HVM_REGISTER_SAVE_RESTORE(VIRIDIAN_VCPU, viridian_save_vcpu_ctxt, NULL, viridian_load_vcpu_ctxt, 1, HVMSR_PER_VCPU); =20 static int __init cf_check parse_viridian_version(const char *arg) --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1591,9 +1591,9 @@ static int cf_check lapic_load_regs(stru return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(LAPIC, lapic_save_hidden, +HVM_REGISTER_SAVE_RESTORE(LAPIC, lapic_save_hidden, NULL, lapic_load_hidden, 1, HVMSR_PER_VCPU); -HVM_REGISTER_SAVE_RESTORE(LAPIC_REGS, lapic_save_regs, +HVM_REGISTER_SAVE_RESTORE(LAPIC_REGS, lapic_save_regs, NULL, lapic_load_regs, 1, HVMSR_PER_VCPU); =20 int vlapic_init(struct vcpu *v) --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -449,7 +449,7 @@ static int cf_check vpic_load(struct dom return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(PIC, vpic_save, vpic_load, 2, HVMSR_PER_DOM); +HVM_REGISTER_SAVE_RESTORE(PIC, vpic_save, NULL, vpic_load, 2, HVMSR_PER_DO= M); =20 void vpic_reset(struct domain *d) { --- a/xen/arch/x86/include/asm/hvm/save.h +++ b/xen/arch/x86/include/asm/hvm/save.h @@ -113,6 +113,7 @@ typedef int (*hvm_load_handler) (struct void hvm_register_savevm(uint16_t typecode, const char *name,=20 hvm_save_handler save_state, + hvm_check_handler check_state, hvm_load_handler load_state, size_t size, int kind); =20 @@ -122,12 +123,13 @@ void hvm_register_savevm(uint16_t typeco =20 /* Syntactic sugar around that function: specify the max number of * saves, and this calculates the size of buffer needed */ -#define HVM_REGISTER_SAVE_RESTORE(_x, _save, _load, _num, _k) \ +#define HVM_REGISTER_SAVE_RESTORE(_x, _save, check, _load, _num, _k) \ static int __init cf_check __hvm_register_##_x##_save_and_restore(void) \ { \ hvm_register_savevm(HVM_SAVE_CODE(_x), \ #_x, \ &_save, \ + check, \ &_load, \ (_num) * (HVM_SAVE_LENGTH(_x) \ + sizeof (struct hvm_save_descriptor)), \ From nobody Sat Nov 23 14:52:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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charset="utf-8" In particular pit_latch_status() and speaker_ioport_read() perform calculations which assume in-bounds values. Several of the state save record fields can hold wider ranges, though. Refuse to load values which cannot result from normal operation, except mode, the init state of which (see also below) cannot otherwise be reached. Note that ->gate should only be possible to be zero for channel 2; enforce that as well. Adjust pit_reset()'s writing of ->mode as well, to not unduly affect the value pit_latch_status() may calculate. The chosen mode of 7 is still one which cannot be established by writing the control word. Note that with or without this adjustment effectively all switch() statements using mode as the control expression aren't quite right when the PIT is still in that init state; there is an apparent assumption that before these can sensibly be invoked, the guest would init the PIT (i.e. in particular set the mode). Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monn=C3=A9 --- For mode we could refuse to load values in the [0x08,0xfe] range; I'm not certain that's going to be overly helpful. For count I was considering to clip the saved value to 16 bits (i.e. to convert the internally used 0x10000 back to the architectural 0x0000), but pit_save() doesn't easily lend itself to such a "fixup". If desired perhaps better a separate change anyway. --- v3: Slightly adjust two comments. Re-base over rename in earlier patch. v2: Introduce separate checking function; switch to refusing to load bogus values. Re-base. --- a/xen/arch/x86/emul-i8254.c +++ b/xen/arch/x86/emul-i8254.c @@ -47,6 +47,7 @@ #define RW_STATE_MSB 2 #define RW_STATE_WORD0 3 #define RW_STATE_WORD1 4 +#define RW_STATE_NUM 5 =20 #define get_guest_time(v) \ (is_hvm_vcpu(v) ? hvm_get_guest_time(v) : (u64)get_s_time()) @@ -427,6 +428,47 @@ static int cf_check pit_save(struct vcpu return rc; } =20 +static int cf_check pit_check(const struct domain *d, hvm_domain_context_t= *h) +{ + const struct hvm_hw_pit *hw; + unsigned int i; + + if ( !has_vpit(d) ) + return -ENODEV; + + hw =3D hvm_get_entry(PIT, h); + if ( !hw ) + return -ENODATA; + + /* + * Check to-be-loaded values are within valid range, for them to repre= sent + * actually reachable state. Uses of some of the values elsewhere ass= ume + * this is the case. Note that the channels' mode fields aren't check= ed; + * Xen prior to 4.19 might save them as 0xff. + */ + if ( hw->speaker_data_on > 1 || hw->pad0 ) + return -EDOM; + + for ( i =3D 0; i < ARRAY_SIZE(hw->channels); ++i ) + { + const struct hvm_hw_pit_channel *ch =3D &hw->channels[i]; + + if ( ch->count > 0x10000 || + ch->count_latched >=3D RW_STATE_NUM || + ch->read_state >=3D RW_STATE_NUM || + ch->write_state >=3D RW_STATE_NUM || + ch->rw_mode > RW_STATE_WORD0 || + ch->gate > 1 || + ch->bcd > 1 ) + return -EDOM; + + if ( i !=3D 2 && !ch->gate ) + return -EINVAL; + } + + return 0; +} + static int cf_check pit_load(struct domain *d, hvm_domain_context_t *h) { PITState *pit =3D domain_vpit(d); @@ -443,6 +485,14 @@ static int cf_check pit_load(struct doma goto out; } =20 + for ( i =3D 0; i < ARRAY_SIZE(pit->hw.channels); ++i ) + { + struct hvm_hw_pit_channel *ch =3D &pit->hw.channels[i]; + + if ( (ch->mode &=3D 7) > 5 ) + ch->mode -=3D 4; + } + /* * Recreate platform timers from hardware state. There will be some=20 * time jitter here, but the wall-clock will have jumped massively, so=20 @@ -458,7 +508,7 @@ static int cf_check pit_load(struct doma return rc; } =20 -HVM_REGISTER_SAVE_RESTORE(PIT, pit_save, NULL, pit_load, 1, HVMSR_PER_DOM); +HVM_REGISTER_SAVE_RESTORE(PIT, pit_save, pit_check, pit_load, 1, HVMSR_PER= _DOM); #endif =20 /* The intercept action for PIT DM retval: 0--not handled; 1--handled. */ @@ -575,7 +625,7 @@ void pit_reset(struct domain *d) for ( i =3D 0; i < 3; i++ ) { s =3D &pit->hw.channels[i]; - s->mode =3D 0xff; /* the init mode */ + s->mode =3D 7; /* unreachable sentinel */ s->gate =3D (i !=3D 2); pit_load_count(pit, i, 0); } From nobody Sat Nov 23 14:52:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; 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charset="utf-8" Master bit 2 is treated specially: We force it set, but we don't expose the bit being set to the guest. While right now the read and write handling can easily use the fixed mask, the restore input checking that is about to be put in place wants to use the inverted mask to prove that no bits are unduly set. That will require master bit 2 to be set. Otoh the read path requires the bit to be clear (the bit can have either value for the use on the write path). Hence allow use sites control over that bit. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monn=C3=A9 --- v3: New, split from larger patch. --- I'm certainly open to naming suggestions for the new macro parameter. "mb2" can certainly be misleading as to Multiboot 2. Yet "master_bit_2" it too long for my taste, not the least because of the macro then needing to be split across lines. --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -41,7 +41,7 @@ #define vpic_lock(v) spin_lock(__vpic_lock(v)) #define vpic_unlock(v) spin_unlock(__vpic_lock(v)) #define vpic_is_locked(v) spin_is_locked(__vpic_lock(v)) -#define vpic_elcr_mask(v) ((v)->is_master ? 0xf8 : 0xde) +#define vpic_elcr_mask(v, mb2) ((v)->is_master ? 0xf8 | ((mb2) << 2) : 0xd= e) =20 /* Return the highest priority found in mask. Return 8 if none. */ #define VPIC_PRIO_NONE 8 @@ -387,7 +387,7 @@ static int cf_check vpic_intercept_elcr_ if ( dir =3D=3D IOREQ_WRITE ) { /* Some IRs are always edge trig. Slave IR is always level tri= g. */ - data =3D (*val >> shift) & vpic_elcr_mask(vpic); + data =3D (*val >> shift) & vpic_elcr_mask(vpic, 1); if ( vpic->is_master ) data |=3D 1 << 2; vpic->elcr =3D data; @@ -395,7 +395,7 @@ static int cf_check vpic_intercept_elcr_ else { /* Reader should not see hardcoded level-triggered slave IR. */ - data =3D vpic->elcr & vpic_elcr_mask(vpic); + data =3D vpic->elcr & vpic_elcr_mask(vpic, 0); if ( !shift ) *val =3D data; else From nobody Sat Nov 23 14:52:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=suse.com); 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charset="utf-8" Loading is_master from the state save record can lead to out-of-bounds accesses via at least the two container_of() uses by vpic_domain() and __vpic_lock(). Make sure the value is consistent with the instance being loaded. For ->int_output (which for whatever reason isn't a 1-bit bitfield), besides bounds checking also take ->init_state into account. For ELCR follow what vpic_intercept_elcr_io()'s write path and vpic_reset() do, i.e. don't insist on the internal view of the value to be saved. Move the instance range check as well, leaving just an assertion in the load handler. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monn=C3=A9 --- v3: vpic_domain() fix and vpic_elcr_mask() adjustment split out. Re-base over rename in earlier patch. v2: Introduce separate checking function; switch to refusing to load bogus values. Re-base. --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -429,6 +429,38 @@ static int cf_check vpic_save(struct vcp return 0; } =20 +static int cf_check vpic_check(const struct domain *d, hvm_domain_context_= t *h) +{ + unsigned int inst =3D hvm_load_instance(h); + const struct hvm_hw_vpic *s; + + if ( !has_vpic(d) ) + return -ENODEV; + + /* Which PIC is this? */ + if ( inst >=3D ARRAY_SIZE(d->arch.hvm.vpic) ) + return -ENOENT; + + s =3D hvm_get_entry(PIC, h); + if ( !s ) + return -ENODATA; + + /* + * Check to-be-loaded values are within valid range, for them to repre= sent + * actually reachable state. Uses of some of the values elsewhere ass= ume + * this is the case. + */ + if ( s->int_output > 1 ) + return -EDOM; + + if ( s->is_master !=3D !inst || + (s->int_output && s->init_state) || + (s->elcr & ~vpic_elcr_mask(s, 1)) ) + return -EINVAL; + + return 0; +} + static int cf_check vpic_load(struct domain *d, hvm_domain_context_t *h) { struct hvm_hw_vpic *s; @@ -438,18 +470,21 @@ static int cf_check vpic_load(struct dom return -ENODEV; =20 /* Which PIC is this? */ - if ( inst > 1 ) - return -ENOENT; + ASSERT(inst < ARRAY_SIZE(d->arch.hvm.vpic)); s =3D &d->arch.hvm.vpic[inst]; =20 /* Load the state */ if ( hvm_load_entry(PIC, h, s) !=3D 0 ) return -EINVAL; =20 + if ( s->is_master ) + s->elcr |=3D 1 << 2; + return 0; } =20 -HVM_REGISTER_SAVE_RESTORE(PIC, vpic_save, NULL, vpic_load, 2, HVMSR_PER_DO= M); +HVM_REGISTER_SAVE_RESTORE(PIC, vpic_save, vpic_check, vpic_load, 2, + HVMSR_PER_DOM); =20 void vpic_reset(struct domain *d) {