From nobody Mon Mar 23 19:56:15 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1773860409; cv=none; d=zohomail.com; s=zohoarc; b=jiDAl/FxmSG0laTw3l05G7KVIA6PuoWCZRYI8Q/hP/IpKzv9/SGFpZGG7zrw8Ql3+UjRnMnhf1LilJmJq4zrrhGm8O0DtDKoEOdtZJpxHkeN1tU72yz74dEiy/g2LnKJOkG8Ps8CSQquN80Rp94RARzJR1hLXIobvOE7GkCvR9Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1773860409; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=m9vYhoGM8dW0LVBBOLhz8aVHBpT/7+h1R1jT8z35yWA=; b=nKO7bv6uZjVRvE6DYOHmKhlgezudNSfr5EKBzPb63xUdSb9TSUhle63ZuDmN7zsS6d16sfSqDxaN+1xUXyPUIKEpeoAxQVtObx9kFRu8Dvh7fIoenEdmc9kvubVw0zymQUp9GGsI6AFk2o4YUQ3+LIcVXR7/eoLyhhxO9sStsbs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 177386040989793.12676094333199; Wed, 18 Mar 2026 12:00:09 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1256523.1551100 (Exim 4.92) (envelope-from ) id 1w2w7B-0000CU-K4; Wed, 18 Mar 2026 18:59:33 +0000 Received: by outflank-mailman (output) from mailman id 1256523.1551100; Wed, 18 Mar 2026 18:59:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1w2w7B-0000CN-G0; Wed, 18 Mar 2026 18:59:33 +0000 Received: by outflank-mailman (input) for mailman id 1256523; Wed, 18 Mar 2026 18:59:31 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1w2w79-0000CH-Ov for xen-devel@lists.xenproject.org; Wed, 18 Mar 2026 18:59:31 +0000 Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [2a00:1450:4864:20::62e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 97f884a0-22fc-11f1-b164-2bf370ae4941; Wed, 18 Mar 2026 19:59:30 +0100 (CET) Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-b97e5956208so13057666b.2 for ; Wed, 18 Mar 2026 11:59:30 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.24.197]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-667b12ade0dsm2392839a12.30.2026.03.18.11.59.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2026 11:59:28 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 97f884a0-22fc-11f1-b164-2bf370ae4941 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773860369; x=1774465169; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=m9vYhoGM8dW0LVBBOLhz8aVHBpT/7+h1R1jT8z35yWA=; b=BJYN68P/pN0SWXWDtztB64RGftbv7FXIJFuKuyuqwZr9VWIi0GqvL7QEtMxV+G7BUI XtQ8y4jIVisNVqUTbXrKEeMzPzUFyryHjE+yQZd7JfCbumYSowu0O0Io9awbjuteKz+u a2KSZeEvOnjTTaRK/5d+HOufJSnT1ft6V23EPQg6HmftkXDIZuJoYbGBSB7zywVqyWdZ CI3Qz1Yml7gc/7Bn+bc/6fXgmA4CzQu71OIL4eEV4VLgRlT5FOBjGs6ZZHTdBxhYYx92 wKL/6RWMMfi21ZAUjEROoihMLjW8tRzyowt5GGRueiyHB44BMeHQPJ88LccV+mA2A+Ux ESYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773860369; x=1774465169; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=m9vYhoGM8dW0LVBBOLhz8aVHBpT/7+h1R1jT8z35yWA=; b=C9zTeRWXvcjrhigXVQc2W4rrL8ijEx6tJxdYJQfdoRGwe9egjJcURjP2nPGZc46zWS h3WCggf06incICAj5hB9oYFXwuN2vOVvWhDREQ+pjVlqG4GaTSEhqmy93mV/FAwchuxw jlvDOrBmXh3CfovlvZ+mDhNVbS1MUI/W5J7tzzPmrb+B82qRtFihvC3fMYmQxXQBgT2D PJxqn7nLvSjAnH0XFzIxIZ6bADttXKpNJ1coMjEFYldpPzH78E+c7I3JbJL5odwlVfjp Hg/NNcWZO/q6lCC1rnroagy/WtCTdfPcoEZ/54tL6YKXd6PO6gBaV5eelJMdG97Xhvu4 2oFQ== X-Gm-Message-State: AOJu0YyfS5z3IdSDnQgquYSvzQjh2R3fMkk6J2f6Ik99gbNI6MFeL2XG k3l91sWF/CwPxDykqIxewu2cw+VSnVx+Bb+eMCCAlrtYHOMnhGYWsF6h3LpP/w== X-Gm-Gg: ATEYQzxOqTi3nHqtf5dSYoDFUmsp4qiPlLEr5GQCtD3yXL3s5EtyIJ6NLdhlif9D/u0 8V8pgNmrekF5U05e+SnZz+gAnB7wAgUtIEIkkvNZZogGKyffrS1XvzQsMbyi56glsue23sjkL73 ldGhLdRXB+bnJUnnTaz77DZ8JP3JDuz25rkGmImSXBCnnK/5mypDQTOJguFA6rZxBqG3r3HpZDC mxWf2WvjYkV2JCydprPg7hr9yzUH+/pF+fkMNRSwdD8l3Jp7aK1/BVNtt8rSp5UdSnvg75pjliQ XHttrxHKTJSSULhh91AnWep5t/OjfP20qlhNTkOJzRfGzk+9ZAIuRSB07DfMje64XzsGBOg+WS9 PGZBd8XMNQxrAOFUSsY+gNjSFhKsA8/SSCzmQOWYo0Kwsbd23frDjrgsNojr7kEhoFrKtc0v1tI GfVCbB8xrxtMQW7BeV3igizk24Naw= X-Received: by 2002:a17:907:8e96:b0:b97:acca:fcf4 with SMTP id a640c23a62f3a-b97f4796681mr259901566b.11.1773860369067; Wed, 18 Mar 2026 11:59:29 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH] xen/arm: vpsci: ignore upper 32 bits for SMC32 PSCI arguments Date: Wed, 18 Mar 2026 20:56:11 +0200 Message-ID: <3a3180b0f77d815e92c0c232a8f854d34ab7c2ea.1773860069.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1773860412350154100 Content-Type: text/plain; charset="utf-8" From: Mykola Kvach SMCCC DEN0028G, section 3.1, states that for AArch64 SMC/HVC calls using Wn, only the least significant 32 bits are significant and the upper 32 bits must be ignored by the implementation. So for SMC32 PSCI calls, Xen must not treat non-zero upper bits in the argument registers as an error. Instead, they should be discarded when decoding the arguments. Arm ARM DDI 0487J.a (D1-5406) also notes that the upper 32 bits may be implementation defined when entering from AArch32. Xen zeros them on entry, but that guarantee is only relevant for 32-bit domains. Update PSCI v0.2+ CPU_ON, CPU_SUSPEND and AFFINITY_INFO to read SMC32 arguments via PSCI_ARG32(), while keeping the SMC64 handling unchanged. Suggested-by: Julien Grall Signed-off-by: Mykola Kvach --- Link to discussion: https://patchew.org/Xen/cover.1751020456.git.mykola._5F= kvach@epam.com/072270e0940b6bcc2743d56a336363f4719ba60a.1751020456.git.myko= la._5Fkvach@epam.com/#7070f416-119c-49f8-acd0-82c6e31f0fc6@xen.org --- xen/arch/arm/vpsci.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 7ba9ccd94b..1e844ed571 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -303,9 +303,10 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uin= t32_t fid) case PSCI_0_2_FN32_CPU_ON: case PSCI_0_2_FN64_CPU_ON: { - register_t vcpuid =3D PSCI_ARG(regs, 1); - register_t epoint =3D PSCI_ARG(regs, 2); - register_t cid =3D PSCI_ARG(regs, 3); + bool smc32 =3D (fid =3D=3D PSCI_0_2_FN32_CPU_ON); + register_t vcpuid =3D smc32 ? PSCI_ARG32(regs, 1) : PSCI_ARG(regs,= 1); + register_t epoint =3D smc32 ? PSCI_ARG32(regs, 2) : PSCI_ARG(regs,= 2); + register_t cid =3D smc32 ? PSCI_ARG32(regs, 3) : PSCI_ARG(regs, 3); =20 perfc_incr(vpsci_cpu_on); PSCI_SET_RESULT(regs, do_psci_0_2_cpu_on(vcpuid, epoint, cid)); @@ -315,9 +316,10 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uin= t32_t fid) case PSCI_0_2_FN32_CPU_SUSPEND: case PSCI_0_2_FN64_CPU_SUSPEND: { + bool smc32 =3D (fid =3D=3D PSCI_0_2_FN32_CPU_SUSPEND); uint32_t pstate =3D PSCI_ARG32(regs, 1); - register_t epoint =3D PSCI_ARG(regs, 2); - register_t cid =3D PSCI_ARG(regs, 3); + register_t epoint =3D smc32 ? PSCI_ARG32(regs, 2) : PSCI_ARG(regs,= 2); + register_t cid =3D smc32 ? PSCI_ARG32(regs, 3) : PSCI_ARG(regs, 3); =20 perfc_incr(vpsci_cpu_suspend); PSCI_SET_RESULT(regs, do_psci_0_2_cpu_suspend(pstate, epoint, cid)= ); @@ -327,7 +329,8 @@ bool do_vpsci_0_2_call(struct cpu_user_regs *regs, uint= 32_t fid) case PSCI_0_2_FN32_AFFINITY_INFO: case PSCI_0_2_FN64_AFFINITY_INFO: { - register_t taff =3D PSCI_ARG(regs, 1); + bool smc32 =3D (fid =3D=3D PSCI_0_2_FN32_AFFINITY_INFO); + register_t taff =3D smc32 ? PSCI_ARG32(regs, 1) : PSCI_ARG(regs, 1= ); uint32_t laff =3D PSCI_ARG32(regs, 2); =20 perfc_incr(vpsci_cpu_affinity_info); --=20 2.43.0