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[109.243.69.225]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad1891a3cb9sm740295366b.60.2025.05.06.09.52.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 May 2025 09:52:00 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6e97b02a-2a9a-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1746550321; x=1747155121; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fyH7+jYUX1HojA9xgArUa6tCu0OjPcD2ug7vub4dMik=; b=GENtsU4FRYgUvlOcNdU0wKOW4uzsiaIHUu2TotLCeVh8O/qLEPyKQFA6ZkjvM/57Tz YniyiUl+Yd69PMsPOTVlvLl5UQXkEM62BF1i8pIuwtF2dZHb9ExDq8BuCKdybpvexv4Z 2yQsMo/T0f1iUsxoe4Maox0/nimzfzzuOPxwtKwoqDpI//R71Xx+vjoF/olgWX4Gb4eh qPt83Mea0owFaJqMMTbX+liF9QEcY8C8KR3mjKZmcraByaCDdG0vi67jc2T1lgmCEiXV v2m4MA4npMOd5dkJswQ/kUdCPVqVN3A5nMqm0ffBbtrN11XfCMeuQF5Ipe5slU5tv5MR MEgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1746550321; x=1747155121; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fyH7+jYUX1HojA9xgArUa6tCu0OjPcD2ug7vub4dMik=; b=SEdQdkvKQtSi72nbJyy9TWCg4qhetigczwvXMOsRAEYTrgNdRXavEzNaXLeQDE7ZRJ RQQ8AUEt8j/7IdNtwvgR/OvehK44kmGWNL3K6ueUNGDr+VnuxFBM5BWS2h8tSInGJ+P2 RE1vJ+OqAIqTL7skhU6G8HY4TC9wLZvja+peYp9VweQRDzUgMvRTyfnpOcgDgtq7foTM ewlFM0qx6uZ6KRz8xST0BzCakMC0pDokdAtXntFlVZTQDtRnWzDmQ6NsekhCVcLiCPBQ vijETvnNlLvBKZBqY/L67hF2nAETz17bzoDeOYiy95ntOGTqZK21/DB/rz64BYT7+XeW KX5g== X-Gm-Message-State: AOJu0YxjoUOgsPO7d7CRnhQeEVt4B7GjykazkMCVEBlYViIYyYyz9Q9Y wZYdgTLbIylthd14fDyZIb8gqgQn+n/+bwVF08F2cHKlMOnZ2gCjl8DF7g== X-Gm-Gg: ASbGncvEs8xfwYRFOSXbT5zwEeBv4MM/WfLL/TdaSVYGe6CyBHejUASLjXORv4RbFzU prgbxq0+eVOz2bfAvMm1vVKCSiayeX+5+ISgvZG+32i3ByU9C/W6trSQSmyq1Nxjsu4GQ8CUaFs bCIMY4pZkC0ovkyITblPHJptjvyQAhY0oJnNqtopdqftV4xRBu6FoopwlqQw8C2kmcvOucNqaAY vX4cypA9vlikse+AHJ3zuED89r00n+l3psSTLBIKKTXubvGuDwgzca+uZAHE72OXX/o9TpTnHr/ DxuIf+kuf0zVmx+MAyo7PhBczmj4JDmNp1dhknxNliGcuL4P7bvYgJdkt5fWdt23JRDZQ6+iKzj Z0L23kx6gjw== X-Google-Smtp-Source: AGHT+IGGmxCuy3frsT81IH5iVwWAXyfW7soT6GVZbGd9aCkHofw5Csv2YIhMKzuXyZSLhlpIO1JLsQ== X-Received: by 2002:a17:907:7da5:b0:ac3:48e4:f8bc with SMTP id a640c23a62f3a-ad1e8d54c0dmr14428266b.48.1746550320907; Tue, 06 May 2025 09:52:00 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v2 05/16] xen/asm-generic: introduce asm-generic/irq-dt.h Date: Tue, 6 May 2025 18:51:35 +0200 Message-ID: <35c68e57e5348c6610e030890802e967f6be4230.1746530883.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1746550344995116600 Content-Type: text/plain; charset="utf-8" Introduce defintions of IRQ_TYPE_* which correspond to the Xen internal representation of the IRQ types and make them the same asthe existing device tree defintions for convenience. These defines are going to be re-used, at least, by RISC-V architecture. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich Acked-by: Stefano Stabellini --- Changes in V2: - new patch. --- xen/arch/arm/include/asm/Makefile | 1 + xen/arch/arm/include/asm/irq.h | 15 +-------------- xen/include/asm-generic/irq-dt.h | 21 +++++++++++++++++++++ 3 files changed, 23 insertions(+), 14 deletions(-) create mode 100644 xen/include/asm-generic/irq-dt.h diff --git a/xen/arch/arm/include/asm/Makefile b/xen/arch/arm/include/asm/M= akefile index 831c914cce..87c8821421 100644 --- a/xen/arch/arm/include/asm/Makefile +++ b/xen/arch/arm/include/asm/Makefile @@ -4,6 +4,7 @@ generic-y +=3D device.h generic-y +=3D dom0less-build.h generic-y +=3D hardirq.h generic-y +=3D iocap.h +generic-y +=3D irq-dt.h generic-y +=3D paging.h generic-y +=3D percpu.h generic-y +=3D random.h diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.h index 88e060bf29..fce7e42a33 100644 --- a/xen/arch/arm/include/asm/irq.h +++ b/xen/arch/arm/include/asm/irq.h @@ -4,20 +4,7 @@ #include #include =20 -/* - * These defines correspond to the Xen internal representation of the - * IRQ types. We choose to make them the same as the existing device - * tree definitions for convenience. - */ -#define IRQ_TYPE_NONE DT_IRQ_TYPE_NONE -#define IRQ_TYPE_EDGE_RISING DT_IRQ_TYPE_EDGE_RISING -#define IRQ_TYPE_EDGE_FALLING DT_IRQ_TYPE_EDGE_FALLING -#define IRQ_TYPE_EDGE_BOTH DT_IRQ_TYPE_EDGE_BOTH=20 -#define IRQ_TYPE_LEVEL_HIGH DT_IRQ_TYPE_LEVEL_HIGH -#define IRQ_TYPE_LEVEL_LOW DT_IRQ_TYPE_LEVEL_LOW -#define IRQ_TYPE_LEVEL_MASK DT_IRQ_TYPE_LEVEL_MASK -#define IRQ_TYPE_SENSE_MASK DT_IRQ_TYPE_SENSE_MASK -#define IRQ_TYPE_INVALID DT_IRQ_TYPE_INVALID +#include =20 #define NR_VECTORS 256 /* XXX */ =20 diff --git a/xen/include/asm-generic/irq-dt.h b/xen/include/asm-generic/irq= -dt.h new file mode 100644 index 0000000000..5ec46da533 --- /dev/null +++ b/xen/include/asm-generic/irq-dt.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __ASM_GENERIC_IRQ_DT_H__ +#define __ASM_GENERIC_IRQ_DT_H__ + +/* + * These defines correspond to the Xen internal representation of the + * IRQ types. We choose to make them the same as the existing device + * tree definitions for convenience. + */ +#define IRQ_TYPE_NONE DT_IRQ_TYPE_NONE +#define IRQ_TYPE_EDGE_RISING DT_IRQ_TYPE_EDGE_RISING +#define IRQ_TYPE_EDGE_FALLING DT_IRQ_TYPE_EDGE_FALLING +#define IRQ_TYPE_EDGE_BOTH DT_IRQ_TYPE_EDGE_BOTH +#define IRQ_TYPE_LEVEL_HIGH DT_IRQ_TYPE_LEVEL_HIGH +#define IRQ_TYPE_LEVEL_LOW DT_IRQ_TYPE_LEVEL_LOW +#define IRQ_TYPE_LEVEL_MASK DT_IRQ_TYPE_LEVEL_MASK +#define IRQ_TYPE_SENSE_MASK DT_IRQ_TYPE_SENSE_MASK +#define IRQ_TYPE_INVALID DT_IRQ_TYPE_INVALID + +#endif /* __ASM_GENERIC_IRQ_DT_H__ */ --=20 2.49.0