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Mon, 09 May 2022 23:05:08 -0700 (PDT) From: Viresh Kumar To: xen-devel@lists.xen.org Cc: Viresh Kumar , Vincent Guittot , stratos-dev@op-lists.linaro.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Stefano Stabellini , Mathieu Poirier , Mike Holmes , Oleksandr Tyshchenko , Wei Liu , Juergen Gross , Julien Grall , Oleksandr Tyshchenko Subject: [PATCH V2 3/6] libxl: arm: Create alloc_virtio_mmio_params() Date: Tue, 10 May 2022 11:34:48 +0530 Message-Id: <32fa4a77c76187f68b074ff1cc81d8de5f683638.1652162646.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1652162740336100001 Content-Type: text/plain; charset="utf-8" Create a separate routine to allocate base and irq for a device as the same code will be required for each device type. Suggested-by: Oleksandr Tyshchenko Signed-off-by: Viresh Kumar --- tools/libs/light/libxl_arm.c | 41 +++++++++++++++++++++++------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 37403a2cebb1..6b95ded82dc3 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -48,6 +48,24 @@ static uint32_t alloc_virtio_mmio_irq(libxl__gc *gc, uin= t32_t *virtio_mmio_irq) return irq; } =20 +static int alloc_virtio_mmio_params(libxl__gc *gc, uint64_t *base, + uint32_t *irq, uint64_t *virtio_mmio_b= ase, + uint32_t *virtio_mmio_irq) +{ + *base =3D alloc_virtio_mmio_base(gc, virtio_mmio_base); + if (!*base) + return ERROR_FAIL; + + *irq =3D alloc_virtio_mmio_irq(gc, virtio_mmio_irq); + if (!*irq) + return ERROR_FAIL; + + LOG(DEBUG, "Allocate Virtio MMIO params: IRQ %u BASE 0x%"PRIx64, *irq, + *base); + + return 0; +} + static const char *gicv_to_string(libxl_gic_version gic_version) { switch (gic_version) { @@ -85,25 +103,18 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, libxl_device_disk *disk =3D &d_config->disks[i]; =20 if (disk->specification =3D=3D LIBXL_DISK_SPECIFICATION_VIRTIO) { - disk->base =3D alloc_virtio_mmio_base(gc, &virtio_mmio_base); - if (!disk->base) - return ERROR_FAIL; - - disk->irq =3D alloc_virtio_mmio_irq(gc, &virtio_mmio_irq); - if (!disk->irq) - return ERROR_FAIL; - - if (virtio_irq < disk->irq) - virtio_irq =3D disk->irq; - virtio_enabled =3D true; - - LOG(DEBUG, "Allocate Virtio MMIO params for Vdev %s: IRQ %u BA= SE 0x%"PRIx64, - disk->vdev, disk->irq, disk->base); + int rc =3D alloc_virtio_mmio_params(gc, &disk->base, &disk->ir= q, + &virtio_mmio_base, &virtio_mmio_irq); + if (rc) + return rc; } } =20 - if (virtio_enabled) + if (virtio_mmio_irq !=3D GUEST_VIRTIO_MMIO_SPI_FIRST) { + virtio_irq =3D virtio_mmio_irq - 1; nr_spis +=3D (virtio_irq - 32) + 1; + virtio_enabled =3D true; + } =20 for (i =3D 0; i < d_config->b_info.num_irqs; i++) { uint32_t irq =3D d_config->b_info.irqs[i]; --=20 2.31.1.272.g89b43f80a514