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([94.75.70.14]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53a000129eesm391451e87.259.2024.10.16.02.16.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Oct 2024 02:16:03 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 458c7379-8b9f-11ef-a0be-8be0dac302b0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1729070165; x=1729674965; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fGuFYCXwauYG/Y17jk3tmaCDchtBJlytkAwIlTZfzko=; b=Wbrq0EcMkiODkwUFRkqGJwOY180q+enFGkXV7OzyML3HclgAY5NGw1kCm74rZIqTau 3Grqu61S0+I3JJD9JiW0LWQroJ7hYJOQDVWA1QiTEQ/sZ0ZccPnpy+Um6+jckrQHyM2n oep4MykeDfgaioDDDb66TvYr4TbbI2mwXHfQEqIQgZek47Q7pV2eXvtq0PnU9SgyPqsE FsigDQ8CoUdMExA1GhoBnmXQONOTxhCgx0Ub/kTsUircqdz6F0NRcbyxxI++lx3TAumr 7nsKNCurpCYdZgKVPedhkG259QpUqV0J4mlb2Msth9I4o4YRYl1XyyhZptmIe6gNtDM3 yKcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729070165; x=1729674965; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fGuFYCXwauYG/Y17jk3tmaCDchtBJlytkAwIlTZfzko=; b=isMRpWokANn5nQRtSPzry1+/x94aBQhT5C0FsGmBjdp6upqIdEdLETvU0tCOz8RAyQ coTfqDJ+/Jpx5dfYrFeMzgqgoyvU1l1/MnM406uRt+Gkxs7DK4OEwq3X1cDSwL0+JZhl 5uSqjEXZTMngtKNfWh+m2eGZB5sLAFkCcuBGCH1rURnGdz9KO1xPLshLnYmsuu383h2U j54Sd9g9/RPJuAfNPFWjKYOm2GpoYHEbBZPquaNBdm6likpnORUanftWFknDXbm2JwAZ zr1WN25IQ8IYogV5daXCiC3HmLmrarLonOv6TllWcpiTU2dxkJVoo5F1N4EcAzz8JRX9 6iWg== X-Gm-Message-State: AOJu0YxvRilVtNzj0q5QEKGQWbhTVj3L0evMxo4MfEFr1vP0IDUURAs/ 9gcxUiHI4QKuO0kJxh+fUcsyoRVkmRCWGkK/RS1BpLiy4qdNONIE4WIAOQ== X-Google-Smtp-Source: AGHT+IHZkUCj21Y7l52VIWLe416ZSMs2Ro+dERhPbC13frSrZPSSU46sMhzh1iRQsImnvC/Xb+KtPg== X-Received: by 2002:a05:6512:e9c:b0:539:f807:ad93 with SMTP id 2adb3069b0e04-539f807caf1mr5086745e87.38.1729070164430; Wed, 16 Oct 2024 02:16:04 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Jan Beulich , Julien Grall , Stefano Stabellini Subject: [PATCH v1 3/5] xen/riscv: introduce setup_mm() Date: Wed, 16 Oct 2024 11:15:55 +0200 Message-ID: <300a4a5911766d42ec01c3fcaee664d72b484296.1729068334.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1729070187548116600 Content-Type: text/plain; charset="utf-8" Introduce the implementation of setup_mm(), which includes: 1. Adding all free regions to the boot allocator, as memory is needed to allocate page tables used for frame table mapping. 2. Calculating RAM size and the RAM end address. 3. Setting up direct map mappings from the PFN of physical address 0 to the PFN of RAM end. 4. Setting up frame table mappings from physical address 0 to ram_end. 5. Setting up total_pages and max_page. 6. Establishing `directmap_virt_end`, which is not currently used but is intended for future use in virt_to_page() to ensure that virtual addresses do not exceed directmap_virt_end. In the case of RISC-V 64, which has a large virtual address space (the minimum supported MMU mode is Sv39, providing TB of VA space), the direct map and frame table are mapped starting from physical address 0. This simplifies the calculations and thereby improves performance for page_to_mfn(), mfn_to_page(), and maddr_to_virt(), as there is no need to account for {directmap, frametable}_base_pdx. Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/include/asm/mm.h | 2 + xen/arch/riscv/include/asm/setup.h | 2 + xen/arch/riscv/mm.c | 93 ++++++++++++++++++++++++++++++ xen/arch/riscv/setup.c | 3 + 4 files changed, 100 insertions(+) diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/m= m.h index 0396e66f47..7b472220e5 100644 --- a/xen/arch/riscv/include/asm/mm.h +++ b/xen/arch/riscv/include/asm/mm.h @@ -12,6 +12,8 @@ =20 #include =20 +extern vaddr_t directmap_virt_end; + #define pfn_to_paddr(pfn) ((paddr_t)(pfn) << PAGE_SHIFT) #define paddr_to_pfn(pa) ((unsigned long)((pa) >> PAGE_SHIFT)) =20 diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/as= m/setup.h index c0214a9bf2..844a2f0ef1 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,6 +5,8 @@ =20 #define max_init_domid (0) =20 +void setup_mm(void); + #endif /* ASM__RISCV__SETUP_H */ =20 /* diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c index 27026d803b..53b7483f75 100644 --- a/xen/arch/riscv/mm.c +++ b/xen/arch/riscv/mm.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -423,3 +424,95 @@ void * __init early_fdt_map(paddr_t fdt_paddr) =20 return fdt_virt; } + +#ifndef CONFIG_RISCV_32 +/* Map the region in the directmap area. */ +static void __init setup_directmap_mappings(unsigned long nr_mfns) +{ + if ( nr_mfns > PFN_DOWN(DIRECTMAP_SIZE) ) + panic("The directmap cannot cover the physical region %#"PRIpaddr"= - %#"PRIpaddr"\n", + 0UL, nr_mfns << PAGE_SHIFT); + + if ( map_pages_to_xen((vaddr_t)mfn_to_virt(0), + _mfn(0), nr_mfns, + PAGE_HYPERVISOR_RW) ) + panic("Unable to setup the directmap mappings.\n"); +} + +/* Map a frame table to cover physical addresses ps through pe */ +static void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) +{ + unsigned long nr_mfns =3D mfn_x(mfn_add(maddr_to_mfn(pe), -1)) - + mfn_x(maddr_to_mfn(ps)) + 1; + unsigned long frametable_size =3D nr_mfns * sizeof(struct page_info); + mfn_t base_mfn; + + if ( frametable_size > FRAMETABLE_SIZE ) + panic("The frametable cannot cover the physical region %#"PRIpaddr= " - %#"PRIpaddr"\n", + ps, pe); + + frametable_size =3D ROUNDUP(frametable_size, MB(2)); + base_mfn =3D alloc_boot_pages(frametable_size >> PAGE_SHIFT, 2<<(20-12= )); + + if ( map_pages_to_xen(FRAMETABLE_VIRT_START, base_mfn, + frametable_size >> PAGE_SHIFT, + PAGE_HYPERVISOR_RW) ) + panic("Unable to setup the frametable mappings.\n"); + + memset(&frame_table[0], 0, nr_mfns * sizeof(struct page_info)); + memset(&frame_table[nr_mfns], -1, + frametable_size - (nr_mfns * sizeof(struct page_info))); +} + +vaddr_t directmap_virt_end __read_mostly; + +/* + * Setup memory management + * + * RISC-V 64 has a large virtual address space (the minimum supported + * MMU mode is Sv39, which provides TBs of VA space). + * In the case of RISC-V 64, the directmap and frametable are mapped + * starting from physical address 0 to simplify the page_to_mfn(), + * mfn_to_page(), and maddr_to_virt() calculations, as there is no need + * to account for {directmap, frametable}_base_pdx in this setup. + */ +void __init setup_mm(void) +{ + const struct membanks *banks =3D bootinfo_get_mem(); + paddr_t ram_end =3D 0; + paddr_t ram_size =3D 0; + unsigned int i; + + /* + * We need some memory to allocate the page-tables used for the direct= map + * mappings. But some regions may contain memory already allocated + * for other uses (e.g. modules, reserved-memory...). + * + * For simplicity, add all the free regions in the boot allocator. + */ + populate_boot_allocator(); + + total_pages =3D 0; + + for ( i =3D 0; i < banks->nr_banks; i++ ) + { + const struct membank *bank =3D &banks->bank[i]; + paddr_t bank_end =3D bank->start + bank->size; + + ram_size =3D ram_size + bank->size; + ram_end =3D max(ram_end, bank_end); + } + + setup_directmap_mappings(PFN_DOWN(ram_end)); + + total_pages =3D PFN_DOWN(ram_size); + + directmap_virt_end =3D DIRECTMAP_VIRT_START + ram_end; + + setup_frametable_mappings(0, ram_end); + max_page =3D PFN_DOWN(ram_end); +} + +#else /* CONFIG_RISCV_32 */ +#error setup_mm(), setup_{directmap,frametable}_mapping() should be implem= ented for RV_32 +#endif diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index e29bd75d7c..2887a18c0c 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -12,6 +12,7 @@ =20 #include #include +#include #include #include =20 @@ -59,6 +60,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id, printk("Command line: %s\n", cmdline); cmdline_parse(cmdline); =20 + setup_mm(); + printk("All set up\n"); =20 machine_halt(); --=20 2.47.0