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AHgh+RqR3Z+eXpPjXcO1wdYD5FBGRDSIrqNWByrDds3nyojF24++tQOQpIrU+K74uCdvpY6JszardIfzgns=@lists.xenproject.org X-Gm-Message-State: AOJu0YxA284ru0lfGMc+tHOqqMJamVLF7AlI+9LCYSHVvFKum5GfTsYC Kx62gZs6B515tGmK87ZZNZGiDa2AD4q31HkW4AVumKsr/OBwel+5XEO54FuxKWKbrQXgLqdQ6DI wWptxAQ== X-Received: from pgnc18.prod.google.com ([2002:a63:7252:0:b0:c9e:6c82:64e8]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:1310:b0:84e:216d:7e52 with SMTP id d2e1a72fcca58-84f2e03175emr20642138b3a.14.1786059385989; Thu, 06 Aug 2026 16:36:25 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 6 Aug 2026 16:35:19 -0700 In-Reply-To: <20260806233609.212337-1-seanjc@google.com> Mime-Version: 1.0 References: <20260806233609.212337-1-seanjc@google.com> X-Mailer: git-send-email 2.55.0.679.g6767b8d81c-goog Message-ID: <20260806233609.212337-3-seanjc@google.com> Subject: [PATCH v6 02/51] x86/apic: Add CONFIG_X86_LOCAL_APIC=n stubs for APIC timer frequency APIs From: Sean Christopherson To: Kiryl Shutsemau , Rick Edgecombe , Sean Christopherson , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , Miroslav Lichvar , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , David Woodhouse , Thomas Gleixner X-purgate-ID: tlsNG-d25034/1786059388-52530A5B-E5B61271/0/0 X-purgate-type: clean X-purgate-size: 3092 X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1786059417205158500 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add stubs for the apic_set_timer_frequency_{,k}hz() APIs when the kernel is built without support for a local APIC, and drop #ifdefs in callers that don't need to check CONFIG_X86_LOCAL_APIC for other reasons. No functional change intended. Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --- arch/x86/include/asm/apic.h | 2 ++ arch/x86/kernel/cpu/vmware.c | 2 -- arch/x86/kernel/tsc.c | 2 -- arch/x86/kernel/tsc_msr.c | 2 -- 4 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 6946220a6008..9c5084f3317f 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -189,6 +189,8 @@ static inline void disable_local_APIC(void) { } # define setup_boot_APIC_clock x86_init_noop # define setup_secondary_APIC_clock x86_init_noop static inline void lapic_update_tsc_freq(void) { } +static inline void apic_set_timer_frequency_hz(u64 freq_hz, const char *so= urce) { } +static inline void apic_set_timer_frequency_khz(u64 freq_khz, const char *= source) { } static inline void init_bsp_APIC(void) { } static inline void apic_intr_mode_select(void) { } static inline void apic_intr_mode_init(void) { } diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 22842bf5b59e..2225df67d45f 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -422,10 +422,8 @@ static void __init vmware_platform_setup(void) x86_platform.calibrate_tsc =3D vmware_get_tsc_khz; x86_platform.calibrate_cpu =3D vmware_get_tsc_khz; =20 -#ifdef CONFIG_X86_LOCAL_APIC /* Skip lapic calibration since we know the bus frequency. */ apic_set_timer_frequency_hz(ecx, "VMware hypervisor"); -#endif } else { pr_warn("Failed to get TSC freq from the hypervisor\n"); } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 63e26805f8dd..4392fddd616e 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -710,7 +710,6 @@ unsigned long native_calibrate_tsc(void) if (boot_cpu_data.x86_vfm =3D=3D INTEL_ATOM_GOLDMONT) setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); =20 -#ifdef CONFIG_X86_LOCAL_APIC /* * The local APIC appears to be fed by the core crystal clock * (which sounds entirely sensible). We can set the global @@ -718,7 +717,6 @@ unsigned long native_calibrate_tsc(void) * timer later. */ apic_set_timer_frequency_khz(crystal_khz, "CPUID 0x15/0x16"); -#endif =20 return crystal_khz * ebx_numerator / eax_denominator; } diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 4bd5f2ae656b..179e3a331ef9 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -211,9 +211,7 @@ unsigned long cpu_khz_from_msr(void) if (freq =3D=3D 0) pr_err("Error MSR_FSB_FREQ index %d is unknown\n", index); =20 -#ifdef CONFIG_X86_LOCAL_APIC apic_set_timer_frequency_khz(freq, "MSR_FSB_FREQ"); -#endif =20 /* * TSC frequency determined by MSR is always considered "known" --=20 2.55.0.679.g6767b8d81c-goog