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AHgh+RrArYAKB3SyFv9KZ/8D+XVk8At5Rs2Jmw9b9W/clwIfbULicIoXHMDrXiFmPQiFFv3s85StiAdCgHI=@lists.xenproject.org X-Gm-Message-State: AOJu0YxjlmpxxqhyFHPK7vn0aeRXThlmLMk5kfo8JxsFEkXHDVED4gOM /efZwP88fLXQTRmETKAvNA7CoJeqXn8VTtW3JWfrnbeQjhqlgZpXgYD7mMGLbtvAiMcCBIbwoR+ 6l+zw1Q== X-Received: from plzw6.prod.google.com ([2002:a17:902:9046:b0:2cc:6ddb:debc]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:dac1:b0:2c0:e5ee:f554 with SMTP id d9443c01a7336-2d0ca71b3d7mr204312595ad.8.1786059384888; Thu, 06 Aug 2026 16:36:24 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 6 Aug 2026 16:35:18 -0700 In-Reply-To: <20260806233609.212337-1-seanjc@google.com> Mime-Version: 1.0 References: <20260806233609.212337-1-seanjc@google.com> X-Mailer: git-send-email 2.55.0.679.g6767b8d81c-goog Message-ID: <20260806233609.212337-2-seanjc@google.com> Subject: [PATCH v6 01/51] x86/apic: Provide helpers to set local APIC timer frequency in hz and khz From: Sean Christopherson To: Kiryl Shutsemau , Rick Edgecombe , Sean Christopherson , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , Miroslav Lichvar , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , David Woodhouse , Thomas Gleixner X-purgate-ID: tlsNG-16d1c6/1786059387-FD20877B-5EBF9333/0/0 X-purgate-type: clean X-purgate-size: 6199 X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1786059421254158501 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add and use APIs to set the local APIC timer period (given a frequency) instead of open coding the subtle HZ math in all external callers, and make lapic_timer_period local to apic.c. Provide APIs to specify the frequency in both hertz and kilohertz so that Hyper-V and VMware code aren't forced to lose precision. Opportunistically take the frequency as a u64 to harden against the possibility that the frequency (in Khz) is greater than 4294967, i.e. if the APIC timer runs at ~4.29 GHz. As pointed out by Sashiko, 4294968 * 1000 =3D=3D 0x1_000002c0, and thus a Khz period of 4294968 would silently overflow the 32-bit unsigned integer used by most callers. Print out who set the period to maintain equivalent Hyper-V and VMware functionality, and in general to make it easier to triage/debug issues. Cc: Michael Kelley Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --- arch/x86/include/asm/apic.h | 3 ++- arch/x86/kernel/apic/apic.c | 19 ++++++++++++++++++- arch/x86/kernel/cpu/mshyperv.c | 5 +---- arch/x86/kernel/cpu/vmware.c | 4 +--- arch/x86/kernel/jailhouse.c | 2 +- arch/x86/kernel/tsc.c | 2 +- arch/x86/kernel/tsc_msr.c | 2 +- 7 files changed, 25 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 9cd493d467d4..6946220a6008 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -63,7 +63,6 @@ extern int apic_verbosity; extern int local_apic_timer_c2_ok; =20 extern bool apic_is_disabled; -extern unsigned int lapic_timer_period; =20 extern enum apic_intr_mode_id apic_intr_mode; enum apic_intr_mode_id { @@ -138,6 +137,8 @@ void register_lapic_address(unsigned long address); extern void setup_boot_APIC_clock(void); extern void setup_secondary_APIC_clock(void); extern void lapic_update_tsc_freq(void); +extern void apic_set_timer_frequency_hz(u64 freq_hz, const char *source); +extern void apic_set_timer_frequency_khz(u64 freq_khz, const char *source); =20 #ifdef CONFIG_X86_64 static inline bool apic_force_enable(unsigned long addr) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 90025451ace2..9239dca91c41 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -37,6 +37,7 @@ #include #include #include +#include =20 #include =20 @@ -176,7 +177,7 @@ static struct resource lapic_resource =3D { }; =20 /* Measured in ticks per HZ. */ -unsigned int lapic_timer_period =3D 0; +static unsigned int lapic_timer_period; =20 static void apic_pm_activate(void); =20 @@ -796,6 +797,22 @@ bool __init apic_needs_pit(void) return lapic_timer_period =3D=3D 0; } =20 +void apic_set_timer_frequency_hz(u64 freq_hz, const char *source) +{ + u32 f_remainder; + u64 f_khz =3D div_u64_rem(freq_hz, HZ_PER_KHZ, &f_remainder); + + lapic_timer_period =3D div_u64(freq_hz, HZ); + + pr_info("Local APIC Timer Frequency set to %llu.%03u KHz (from '%s').\n", + f_khz, f_remainder, source); +} + +void apic_set_timer_frequency_khz(u64 freq_khz, const char *source) +{ + apic_set_timer_frequency_hz(freq_khz * HZ_PER_KHZ, source); +} + static int __init calibrate_APIC_clock(void) { struct clock_event_device *levt =3D this_cpu_ptr(&lapic_events); diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 185d4f677ec0..cadc7f872b4f 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -646,10 +646,7 @@ static void __init ms_hyperv_init_platform(void) u64 hv_lapic_frequency; =20 rdmsrq(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency); - hv_lapic_frequency =3D div_u64(hv_lapic_frequency, HZ); - lapic_timer_period =3D hv_lapic_frequency; - pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n", - lapic_timer_period); + apic_set_timer_frequency_hz(hv_lapic_frequency, "Hyper-V hypervisor"); } =20 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST, diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 34b73573b108..22842bf5b59e 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -424,9 +424,7 @@ static void __init vmware_platform_setup(void) =20 #ifdef CONFIG_X86_LOCAL_APIC /* Skip lapic calibration since we know the bus frequency. */ - lapic_timer_period =3D ecx / HZ; - pr_info("Host bus clock speed read from hypervisor : %u Hz\n", - ecx); + apic_set_timer_frequency_hz(ecx, "VMware hypervisor"); #endif } else { pr_warn("Failed to get TSC freq from the hypervisor\n"); diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index f58ce9220e0f..615a1f25c83a 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -65,7 +65,7 @@ static void jailhouse_get_wallclock(struct timespec64 *no= w) =20 static void __init jailhouse_timer_init(void) { - lapic_timer_period =3D setup_data.v1.apic_khz * (1000 / HZ); + apic_set_timer_frequency_khz(setup_data.v1.apic_khz, "Jailhouse hyperviso= r"); } =20 static unsigned long jailhouse_get_tsc(void) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 723347e2cf7f..63e26805f8dd 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -717,7 +717,7 @@ unsigned long native_calibrate_tsc(void) * lapic_timer_period here to avoid having to calibrate the APIC * timer later. */ - lapic_timer_period =3D crystal_khz * 1000 / HZ; + apic_set_timer_frequency_khz(crystal_khz, "CPUID 0x15/0x16"); #endif =20 return crystal_khz * ebx_numerator / eax_denominator; diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index d74743c8d2a4..4bd5f2ae656b 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -212,7 +212,7 @@ unsigned long cpu_khz_from_msr(void) pr_err("Error MSR_FSB_FREQ index %d is unknown\n", index); =20 #ifdef CONFIG_X86_LOCAL_APIC - lapic_timer_period =3D (freq * 1000) / HZ; + apic_set_timer_frequency_khz(freq, "MSR_FSB_FREQ"); #endif =20 /* --=20 2.55.0.679.g6767b8d81c-goog