From nobody Mon Sep 21 20:52:00 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26FA83F6C52 for ; Thu, 16 Jul 2026 09:03:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784192633; cv=none; b=jCWOIezaYqsb1brUtEs0SsFJ2n3lPfWxdEDdZHiT1v00dIt10HaMq6t72Vgqdv1KYIzEdEZvrUHsSWQlesjW7abESroe7r8+ZRnbJCxApuCha/rIQhcUnnjICSktVOB/N6UvijhAdyWODLuPa/CdV3B4S82u+MwXxmyu/YXwpGE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784192633; c=relaxed/simple; bh=1viaAX+744S54GCG+tWfVVj2xmjTbnyOumJ6LSWV5BM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FhXzVzpcRs+R3w6mpU68PQeonRSjaJe94LphQb7yF5dtYaXIq2t2zvY2cU5SGEscp649+q+pqKsZGoKwWgwwH8I3pXsCubtOkswnb6vba7gdin2kQSlJGGShXPg0z9r/zVCWHc+20q1zORCcoOsLJEzlJuKoFUlgrVMMrBdWhWg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=HO+D16pl; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=ds3NtDC1; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="HO+D16pl"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="ds3NtDC1" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66G7Dsoo2048856 for ; Thu, 16 Jul 2026 09:03:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= cXDzlp0Mz8ahuhkKRd5AdRfYSWy40uSfi+gwEDZHB1w=; b=HO+D16pl5NnizWLT EiMKDbufmks1qDlaQmm1bJz9KtHJwjUUnFtC4Me8/8F36stmqHRtBitdEEowis42 Czjd1k9g6jTFrBIkPRKARjHghPuGlbRrFzUjSyKg4sIRVah6bmHxFnhNggLNKtDN 6LwFrZ/16Im1HNnxucmuQINDVjXIzrL8otMAYymHT4IbqXFio6vLxD7ML6EUARO7 h/oK7i6SVbP6XjgA770I5CoABfF8si0W7ccqtMQmYbU2TUT/b2dMzt9sNMKs6+/f b7U6y2Np8ogkNabFyqwfqFxd9FMgcDNaN9pWrCBypJwJFv7mZVeE4zlXT88wTA6E EEqdlw== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4feayfm47a-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 09:03:39 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-2cca3673560so119137875ad.1 for ; Thu, 16 Jul 2026 02:03:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784192619; x=1784797419; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=cXDzlp0Mz8ahuhkKRd5AdRfYSWy40uSfi+gwEDZHB1w=; b=ds3NtDC1L682q9Lhh3AbxtcrXx1HbXYvOPtBby1i5zrZ+pc5Nrv4Jh+XkaU0/bKI2Q eahYeMY++2O3CDX/L9BvcpzFCFM2h2Dpbuv32vkZhkttlfduzwIp5wNZHtfDlGYkYoyn KuRJW9fKogsaGlosxuoIXDRXgfeecB5Mu3Puj7n/G+SBntupZ61EbNxkb9cK2MyNH0lI SSD+3LPh9Vj2HZAuMxuYSdBDUYYDiGFLkR4FVe82TVNag6j8iqq8HIpyge9b9j8Qok8J V8ctedSGnouXJTb06GzvjcjJhO+AR9hfpCz1z/thgaQbvxxPTOWDQN27mWaMlWNgFVH5 E6lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784192619; x=1784797419; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=cXDzlp0Mz8ahuhkKRd5AdRfYSWy40uSfi+gwEDZHB1w=; b=SkMcGDqPKZusNZ+fKTUGKBqR96xbHhWOiIZHhT4ayzqrdaIsHk15VE0TSQ6mCDkL4q AE3tsOB8x3M7j9GdBUqQzBusrR/tuxrBonGcMGgga71/X1PF1Mh/q1sTXpzLXxNbayv8 IrmTXVXr8ugicMdipoA5Y/Bxdq5dnyKVJF9LUjnXZVIOd2q0YBroXChrDwODfw8hOhGZ 4699mKIqCtBJMgsfsGStwe3OvkDjCe7yTKVZAtgB+cMLfUKRekxDHIIEumP30rgZ2OD0 fYZd2CqOGN7Pj8+E6hvblqQdbiFo9Bbn2KOhbhf32xp4ScQiRMJAjtNJBawhPO0KcZYt pI2g== X-Forwarded-Encrypted: i=1; AHgh+RpgNoLvbKMYcSFtEGSw96MuH550DWs/wIvh28fsbpO/xcRiLkatbXnJnpzMorsbgYJcO5c+4idBNnJFV/I=@vger.kernel.org X-Gm-Message-State: AOJu0YwgT2wYJB7pPx8QW42djjhHW5DRRuOoDhz+YK+DwS5Owr9P62fT d9K4+R3S2/bEPC+KaB6Fq2vMf9x6mQvL7QUc+1K2GxfDB9NsWaeylF8rrQELtcZcin1jfkkjIEH kwgrJQZo0pVPhqfAlNTcyLqlxej9XUIfJNJ3z2wrb0exjtd2yd98MZzu3rephziZ1P1Q= X-Gm-Gg: AfdE7clmaW5U14r/nKyc7pQbx0HL/O1g8lGEA7SHFY+GdS1eYi4+6dHjeVLzUYmSP4G jYXijk2EU4wZ1V7uxQDFavaEjCHeiQv0TsnesPWUb6vHzWEO1dxf64joaSZYw+K+SROYhjLyBht dVNFVcsAzuWSZ7/2pWMunb1VpAlGY2vH6E3Av0h7KXL0QwS8p1BaGreQz1jRrPtmit30j+NSRFA e8T1k8PN4C3chXbh5S8LsANKMihcDKvd84m7g+3cTKuRtbS3PnHoq91/7WyyAyDAA5TInaWntz8 qQBXkK+mRbOLcLQykfmhtsSYHETVuuu+6doyxVNqnxccazg27TIVLZ/KY9J7p8aH0COpcqwKdx3 FWNIX3EdKSCJqkcHAmDqR X-Received: by 2002:a17:902:fda8:b0:2ca:4b7a:4a02 with SMTP id d9443c01a7336-2cef1370d34mr95423185ad.43.1784192618465; Thu, 16 Jul 2026 02:03:38 -0700 (PDT) X-Received: by 2002:a17:902:fda8:b0:2ca:4b7a:4a02 with SMTP id d9443c01a7336-2cef1370d34mr95422605ad.43.1784192617798; Thu, 16 Jul 2026 02:03:37 -0700 (PDT) Received: from le-cd01-lnx.qualcomm.com ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf106b271asm16592555ad.64.2026.07.16.02.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jul 2026 02:03:37 -0700 (PDT) From: Ze Huang Date: Thu, 16 Jul 2026 17:01:59 +0800 Subject: [PATCH v2 7/8] drm/tve200: replace struct drm_simple_display_pipe with regular atomic helpers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260716-drm-simple-kms-removal-v2-7-1133a8fc3785@oss.qualcomm.com> References: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> In-Reply-To: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> To: Alexey Brodkin , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Stanley , Andrew Jeffery , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Linus Walleij , Hans de Goede , Alex Lanzano , Oleksandr Andrushchenko Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, Ze Huang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784192560; l=12710; i=ze.huang@oss.qualcomm.com; s=20260716; h=from:subject:message-id; bh=1viaAX+744S54GCG+tWfVVj2xmjTbnyOumJ6LSWV5BM=; b=O8lpuoMTn2tkvb1RSrnDKTTQNtcFREO2jObb3WocoCvGUqjOl9Y9c3xswWhyXseEslHU7pcEk GcfaTN4aIRaAKXobRA8r0gDPuaWc00NDSyh2r/gWBxcdWV2JfOEcbIS X-Developer-Key: i=ze.huang@oss.qualcomm.com; a=ed25519; pk=8uGhlZHInA8NXq7G6u/g59qEcwXwuMRI7nBSnT/ijtY= X-Proofpoint-GUID: xBTnvinkcGak35BTzsRzfoD6EwynNLj1 X-Authority-Analysis: v=2.4 cv=WoMb99fv c=1 sm=1 tr=0 ts=6a589e6b cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=dgwnEUiFKTnKxPjcC9oA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfX39Nc0KpEbTLK 2wS28wSGy+eMBa5AVxGxjT4jGM+d/Anm7HqzRsM8zt1J5OgZwQskTju/TqmTfLKqu9xZUJdTT1g 5xFquKKmTa+Q7kh+wpw1M2KV+xFhyxBqimApTEVlMF+FNdoNnqr/rZgZojZ0rSCkwoEZqb9iokn nKuSxo1qKKgws0zWFgwIScIdhSDpFGleDUmmkw4JEEQ6hkbwm4TJJeektMbhYH1sSm3XkYF0ZSE 5gHqANq3ciLuMKEaEQSj9hQBqF+3d+Xgf8lFIoY9TAk3Csjpw6eQUXdHlLTCzPlSFPnVisRQMLt 3/xrBhSV8AqgFgFiSZ2rrjgLybIblbxccv8BDb73Z03sADxk/QLGPQZxM5TIdo4LUuacW8yV8FG +cl3A9ERrs/z7KdqfEepIKkKWwaKRDo3Fl7ZM04Ybb+o5NpLRq8w/WKtzG24EIE183AvsGbfsaL LHdpAMnYdNqD1Xa9cjQ== X-Proofpoint-ORIG-GUID: xBTnvinkcGak35BTzsRzfoD6EwynNLj1 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfX7nqXSuYh9sTZ 0SpeVV+UP5+jMJVYYxixgoq++nYq0FwRRwTAHV/263Iwc85fnRat0a3kztaWdbwfXHHBdaJDnjD LVSK376LG4SI6Scgh3SVYliEDlGF654= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_03,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160091 Convert TVE200 to explicit plane, CRTC and encoder objects. Keep generic plane-state validation before TVE200-specific mode, alignment, pitch and format-change checks, and install GEM framebuffer prepare helper explicitly. Move page-flip event handling to the CRTC commit path and wire the CRTC vblank callbacks explicitly so events are not consumed from the plane update path. Signed-off-by: Ze Huang --- drivers/gpu/drm/tve200/tve200_display.c | 217 ++++++++++++++++++++++------= ---- drivers/gpu/drm/tve200/tve200_drm.h | 6 +- drivers/gpu/drm/tve200/tve200_drv.c | 12 +- 3 files changed, 161 insertions(+), 74 deletions(-) diff --git a/drivers/gpu/drm/tve200/tve200_display.c b/drivers/gpu/drm/tve2= 00/tve200_display.c index 26b6c65ef6fd..6021f90d8531 100644 --- a/drivers/gpu/drm/tve200/tve200_display.c +++ b/drivers/gpu/drm/tve200/tve200_display.c @@ -15,6 +15,8 @@ #include #include =20 +#include +#include #include #include #include @@ -52,7 +54,7 @@ irqreturn_t tve200_irq(int irq, void *data) val =3D readl(priv->regs + TVE200_CTRL); /* We have an actual start of vsync */ if (!(val & TVE200_VSTSTYPE_BITS)) { - drm_crtc_handle_vblank(&priv->pipe.crtc); + drm_crtc_handle_vblank(&priv->crtc); /* Toggle trigger to start of active image */ val |=3D TVE200_VSTSTYPE_VAI; } else { @@ -69,13 +71,32 @@ irqreturn_t tve200_irq(int irq, void *data) return IRQ_HANDLED; } =20 -static int tve200_display_check(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *pstate, - struct drm_crtc_state *cstate) +static int tve200_plane_helper_atomic_check(struct drm_plane *plane, + struct drm_atomic_commit *commit) { - const struct drm_display_mode *mode =3D &cstate->mode; - struct drm_framebuffer *old_fb =3D pipe->plane.state->fb; + struct drm_plane_state *pstate =3D drm_atomic_get_new_plane_state(commit,= plane); + struct drm_plane_state *old_pstate =3D drm_atomic_get_old_plane_state(com= mit, plane); + struct drm_crtc *crtc =3D pstate->crtc; + struct drm_crtc_state *cstate =3D NULL; + const struct drm_display_mode *mode; + struct drm_framebuffer *old_fb =3D old_pstate->fb; struct drm_framebuffer *fb =3D pstate->fb; + int ret; + + if (crtc) + cstate =3D drm_atomic_get_new_crtc_state(commit, crtc); + + ret =3D drm_atomic_helper_check_plane_state(pstate, cstate, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); + if (ret) + return ret; + + if (!pstate->visible || !cstate) + return 0; + + mode =3D &cstate->mode; =20 /* * We support these specific resolutions and nothing else. @@ -119,16 +140,72 @@ static int tve200_display_check(struct drm_simple_dis= play_pipe *pipe, return 0; } =20 -static void tve200_display_enable(struct drm_simple_display_pipe *pipe, - struct drm_crtc_state *cstate, - struct drm_plane_state *plane_state) +static void tve200_plane_helper_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *commit) +{ + struct tve200_drm_dev_private *priv =3D plane->dev->dev_private; + struct drm_plane_state *pstate =3D drm_atomic_get_new_plane_state(commit,= plane); + struct drm_framebuffer *fb =3D pstate->fb; + + if (!fb) + return; + + /* For RGB, the Y component is used as base address */ + writel(drm_fb_dma_get_gem_addr(fb, pstate, 0), + priv->regs + TVE200_Y_FRAME_BASE_ADDR); + + /* For three plane YUV we need two more addresses */ + if (fb->format->format =3D=3D DRM_FORMAT_YUV420) { + writel(drm_fb_dma_get_gem_addr(fb, pstate, 1), + priv->regs + TVE200_U_FRAME_BASE_ADDR); + writel(drm_fb_dma_get_gem_addr(fb, pstate, 2), + priv->regs + TVE200_V_FRAME_BASE_ADDR); + } +} + +static void tve200_crtc_helper_atomic_flush(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) +{ + struct drm_crtc_state *cstate =3D drm_atomic_get_new_crtc_state(commit, c= rtc); + struct drm_pending_vblank_event *event =3D cstate->event; + + if (!event) + return; + + cstate->event =3D NULL; + + spin_lock_irq(&crtc->dev->event_lock); + if (cstate->active && drm_crtc_vblank_get(crtc) =3D=3D 0) + drm_crtc_arm_vblank_event(crtc, event); + else + drm_crtc_send_vblank_event(crtc, event); + spin_unlock_irq(&crtc->dev->event_lock); +} + +static const struct drm_plane_helper_funcs tve200_plane_helper_funcs =3D { + .prepare_fb =3D drm_gem_plane_helper_prepare_fb, + .atomic_check =3D tve200_plane_helper_atomic_check, + .atomic_update =3D tve200_plane_helper_atomic_update, +}; + +static const struct drm_plane_funcs tve200_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + .destroy =3D drm_plane_cleanup, + .reset =3D drm_atomic_helper_plane_reset, + .atomic_duplicate_state =3D drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_plane_destroy_state, +}; + +static void tve200_crtc_helper_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) { - struct drm_crtc *crtc =3D &pipe->crtc; - struct drm_plane *plane =3D &pipe->plane; struct drm_device *drm =3D crtc->dev; struct tve200_drm_dev_private *priv =3D drm->dev_private; + struct drm_crtc_state *cstate =3D drm_atomic_get_new_crtc_state(commit, c= rtc); const struct drm_display_mode *mode =3D &cstate->mode; - struct drm_framebuffer *fb =3D plane->state->fb; + struct drm_plane_state *plane_state =3D priv->plane.state; + struct drm_framebuffer *fb =3D plane_state->fb; struct drm_connector *connector =3D priv->connector; u32 format =3D fb->format->format; u32 ctrl1 =3D 0; @@ -240,9 +317,9 @@ static void tve200_display_enable(struct drm_simple_dis= play_pipe *pipe, drm_crtc_vblank_on(crtc); } =20 -static void tve200_display_disable(struct drm_simple_display_pipe *pipe) +static void tve200_crtc_helper_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) { - struct drm_crtc *crtc =3D &pipe->crtc; struct drm_device *drm =3D crtc->dev; struct tve200_drm_dev_private *priv =3D drm->dev_private; =20 @@ -255,46 +332,8 @@ static void tve200_display_disable(struct drm_simple_d= isplay_pipe *pipe) clk_disable_unprepare(priv->clk); } =20 -static void tve200_display_update(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *old_pstate) -{ - struct drm_crtc *crtc =3D &pipe->crtc; - struct drm_device *drm =3D crtc->dev; - struct tve200_drm_dev_private *priv =3D drm->dev_private; - struct drm_pending_vblank_event *event =3D crtc->state->event; - struct drm_plane *plane =3D &pipe->plane; - struct drm_plane_state *pstate =3D plane->state; - struct drm_framebuffer *fb =3D pstate->fb; - - if (fb) { - /* For RGB, the Y component is used as base address */ - writel(drm_fb_dma_get_gem_addr(fb, pstate, 0), - priv->regs + TVE200_Y_FRAME_BASE_ADDR); - - /* For three plane YUV we need two more addresses */ - if (fb->format->format =3D=3D DRM_FORMAT_YUV420) { - writel(drm_fb_dma_get_gem_addr(fb, pstate, 1), - priv->regs + TVE200_U_FRAME_BASE_ADDR); - writel(drm_fb_dma_get_gem_addr(fb, pstate, 2), - priv->regs + TVE200_V_FRAME_BASE_ADDR); - } - } - - if (event) { - crtc->state->event =3D NULL; - - spin_lock_irq(&crtc->dev->event_lock); - if (crtc->state->active && drm_crtc_vblank_get(crtc) =3D=3D 0) - drm_crtc_arm_vblank_event(crtc, event); - else - drm_crtc_send_vblank_event(crtc, event); - spin_unlock_irq(&crtc->dev->event_lock); - } -} - -static int tve200_display_enable_vblank(struct drm_simple_display_pipe *pi= pe) +static int tve200_crtc_enable_vblank(struct drm_crtc *crtc) { - struct drm_crtc *crtc =3D &pipe->crtc; struct drm_device *drm =3D crtc->dev; struct tve200_drm_dev_private *priv =3D drm->dev_private; =20 @@ -304,22 +343,48 @@ static int tve200_display_enable_vblank(struct drm_si= mple_display_pipe *pipe) return 0; } =20 -static void tve200_display_disable_vblank(struct drm_simple_display_pipe *= pipe) +static void tve200_crtc_disable_vblank(struct drm_crtc *crtc) { - struct drm_crtc *crtc =3D &pipe->crtc; struct drm_device *drm =3D crtc->dev; struct tve200_drm_dev_private *priv =3D drm->dev_private; =20 writel(0, priv->regs + TVE200_INT_EN); } =20 -static const struct drm_simple_display_pipe_funcs tve200_display_funcs =3D= { - .check =3D tve200_display_check, - .enable =3D tve200_display_enable, - .disable =3D tve200_display_disable, - .update =3D tve200_display_update, - .enable_vblank =3D tve200_display_enable_vblank, - .disable_vblank =3D tve200_display_disable_vblank, +static int tve200_crtc_helper_atomic_check(struct drm_crtc *crtc, struct d= rm_atomic_commit *commit) +{ + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(commi= t, crtc); + int ret; + + if (crtc_state->enable) { + ret =3D drm_atomic_helper_check_crtc_primary_plane(crtc_state); + if (ret) + return ret; + } + + return drm_atomic_add_affected_planes(commit, crtc); +} + +static const struct drm_crtc_helper_funcs tve200_crtc_helper_funcs =3D { + .atomic_check =3D tve200_crtc_helper_atomic_check, + .atomic_enable =3D tve200_crtc_helper_atomic_enable, + .atomic_disable =3D tve200_crtc_helper_atomic_disable, + .atomic_flush =3D tve200_crtc_helper_atomic_flush, +}; + +static const struct drm_crtc_funcs tve200_crtc_funcs =3D { + .reset =3D drm_atomic_helper_crtc_reset, + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, + .enable_vblank =3D tve200_crtc_enable_vblank, + .disable_vblank =3D tve200_crtc_disable_vblank, +}; + +static const struct drm_encoder_funcs tve200_encoder_funcs =3D { + .destroy =3D drm_encoder_cleanup, }; =20 int tve200_display_init(struct drm_device *drm) @@ -346,13 +411,31 @@ int tve200_display_init(struct drm_device *drm) DRM_FORMAT_YUV420, }; =20 - ret =3D drm_simple_display_pipe_init(drm, &priv->pipe, - &tve200_display_funcs, - formats, ARRAY_SIZE(formats), - NULL, - priv->connector); + ret =3D drm_universal_plane_init(drm, &priv->plane, 0, + &tve200_plane_funcs, + formats, ARRAY_SIZE(formats), + NULL, + DRM_PLANE_TYPE_PRIMARY, NULL); if (ret) return ret; =20 + drm_plane_helper_add(&priv->plane, &tve200_plane_helper_funcs); + + ret =3D drm_crtc_init_with_planes(drm, &priv->crtc, + &priv->plane, NULL, + &tve200_crtc_funcs, NULL); + if (ret) + return ret; + + drm_crtc_helper_add(&priv->crtc, &tve200_crtc_helper_funcs); + + ret =3D drm_encoder_init(drm, &priv->encoder, + &tve200_encoder_funcs, + DRM_MODE_ENCODER_NONE, NULL); + if (ret) + return ret; + + priv->encoder.possible_crtcs =3D drm_crtc_mask(&priv->crtc); + return 0; } diff --git a/drivers/gpu/drm/tve200/tve200_drm.h b/drivers/gpu/drm/tve200/t= ve200_drm.h index 5420b52ea16b..631a9f5d9aa6 100644 --- a/drivers/gpu/drm/tve200/tve200_drm.h +++ b/drivers/gpu/drm/tve200/tve200_drm.h @@ -15,8 +15,6 @@ =20 #include =20 -#include - struct clk; struct drm_bridge; struct drm_connector; @@ -107,7 +105,9 @@ struct tve200_drm_dev_private { struct drm_connector *connector; struct drm_panel *panel; struct drm_bridge *bridge; - struct drm_simple_display_pipe pipe; + struct drm_plane plane; + struct drm_crtc crtc; + struct drm_encoder encoder; =20 void *regs; struct clk *pclk; diff --git a/drivers/gpu/drm/tve200/tve200_drv.c b/drivers/gpu/drm/tve200/t= ve200_drv.c index 562f3f11812a..0b8096b1e600 100644 --- a/drivers/gpu/drm/tve200/tve200_drv.c +++ b/drivers/gpu/drm/tve200/tve200_drv.c @@ -105,16 +105,20 @@ static int tve200_modeset_init(struct drm_device *dev) goto out_bridge; } =20 - ret =3D drm_simple_display_pipe_attach_bridge(&priv->pipe, - bridge); + priv->panel =3D panel; + priv->bridge =3D bridge; + + ret =3D drm_bridge_attach(&priv->encoder, bridge, NULL, 0); if (ret) { dev_err(dev->dev, "failed to attach bridge\n"); goto out_bridge; } =20 - priv->panel =3D panel; priv->connector =3D drm_panel_bridge_connector(bridge); - priv->bridge =3D bridge; + if (!priv->connector) { + ret =3D -ENODEV; + goto out_bridge; + } =20 dev_info(dev->dev, "attached to panel %s\n", dev_name(panel->dev)); --=20 2.43.0