From nobody Thu Jul 23 21:13:54 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784192606; cv=none; d=zohomail.com; s=zohoarc; b=ifVqWRsYhxHeyCAt/DrxGJWMeOau9B8AUNoO8cjGnfZTKsxZg+ZkxR1b5hv2HY1rhj5dCBsTMn8+Q9VVxNYB6mV/72hoog7TSzO6Uc1Lp6wuFVMI/8S0ZmA8JJ6mTlo+ofvq3mRw8C1GwDZ4bBC6kmKsZHqI9+ZDAaEO2xwJfxA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784192606; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=K0bpK7inA55ypw9IyK4ZYF+yJtIn8h5ntrPY4x3zw2I=; b=KxAKvGVI2YzzOpeqkjLX9hZ8kY8PPMhlTgF2mh5uD+wKVHfXgTQ7h8cGdm1po1aCvjh1o5wfkIi40/r8W2Xe8OpLIMjw9+pJBjx1wX8V8pMABNI6bXyuqGLSU5ybZXAU4tS9IeLjOR+vDaddLeaD1nSeoSU9J3dOCAbkAe8Ilvs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1784192606299326.00704662043154; Thu, 16 Jul 2026 02:03:26 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1363563.1615146 (Exim 4.92) (envelope-from ) id 1wkHzg-0001So-PO; Thu, 16 Jul 2026 09:03:00 +0000 Received: by outflank-mailman (output) from mailman id 1363563.1615146; Thu, 16 Jul 2026 09:03:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wkHzg-0001Sh-IE; Thu, 16 Jul 2026 09:03:00 +0000 Received: by outflank-mailman (input) for mailman id 1363563; Thu, 16 Jul 2026 09:02:59 +0000 Received: from mx.expurgate.net ([195.190.135.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wkHzf-0001Rv-CZ for xen-devel@lists.xenproject.org; Thu, 16 Jul 2026 09:02:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wkHze-005AXw-P6 for xen-devel@lists.xenproject.org; Thu, 16 Jul 2026 11:02:58 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a589e36-2eae-0a2a0a5409dd-0a2a4503be80-40 for ; Thu, 16 Jul 2026 11:02:58 +0200 Received: from [205.220.180.131] (helo=mx0b-0031df01.pphosted.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a589e40-fae8-0a2a45030019-cddcb48388c8-3 for ; Thu, 16 Jul 2026 11:02:58 +0200 Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66G838GX2123575 for ; Thu, 16 Jul 2026 09:02:56 GMT Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4feuex072t-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 09:02:56 +0000 (GMT) Received: by mail-pl1-f199.google.com with SMTP id d9443c01a7336-2c7f385887bso154816165ad.0 for ; Thu, 16 Jul 2026 02:02:56 -0700 (PDT) Received: from le-cd01-lnx.qualcomm.com ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf106b271asm16592555ad.64.2026.07.16.02.02.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jul 2026 02:02:54 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=qcppdkim1 header.d=qualcomm.com header.i="@qualcomm.com" header.h="Cc:Content-Transfer-Encoding:Content-Type:Date:From:In-Reply-To:Message-Id:MIME-Version:References:Subject:To"; dkim=pass header.s=google header.d=oss.qualcomm.com header.i="@oss.qualcomm.com" header.h="Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= K0bpK7inA55ypw9IyK4ZYF+yJtIn8h5ntrPY4x3zw2I=; b=jtsMH/CiIg+IYyIM UoWG17o1MwtLWopLoZO3sy24Al2Z9sOFbaENN4AOVJF4xU+bpPR+d9C9787h4TwO tSi9Ly3o/bxKWOdhB2fUU2i6GLhIiOeLqh+axAMMQ1eq/rr8R37KUew+2z2OQOHC nepZjqnosLkUboNLZlbyuXUjJEuUwJmPnkH2LVpO1iG4PXZJbOh8GFxD2BcKMFn7 41Czs3gRW49t6RwW8MVnxwacodggU7naT8AG19dTfVi+b1JqsixtDBt1+u2reMB+ XBxXv62GBdx6j/TuWz2kjm07GxtIOsh5Py6VZY4wdDPyPKa0u7dUY310ccoTFnlq 1cRjdA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784192575; x=1784797375; darn=lists.xenproject.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=K0bpK7inA55ypw9IyK4ZYF+yJtIn8h5ntrPY4x3zw2I=; b=VIccdnXdof8AWkzdZJMFCsFmzzM/CgxoUDtrAZHuorSIim6x6pAoxJr6ArjlIeBx3n ZEZvbEW56RDDo2x86oFBCgG0lLeTBmOG4ZODj8Sdxi/1ne+03AGTSBw4AxuHv0qa2xI2 pY44IA5MXDihQ4YX24sP26WtfMq1+uV3uJ2nVemuCioFjKtzUBQm7jYlA8/VN85uRUE+ EcXS/hAQ13dEtqkkR/lBEU9qzoPrjD7XrOiAN6Jf98hVIhNeSh/U7SFV0aq2epJurPE+ SsO1SsQWldmj/hPUsaHCni8KbBxdIDOAc0+LkNUtjh6Xocb3ODzguO7TuVFIv/NO8n2F 8VYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784192575; x=1784797375; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=K0bpK7inA55ypw9IyK4ZYF+yJtIn8h5ntrPY4x3zw2I=; b=hdEFb4H2iBbyXUZZZrjJiqvm5YPnNQZmLVRrXnGwkPw+eexcE6eQF+0HB4xOD8YNhB Kd0GMs+rlRKcfm881VOMWCLmM8gTTy2+khH2lDBAvdm+WSXtb7tylQqfHmzBQA84x70K G898m4Gll0HIakR+CFFJZOAtX8EiGZemf8vxJrwNJvu9Yod8iypMKYL3uS5O4Ym2MCYy /zuKo3L+XwTmuCDMT3NaDHQWOB5lIfn8fm+l8ab2DLo65uMjiJTgoEofeSic+F+6uBxb CnirDLQGeMJhDAPLHrlow4TEG443HtWSanrKoUfHP4oCvSnLy4I6sy/jvtmFw4pV103K hXSA== X-Forwarded-Encrypted: i=1; AHgh+RorI4ANTVGAvOeiPWZkMNKAcRTCprTl7u+h/tm17gaT5tCirsOK4I9NCDpbjGwysEhJbehQaNMnEW0=@lists.xenproject.org X-Gm-Message-State: AOJu0YxSK2bFaucE06HOzeC/oCMmuZJ4r/NxLkAhYa4EzQ9xNjMv8cq9 5UMwluMvAV30PwEgtigVygDg9YsGcF76WUYuHvR9bjQymw8KvTagIeKIJ/keJCzuBgw74MrB9Gy ZA8s/TiZrZJ03dALcATIp2I6McABpiWHpRk795AW4TOjX2WX+fvQRHu7JHYHOL52uJdpOr0anAE GMrSoW X-Gm-Gg: AfdE7cm5tWCskceprnHf5D0sesPagY3BkAk/YRcThGpI43h176RMTgJZzVWrL5Zodfi +LPQiTCGpMUZ+mbrRMseutCwl43yaMYYKB1fWXALSFov5tp4rLmf/RKAkYQTI5HNb6323i8MS7T OqeaCSf1ZwhmmLZwDiwT/OmswkQ81hwsp1s9YOLhk3bIxAC9gMs6qQmaDkb2HIr/uPyStiJXiaH LN38Gz6pQ/QrjJ75BsTM1REJxCklrbnQ4JARYQd3iCjOlt3aTMQWt0yUOCEAokHyA/a4RI8aFIV sh90//28K4cuKVKhINhtWteOzZAI53p6SIOApGfMPa6hhpIRXViI77SQjsEzvPFlkbRPybJOM7k SIN2awLIpY2+vJv/eZJlS X-Received: by 2002:a17:902:e787:b0:2cc:7c36:2c23 with SMTP id d9443c01a7336-2cf03d6be8amr56675115ad.43.1784192575386; Thu, 16 Jul 2026 02:02:55 -0700 (PDT) X-Received: by 2002:a17:902:e787:b0:2cc:7c36:2c23 with SMTP id d9443c01a7336-2cf03d6be8amr56674695ad.43.1784192574779; Thu, 16 Jul 2026 02:02:54 -0700 (PDT) From: Ze Huang Date: Thu, 16 Jul 2026 17:01:53 +0800 Subject: [PATCH v2 1/8] drm/arcpgu: replace struct drm_simple_display_pipe with regular atomic helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260716-drm-simple-kms-removal-v2-1-1133a8fc3785@oss.qualcomm.com> References: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> In-Reply-To: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> To: Alexey Brodkin , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Stanley , Andrew Jeffery , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Linus Walleij , Hans de Goede , Alex Lanzano , Oleksandr Andrushchenko Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, Ze Huang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784192559; l=11611; i=ze.huang@oss.qualcomm.com; s=20260716; h=from:subject:message-id; bh=mhZuZpvxlw2add5yFJofNe/qRYemwKr9KZXWIRbaR4U=; b=bKGcIBRbY3DWlMj5Cf4cPqNMuGZMGDU6qKuQzX/N11LATYpXjJUNET/zATFlfhoW3+9trVitB aYnklaVV/K+BCQCTcDi+FqGjUSBjW456AT7fVFNvbJXR15fJ9ZpoOgM X-Developer-Key: i=ze.huang@oss.qualcomm.com; a=ed25519; pk=8uGhlZHInA8NXq7G6u/g59qEcwXwuMRI7nBSnT/ijtY= X-Authority-Analysis: v=2.4 cv=JeeMa0KV c=1 sm=1 tr=0 ts=6a589e40 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=dobV-df0kVLvunOko3gA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-ORIG-GUID: UVfDJ17aSi6kKC9iopJkOIgDL_Cat37y X-Proofpoint-GUID: UVfDJ17aSi6kKC9iopJkOIgDL_Cat37y X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfXzO4mU/PZRlpN hCwWRuKeMGe0hL2X2ubnf493ASUtp9TIsngfrtoCG2OHI5WlfqF3uAOnfD3caHsg/iHsghxPi3c t3bMOhhaMPv9UZezZ34IcgSkhRAPTCU= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfX1TD7Y633MImh G+1v4sbjflQ0DLuS3Z4dfHQB9+BPJLwLZTKDXAyuLA0PWnMFcWCyG5a/9K0Un3h6lZAg43J2/7+ qtfyCUgr2jjH3+z7SmZW34FfBrmBAqp77hdKVc7Sad04nFPYwsc90WMVhrywuCw2AtUAVQENDXN 3CosM4zcO+r7XVlPn5guSJpkyj128iwmAWL5Y0I7x+tf5KGIu0dTFt6yrl63CjM1KZj4eKiLCfb acu85Duf40Hb1o8LJRHKWLbYQZS252r86f/Lzf/gwfVRNuXIqP3WU5+oxo64oaAKPpo12OKc4mD ijjhmcxB41yOfgd1mwNa+MWkCUdb+0BCfN/qEMYJlQIanmktmiCEtFNBGdXsy+pA1FOM6ned3Tc 1cb2qyupVb+F7EpK7DDJmbq2lRR+ugFpYHYKeur+q5Hxl8aKE82MVrjsKRlBcI4EAlggTuSPCAW BylRsyxuS71AgQ5Pf8A== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_03,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 phishscore=0 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160091 X-purgate-ID: tlsNG-33051d/1784192578-762FD4E9-E18FBE81/0/0 X-purgate-type: clean X-purgate-size: 11613 X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784192607410158500 Instantiate plane, CRTC and encoder directly and wire them up with standard atomic helpers. This removes arcpgu's dependency on deprecated simple-KMS display pipe interface. Signed-off-by: Ze Huang --- drivers/gpu/drm/tiny/arcpgu.c | 179 +++++++++++++++++++++++++++++++-------= ---- 1 file changed, 133 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/drm/tiny/arcpgu.c b/drivers/gpu/drm/tiny/arcpgu.c index c93d61ac0bb7..e0cce4798f3e 100644 --- a/drivers/gpu/drm/tiny/arcpgu.c +++ b/drivers/gpu/drm/tiny/arcpgu.c @@ -8,6 +8,7 @@ #include =20 #include +#include #include #include #include @@ -17,12 +18,13 @@ #include #include #include +#include #include #include #include #include +#include #include -#include #include #include #include @@ -52,13 +54,16 @@ struct arcpgu_drm_private { struct drm_device drm; void __iomem *regs; struct clk *clk; - struct drm_simple_display_pipe pipe; + struct drm_plane plane; + struct drm_crtc crtc; + struct drm_encoder encoder; struct drm_connector sim_conn; }; =20 -#define dev_to_arcpgu(x) container_of(x, struct arcpgu_drm_private, drm) - -#define pipe_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, = pipe) +static inline struct arcpgu_drm_private *dev_to_arcpgu(struct drm_device *= drm) +{ + return container_of(drm, struct arcpgu_drm_private, drm); +} =20 static inline void arc_pgu_write(struct arcpgu_drm_private *arcpgu, unsigned int reg, u32 value) @@ -117,7 +122,7 @@ static const u32 arc_pgu_supported_formats[] =3D { =20 static void arc_pgu_set_pxl_fmt(struct arcpgu_drm_private *arcpgu) { - const struct drm_framebuffer *fb =3D arcpgu->pipe.plane.state->fb; + const struct drm_framebuffer *fb =3D arcpgu->plane.state->fb; uint32_t pixel_format =3D fb->format->format; u32 format =3D DRM_FORMAT_INVALID; int i; @@ -139,10 +144,10 @@ static void arc_pgu_set_pxl_fmt(struct arcpgu_drm_pri= vate *arcpgu) arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, reg_ctrl); } =20 -static enum drm_mode_status arc_pgu_mode_valid(struct drm_simple_display_p= ipe *pipe, - const struct drm_display_mode *mode) +static enum drm_mode_status arcpgu_crtc_helper_mode_valid(struct drm_crtc = *crtc, + const struct drm_display_mode *mode) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); long rate, clk_rate =3D mode->clock * 1000; long diff =3D clk_rate / 200; /* +-0.5% allowed by HDMI spec */ =20 @@ -155,7 +160,7 @@ static enum drm_mode_status arc_pgu_mode_valid(struct d= rm_simple_display_pipe *p =20 static void arc_pgu_mode_set(struct arcpgu_drm_private *arcpgu) { - struct drm_display_mode *m =3D &arcpgu->pipe.crtc.state->adjusted_mode; + struct drm_display_mode *m =3D &arcpgu->crtc.state->adjusted_mode; u32 val; =20 arc_pgu_write(arcpgu, ARCPGU_REG_FMT, @@ -194,11 +199,10 @@ static void arc_pgu_mode_set(struct arcpgu_drm_privat= e *arcpgu) clk_set_rate(arcpgu->clk, m->crtc_clock * 1000); } =20 -static void arc_pgu_enable(struct drm_simple_display_pipe *pipe, - struct drm_crtc_state *crtc_state, - struct drm_plane_state *plane_state) +static void arcpgu_crtc_helper_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); =20 arc_pgu_mode_set(arcpgu); =20 @@ -208,9 +212,10 @@ static void arc_pgu_enable(struct drm_simple_display_p= ipe *pipe, ARCPGU_CTRL_ENABLE_MASK); } =20 -static void arc_pgu_disable(struct drm_simple_display_pipe *pipe) +static void arcpgu_crtc_helper_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); =20 clk_disable_unprepare(arcpgu->clk); arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, @@ -218,35 +223,95 @@ static void arc_pgu_disable(struct drm_simple_display= _pipe *pipe) ~ARCPGU_CTRL_ENABLE_MASK); } =20 -static void arc_pgu_update(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *state) +static void arcpgu_plane_helper_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *commit) { + struct drm_plane_state *pstate =3D drm_atomic_get_new_plane_state(commit,= plane); struct arcpgu_drm_private *arcpgu; struct drm_gem_dma_object *gem; =20 - if (!pipe->plane.state->fb) + if (!pstate->fb) return; =20 - arcpgu =3D pipe_to_arcpgu_priv(pipe); - gem =3D drm_fb_dma_get_gem_obj(pipe->plane.state->fb, 0); + arcpgu =3D dev_to_arcpgu(plane->dev); + gem =3D drm_fb_dma_get_gem_obj(pstate->fb, 0); arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->dma_addr); } =20 -static const struct drm_simple_display_pipe_funcs arc_pgu_pipe_funcs =3D { - .update =3D arc_pgu_update, - .mode_valid =3D arc_pgu_mode_valid, - .enable =3D arc_pgu_enable, - .disable =3D arc_pgu_disable, -}; - static const struct drm_mode_config_funcs arcpgu_drm_modecfg_funcs =3D { - .fb_create =3D drm_gem_fb_create, + .fb_create =3D drm_gem_fb_create, .atomic_check =3D drm_atomic_helper_check, .atomic_commit =3D drm_atomic_helper_commit, }; =20 DEFINE_DRM_GEM_DMA_FOPS(arcpgu_drm_ops); =20 +static int arcpgu_plane_helper_atomic_check(struct drm_plane *plane, + struct drm_atomic_commit *commit) +{ + struct drm_plane_state *plane_state =3D drm_atomic_get_new_plane_state(co= mmit, plane); + struct drm_crtc *crtc =3D plane_state->crtc; + struct drm_crtc_state *crtc_state =3D NULL; + + if (crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(commit, crtc); + + return drm_atomic_helper_check_plane_state(plane_state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); +} + +static const struct drm_plane_helper_funcs arcpgu_plane_helper_funcs =3D { + .prepare_fb =3D drm_gem_plane_helper_prepare_fb, + .atomic_check =3D arcpgu_plane_helper_atomic_check, + .atomic_update =3D arcpgu_plane_helper_atomic_update, +}; + +static const struct drm_plane_funcs arcpgu_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + .destroy =3D drm_plane_cleanup, + .reset =3D drm_atomic_helper_plane_reset, + .atomic_duplicate_state =3D drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_plane_destroy_state, +}; + +static int arcpgu_crtc_helper_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) +{ + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(commi= t, crtc); + int ret; + + if (crtc_state->enable) { + ret =3D drm_atomic_helper_check_crtc_primary_plane(crtc_state); + if (ret) + return ret; + } + + return drm_atomic_add_affected_planes(commit, crtc); +} + +static const struct drm_crtc_helper_funcs arcpgu_crtc_helper_funcs =3D { + .mode_valid =3D arcpgu_crtc_helper_mode_valid, + .atomic_check =3D arcpgu_crtc_helper_atomic_check, + .atomic_enable =3D arcpgu_crtc_helper_atomic_enable, + .atomic_disable =3D arcpgu_crtc_helper_atomic_disable, +}; + +static const struct drm_crtc_funcs arcpgu_crtc_funcs =3D { + .reset =3D drm_atomic_helper_crtc_reset, + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, +}; + +static const struct drm_encoder_funcs arcpgu_encoder_funcs =3D { + .destroy =3D drm_encoder_cleanup, +}; + static int arcpgu_load(struct arcpgu_drm_private *arcpgu) { struct platform_device *pdev =3D to_platform_device(arcpgu->drm.dev); @@ -254,6 +319,9 @@ static int arcpgu_load(struct arcpgu_drm_private *arcpg= u) struct device_node *endpoint_node =3D NULL; struct drm_connector *connector =3D NULL; struct drm_device *drm =3D &arcpgu->drm; + struct drm_plane *plane; + struct drm_encoder *encoder; + struct drm_crtc *crtc; int ret; =20 arcpgu->clk =3D devm_clk_get(drm->dev, "pxlclk"); @@ -285,6 +353,30 @@ static int arcpgu_load(struct arcpgu_drm_private *arcp= gu) if (dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32))) return -ENODEV; =20 + plane =3D &arcpgu->plane; + ret =3D drm_universal_plane_init(drm, plane, 0, + &arcpgu_plane_funcs, + arc_pgu_supported_formats, + ARRAY_SIZE(arc_pgu_supported_formats), + NULL, + DRM_PLANE_TYPE_PRIMARY, NULL); + if (ret) + return ret; + drm_plane_helper_add(plane, &arcpgu_plane_helper_funcs); + + crtc =3D &arcpgu->crtc; + ret =3D drm_crtc_init_with_planes(drm, crtc, plane, NULL, + &arcpgu_crtc_funcs, NULL); + if (ret) + return ret; + drm_crtc_helper_add(crtc, &arcpgu_crtc_helper_funcs); + + encoder =3D &arcpgu->encoder; + ret =3D drm_encoder_init(drm, encoder, &arcpgu_encoder_funcs, DRM_MODE_EN= CODER_NONE, NULL); + if (ret) + return ret; + encoder->possible_crtcs =3D drm_crtc_mask(crtc); + /* * There is only one output port inside each device. It is linked with * encoder endpoint. @@ -293,29 +385,24 @@ static int arcpgu_load(struct arcpgu_drm_private *arc= pgu) if (endpoint_node) { encoder_node =3D of_graph_get_remote_port_parent(endpoint_node); of_node_put(endpoint_node); - } else { - connector =3D &arcpgu->sim_conn; - dev_info(drm->dev, "no encoder found. Assumed virtual LCD on simulation = platform\n"); - ret =3D arcpgu_drm_sim_init(drm, connector); - if (ret < 0) - return ret; - } =20 - ret =3D drm_simple_display_pipe_init(drm, &arcpgu->pipe, &arc_pgu_pipe_fu= ncs, - arc_pgu_supported_formats, - ARRAY_SIZE(arc_pgu_supported_formats), - NULL, connector); - if (ret) - return ret; - - if (encoder_node) { /* Locate drm bridge from the hdmi encoder DT node */ struct drm_bridge *bridge __free(drm_bridge_put) =3D of_drm_find_and_get_bridge(encoder_node); if (!bridge) return -EPROBE_DEFER; =20 - ret =3D drm_simple_display_pipe_attach_bridge(&arcpgu->pipe, bridge); + ret =3D drm_bridge_attach(encoder, bridge, NULL, 0); + if (ret) + return ret; + } else { + connector =3D &arcpgu->sim_conn; + dev_info(drm->dev, "no encoder found. Assumed virtual LCD on simulation = platform\n"); + ret =3D arcpgu_drm_sim_init(drm, connector); + if (ret < 0) + return ret; + + ret =3D drm_connector_attach_encoder(connector, encoder); if (ret) return ret; } @@ -342,7 +429,7 @@ static int arcpgu_show_pxlclock(struct seq_file *m, voi= d *arg) struct drm_device *drm =3D node->minor->dev; struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(drm); unsigned long clkrate =3D clk_get_rate(arcpgu->clk); - unsigned long mode_clock =3D arcpgu->pipe.crtc.mode.crtc_clock * 1000; + unsigned long mode_clock =3D arcpgu->crtc.state->mode.crtc_clock * 1000; =20 seq_printf(m, "hw : %lu\n", clkrate); seq_printf(m, "mode: %lu\n", mode_clock); --=20 2.43.0 From nobody Thu Jul 23 21:13:54 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784192626; cv=none; d=zohomail.com; s=zohoarc; b=WbKyu07kYbJ0S5DYZJyRG5FXEIzd/bAgEDVlxSnxVGPBNqWOioGXHADdc8Ga7hIojFwfgQTUoNgkldsmiZeWMPEfAGPklpdt+F6DxHz6tenRRxY3hYz7v75VF7lk9Fs791aa/oK0fLtxBtsfQ1qrOGffAccONjNYC2MHkX09STs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784192626; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3tiM2Xo9zA0AwLl933KbtXA0+pjiqMOmFkNsBFhqzo8=; b=cmQi3s/8ZxhdKqKCpaPuDrYEHflfYwSdeVImKdMHDin2uYfbjJYxt5whdak8+5OMpY0oBpvaBbUN+1mRWwPHZqOcNtSy0ztPVQ3Jl/0YeZp9hQhrMrbt3CWK77DjK7EnrPXB9Dz8yP7Fa4urJdSHcPoKpiEXn+cQINtr5uKIHQM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1784192626465360.7564086513279; Thu, 16 Jul 2026 02:03:46 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1363565.1615155 (Exim 4.92) (envelope-from ) id 1wkHzp-0001pk-NK; Thu, 16 Jul 2026 09:03:09 +0000 Received: by outflank-mailman (output) from mailman id 1363565.1615155; Thu, 16 Jul 2026 09:03:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wkHzp-0001pT-8a; Thu, 16 Jul 2026 09:03:09 +0000 Received: by outflank-mailman (input) for mailman id 1363565; Thu, 16 Jul 2026 09:03:07 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wkHzm-0001md-UZ for xen-devel@lists.xenproject.org; Thu, 16 Jul 2026 09:03:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wkHzm-005dYC-Ai for xen-devel@lists.xenproject.org; Thu, 16 Jul 2026 11:03:06 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a589e45-5cb7-0a2a0a5109dd-0a2a450a8c7e-32 for ; Thu, 16 Jul 2026 11:03:06 +0200 Received: from [205.220.168.131] (helo=mx0a-0031df01.pphosted.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a589e48-f2d2-0a2a450a0019-cddca883c1c6-3 for ; Thu, 16 Jul 2026 11:03:05 +0200 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66G7DNSn2193290 for ; Thu, 16 Jul 2026 09:03:03 GMT Received: from mail-pl1-f197.google.com (mail-pl1-f197.google.com [209.85.214.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fetcf0fqn-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 09:03:03 +0000 (GMT) Received: by mail-pl1-f197.google.com with SMTP id d9443c01a7336-2cce02cb769so39805145ad.1 for ; Thu, 16 Jul 2026 02:03:03 -0700 (PDT) Received: from le-cd01-lnx.qualcomm.com ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf106b271asm16592555ad.64.2026.07.16.02.02.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jul 2026 02:03:01 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=qcppdkim1 header.d=qualcomm.com header.i="@qualcomm.com" header.h="Cc:Content-Transfer-Encoding:Content-Type:Date:From:In-Reply-To:Message-Id:MIME-Version:References:Subject:To"; dkim=pass header.s=google header.d=oss.qualcomm.com header.i="@oss.qualcomm.com" header.h="Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 3tiM2Xo9zA0AwLl933KbtXA0+pjiqMOmFkNsBFhqzo8=; b=O9/7xKQfaUdPOLcf 47Wc9WqOJhDcpZvw6ig8VgPVsE02760Kn1LAnh+w7W5tbwEELiqdLkw41ky4ReK9 +uPEd0WSzdJqM15s6LaHy27C86zf4WgmqlM9+t+trH8TYGHkUcXZ7hOKUZ29Z7QH uKAO5Wsxn/5mz9Sz9cotDVDKJT55oLN9N43wbKPH0QU4LdtdNRhLhHULxOdWBquE l57XJ4pJpFkq/Mpob8bIz2vfeD9qfkQIJOQVU/g3uYx5LuTcgwIdRCYO2q9a9M/c ugxJveHf6VpSJutCvcgMNTumSBTld04Nb4W5naMOVwDZh6VEw64auKdmcxvhpUuD k809pg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784192583; x=1784797383; darn=lists.xenproject.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=3tiM2Xo9zA0AwLl933KbtXA0+pjiqMOmFkNsBFhqzo8=; b=TyuYFxQj6+Nt271uEiBxsVa5uxAWAIyggKur0NrSMHztmGrGhQch6YYNb+EZ2S9MdI Bv1MFZetbgEBI+FBogxMYCxF9FDo0VMw08tl7Nd55humK+hQ24MzGShpYBR8qCregt7b PmmuobZzucaTbXe+dW96aSpxtbbb1qBp8N21B/wJYMeoxPeHoZ1Xta0ZBna9Nd8+qQBf JMIXDNvQWBbP1c9ROFbn/P1rIaa8MsICce9gwX09WTKZd3c2A6ut3xdUUTbguSPEArct ja5UOFfLJn3U5H8UjpOvapPA0uA7jpT6XNGD5+EE0HAR8y1YEkLW92m6uONkncGCl+tr Av8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784192583; x=1784797383; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=3tiM2Xo9zA0AwLl933KbtXA0+pjiqMOmFkNsBFhqzo8=; b=gKz4PomvD7O+/yWWn6rYInmT7pO9IDsUkSezphbZMLZ424LF+PCRfYSBSBE7j/fmJL aFZnXEAzrqJm06xfocYsXiI4ZPMH+L4uFljDnQtQAIYKqbVQXmqP5DJF67WVudrqF+Yo ZixBWmCpHAGAFPUCdza2RAtkSY0B+7JaAFnJ9BYikX7yw6enCQG2DB3yLw2nhWRMM6G7 JRvSdx0kkllYzG3PTjfuNVeZOpxySwhFtGZoG0RWqC/MIjWR0TQbUNvxxVqO4N3e/HKx 9R0BQjT2jiKDZanTP68T8eDYhQci6WiMGF3rOMH9uz/9d36AmaLT+olsE1F4cezgMQ+5 iFnA== X-Forwarded-Encrypted: i=1; AHgh+RoCRBFxpRroVWO5piM/s8imDs1vw7B0dkgkprcfDXvVeO2Z3XT3uPPXqNCsXxBaQ94aJ/XIdd7yPVs=@lists.xenproject.org X-Gm-Message-State: AOJu0Yx73yl7lfKgNnf3gIILNQWyU67xdENbBebdJu2Ka96nNwTF5pqO WkwtRfZGwXEUNg/aMYITXsJVYJvk/dLowHKgc67Q+SQ0QypneMnqaCNIBZ17rxPJk+tUzM2jQYb +ED18GMU79kW8m1tod+DTgeXlSTsOdbDNEruQM+nEB3Pe6hRy6aiUhn+Bv1uAHWHKfoYfZrvNNL CJmHaK X-Gm-Gg: AfdE7clDGiO5Fm+/jjFIEXHWAHI4kQJMr+dUOYM0yI7wxU6d/8pRV9LJgm8BOuSp2iU /pwPF5jCpdpuu4bjRlAmKT+MIPtjX70LQ3hIYxO3s4LDHcPIoMtxC7oBXv68lhS0d/gsyw4XOa0 ieNx9y/VgxFj3IBgpUJiaNfvOgQ5MtGiI5ATD/kZKGfveAfbViBgNiYg9YHc1RZEJpARxAn0ugw uklgGGsCLeCpnQRvQDbFtbb+6QpDkmBcgGxNL0D7hA/DtsEettujQ2FEG7zTe7TD/NbVl7poWvy kDLRUw+uemBQr2lnHuR8XaKH2H2E0HxivxZ8NzOGJYMpIPmuhmmc3LhA86qBtz2hZ+UTbp63xOK QA1FEOk89gVWthf89OzZ6 X-Received: by 2002:a17:902:f607:b0:2cc:ed57:c7c with SMTP id d9443c01a7336-2ce9f02700cmr212712345ad.32.1784192582522; Thu, 16 Jul 2026 02:03:02 -0700 (PDT) X-Received: by 2002:a17:902:f607:b0:2cc:ed57:c7c with SMTP id d9443c01a7336-2ce9f02700cmr212711795ad.32.1784192582033; Thu, 16 Jul 2026 02:03:02 -0700 (PDT) From: Ze Huang Date: Thu, 16 Jul 2026 17:01:54 +0800 Subject: [PATCH v2 2/8] drm/aspeed: replace struct drm_simple_display_pipe with regular atomic helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260716-drm-simple-kms-removal-v2-2-1133a8fc3785@oss.qualcomm.com> References: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> In-Reply-To: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> To: Alexey Brodkin , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Stanley , Andrew Jeffery , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Linus Walleij , Hans de Goede , Alex Lanzano , Oleksandr Andrushchenko Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, Ze Huang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784192559; l=12008; i=ze.huang@oss.qualcomm.com; s=20260716; h=from:subject:message-id; bh=rgxLNMtjqM2teYTKXy4V5myTjAOMrw9ADBn88PQUgl0=; b=ao1ZOxz4FyLpOnjIgILtb38iIdAixsALUtxQDG2VQUbz8T8Og34pyHoZwIWje5N1T6AYfjR5S qn1GtR7rJPWCqaq+yohY4PFirxldOeXdvRZrYuYSVbXv6647oU82tUe X-Developer-Key: i=ze.huang@oss.qualcomm.com; a=ed25519; pk=8uGhlZHInA8NXq7G6u/g59qEcwXwuMRI7nBSnT/ijtY= X-Proofpoint-ORIG-GUID: ynu3m2S6O_UccHQacPgfIhO2doLBUBJP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfX+8D5U62wj4cn JYDeSD6ES7XWRw5YsIJQZ/SeMOFeiawGDChevT6p6zjdxUSPkNXynuqv4urV0wQMYrkTwJG+/xQ oIEMH+Xg1PwA2L4Fsf4jrkDKoqnoJRNW6s8tijtt/rp3mxEOPrra0Ajn90EPbh/cZn5BCkzqZlN 9aabHJcLFsRlEGEzahJzhz5t+6qVApLx/GRWPjZ+JbIw/FdgEY6o+RDVba5oPbxfwnleVQS/HPh w4N0I+8eEvjciTbOwmHe5Q7lcU1OyQ5XnaC5aTVkmK/y3iZFWvr03vJNyZ7B5fgCAHmWRdkGNdM OL3eOn/t7haZWdmx1k8fCotHDI46Vj/kiXg4GdPjcrf3ggAYwUKTBOkrO8bPU/mAKOhR9IauHwi 3MSBpjRtM91kbYw5SfPqmVwFKDuBQeLIa6UCO8D6dTLZa25iy6eSfHLKc0XjhenbFozU8pAN9wo lycv5LtQJb4jfqmGEdA== X-Authority-Analysis: v=2.4 cv=f8R4wuyM c=1 sm=1 tr=0 ts=6a589e47 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=DqWk4Bt2HhJbFETiZXkA:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-GUID: ynu3m2S6O_UccHQacPgfIhO2doLBUBJP X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfX6F255k+G7/mr VojQAnpRwOf4XCM6WXYmFJQRfZ+sDadcbuJ0kkwdy4lM3gWWvO4fMMrM5bQ7N0kKwJ/rKlSyFDF nkRPT7XOFN3MVF6SYY5IuMWR3uq/XMA= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_03,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 bulkscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160091 X-purgate-ID: tlsNG-4011c0/1784192585-4B8D5CFC-47AC3285/0/0 X-purgate-type: clean X-purgate-size: 12010 X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784192627687158500 Replace simple display pipe with explicit plane, CRTC and encoder objects. Move callbacks to plane and CRTC helpers, with vblank handling through drm_crtc_funcs. Move page-flip event handling out of the plane update path and into the CRTC atomic flush path. Signed-off-by: Ze Huang --- drivers/gpu/drm/aspeed/aspeed_gfx.h | 11 +- drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 187 ++++++++++++++++++++++-----= ---- drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 3 +- 3 files changed, 145 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/a= speed_gfx.h index 4e6a442c3886..61588f4273a0 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h @@ -2,7 +2,6 @@ /* Copyright 2018 IBM Corporation */ =20 #include -#include =20 struct aspeed_gfx { struct drm_device drm; @@ -17,10 +16,16 @@ struct aspeed_gfx { u32 throd_val; u32 scan_line_max; =20 - struct drm_simple_display_pipe pipe; + struct drm_plane plane; + struct drm_crtc crtc; + struct drm_encoder encoder; struct drm_connector connector; }; -#define to_aspeed_gfx(x) container_of(x, struct aspeed_gfx, drm) + +static struct aspeed_gfx *to_aspeed_gfx(struct drm_device *drm) +{ + return container_of(drm, struct aspeed_gfx, drm); +} =20 int aspeed_gfx_create_pipe(struct drm_device *drm); int aspeed_gfx_create_output(struct drm_device *drm); diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c b/drivers/gpu/drm/asp= eed/aspeed_gfx_crtc.c index 7877a57b8e26..5946af36cc69 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c @@ -5,6 +5,8 @@ #include #include =20 +#include +#include #include #include #include @@ -12,22 +14,15 @@ #include #include #include -#include #include =20 #include "aspeed_gfx.h" =20 -static struct aspeed_gfx * -drm_pipe_to_aspeed_gfx(struct drm_simple_display_pipe *pipe) -{ - return container_of(pipe, struct aspeed_gfx, pipe); -} - static int aspeed_gfx_set_pixel_fmt(struct aspeed_gfx *priv, u32 *bpp) { - struct drm_crtc *crtc =3D &priv->pipe.crtc; + struct drm_crtc *crtc =3D &priv->crtc; struct drm_device *drm =3D crtc->dev; - const u32 format =3D crtc->primary->state->fb->format->format; + const u32 format =3D priv->plane.state->fb->format->format; u32 ctrl1; =20 ctrl1 =3D readl(priv->base + CRT_CTRL1); @@ -79,7 +74,7 @@ static void aspeed_gfx_disable_controller(struct aspeed_g= fx *priv) =20 static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv) { - struct drm_display_mode *m =3D &priv->pipe.crtc.state->adjusted_mode; + struct drm_display_mode *m =3D &priv->crtc.state->adjusted_mode; u32 ctrl1, d_offset, t_count, bpp; int err; =20 @@ -139,48 +134,33 @@ static void aspeed_gfx_crtc_mode_set_nofb(struct aspe= ed_gfx *priv) writel(priv->throd_val, priv->base + CRT_THROD); } =20 -static void aspeed_gfx_pipe_enable(struct drm_simple_display_pipe *pipe, - struct drm_crtc_state *crtc_state, - struct drm_plane_state *plane_state) +static void aspeed_gfx_crtc_helper_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); - struct drm_crtc *crtc =3D &pipe->crtc; + struct aspeed_gfx *priv =3D to_aspeed_gfx(crtc->dev); =20 aspeed_gfx_crtc_mode_set_nofb(priv); aspeed_gfx_enable_controller(priv); drm_crtc_vblank_on(crtc); } =20 -static void aspeed_gfx_pipe_disable(struct drm_simple_display_pipe *pipe) +static void aspeed_gfx_crtc_helper_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); - struct drm_crtc *crtc =3D &pipe->crtc; + struct aspeed_gfx *priv =3D to_aspeed_gfx(crtc->dev); =20 drm_crtc_vblank_off(crtc); aspeed_gfx_disable_controller(priv); } =20 -static void aspeed_gfx_pipe_update(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *plane_state) +static void aspeed_gfx_plane_helper_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *commit) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); - struct drm_crtc *crtc =3D &pipe->crtc; - struct drm_framebuffer *fb =3D pipe->plane.state->fb; - struct drm_pending_vblank_event *event; + struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(commit, plane); + struct aspeed_gfx *priv =3D to_aspeed_gfx(plane->dev); + struct drm_framebuffer *fb =3D new_plane_state->fb; struct drm_gem_dma_object *gem; =20 - spin_lock_irq(&crtc->dev->event_lock); - event =3D crtc->state->event; - if (event) { - crtc->state->event =3D NULL; - - if (drm_crtc_vblank_get(crtc) =3D=3D 0) - drm_crtc_arm_vblank_event(crtc, event); - else - drm_crtc_send_vblank_event(crtc, event); - } - spin_unlock_irq(&crtc->dev->event_lock); - if (!fb) return; =20 @@ -190,9 +170,9 @@ static void aspeed_gfx_pipe_update(struct drm_simple_di= splay_pipe *pipe, writel(gem->dma_addr, priv->base + CRT_ADDR); } =20 -static int aspeed_gfx_enable_vblank(struct drm_simple_display_pipe *pipe) +static int aspeed_gfx_crtc_enable_vblank(struct drm_crtc *crtc) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); + struct aspeed_gfx *priv =3D to_aspeed_gfx(crtc->dev); u32 reg =3D readl(priv->base + CRT_CTRL1); =20 /* Clear pending VBLANK IRQ */ @@ -204,9 +184,9 @@ static int aspeed_gfx_enable_vblank(struct drm_simple_d= isplay_pipe *pipe) return 0; } =20 -static void aspeed_gfx_disable_vblank(struct drm_simple_display_pipe *pipe) +static void aspeed_gfx_crtc_disable_vblank(struct drm_crtc *crtc) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); + struct aspeed_gfx *priv =3D to_aspeed_gfx(crtc->dev); u32 reg =3D readl(priv->base + CRT_CTRL1); =20 reg &=3D ~CRT_CTRL_VERTICAL_INTR_EN; @@ -216,12 +196,91 @@ static void aspeed_gfx_disable_vblank(struct drm_simp= le_display_pipe *pipe) writel(reg | CRT_CTRL_VERTICAL_INTR_STS, priv->base + CRT_CTRL1); } =20 -static const struct drm_simple_display_pipe_funcs aspeed_gfx_funcs =3D { - .enable =3D aspeed_gfx_pipe_enable, - .disable =3D aspeed_gfx_pipe_disable, - .update =3D aspeed_gfx_pipe_update, - .enable_vblank =3D aspeed_gfx_enable_vblank, - .disable_vblank =3D aspeed_gfx_disable_vblank, +static int aspeed_gfx_plane_helper_atomic_check(struct drm_plane *plane, + struct drm_atomic_commit *commit) +{ + struct drm_plane_state *plane_state =3D drm_atomic_get_new_plane_state(co= mmit, plane); + struct drm_crtc *crtc =3D plane_state->crtc; + struct drm_crtc_state *crtc_state =3D NULL; + + if (crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(commit, crtc); + + return drm_atomic_helper_check_plane_state(plane_state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); +} + +static const struct drm_plane_helper_funcs aspeed_gfx_plane_helper_funcs = =3D { + .prepare_fb =3D drm_gem_plane_helper_prepare_fb, + .atomic_check =3D aspeed_gfx_plane_helper_atomic_check, + .atomic_update =3D aspeed_gfx_plane_helper_atomic_update, +}; + +static const struct drm_plane_funcs aspeed_gfx_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + .destroy =3D drm_plane_cleanup, + .reset =3D drm_atomic_helper_plane_reset, + .atomic_duplicate_state =3D drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_plane_destroy_state, +}; + +static int aspeed_gfx_crtc_helper_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) +{ + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(commi= t, crtc); + int ret; + + if (crtc_state->enable) { + ret =3D drm_atomic_helper_check_crtc_primary_plane(crtc_state); + if (ret) + return ret; + } + + return drm_atomic_add_affected_planes(commit, crtc); +} + +static void aspeed_gfx_crtc_helper_atomic_flush(struct drm_crtc *crtc, + struct drm_atomic_commit *commit) +{ + struct drm_crtc_state *new_crtc_state =3D drm_atomic_get_new_crtc_state(c= ommit, crtc); + struct drm_pending_vblank_event *event =3D new_crtc_state->event; + + if (!event) + return; + + new_crtc_state->event =3D NULL; + + spin_lock_irq(&crtc->dev->event_lock); + if (drm_crtc_vblank_get(crtc) =3D=3D 0) + drm_crtc_arm_vblank_event(crtc, event); + else + drm_crtc_send_vblank_event(crtc, event); + spin_unlock_irq(&crtc->dev->event_lock); +} + +static const struct drm_crtc_helper_funcs aspeed_gfx_crtc_helper_funcs =3D= { + .atomic_check =3D aspeed_gfx_crtc_helper_atomic_check, + .atomic_enable =3D aspeed_gfx_crtc_helper_atomic_enable, + .atomic_disable =3D aspeed_gfx_crtc_helper_atomic_disable, + .atomic_flush =3D aspeed_gfx_crtc_helper_atomic_flush, +}; + +static const struct drm_crtc_funcs aspeed_gfx_crtc_funcs =3D { + .reset =3D drm_atomic_helper_crtc_reset, + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, + .enable_vblank =3D aspeed_gfx_crtc_enable_vblank, + .disable_vblank =3D aspeed_gfx_crtc_disable_vblank, +}; + +static const struct drm_encoder_funcs aspeed_gfx_encoder_funcs =3D { + .destroy =3D drm_encoder_cleanup, }; =20 static const uint32_t aspeed_gfx_formats[] =3D { @@ -232,10 +291,36 @@ static const uint32_t aspeed_gfx_formats[] =3D { int aspeed_gfx_create_pipe(struct drm_device *drm) { struct aspeed_gfx *priv =3D to_aspeed_gfx(drm); + struct drm_plane *plane =3D &priv->plane; + struct drm_crtc *crtc =3D &priv->crtc; + struct drm_encoder *encoder =3D &priv->encoder; + int ret; + + ret =3D drm_universal_plane_init(drm, plane, 0, + &aspeed_gfx_plane_funcs, + aspeed_gfx_formats, + ARRAY_SIZE(aspeed_gfx_formats), + NULL, + DRM_PLANE_TYPE_PRIMARY, NULL); + if (ret) + return ret; + drm_plane_helper_add(plane, &aspeed_gfx_plane_helper_funcs); + + ret =3D drm_crtc_init_with_planes(drm, crtc, plane, NULL, + &aspeed_gfx_crtc_funcs, NULL); + if (ret) + return ret; + drm_crtc_helper_add(crtc, &aspeed_gfx_crtc_helper_funcs); + + ret =3D drm_encoder_init(drm, encoder, &aspeed_gfx_encoder_funcs, + DRM_MODE_ENCODER_NONE, NULL); + if (ret) + return ret; + encoder->possible_crtcs =3D drm_crtc_mask(crtc); + + ret =3D drm_connector_attach_encoder(&priv->connector, encoder); + if (ret) + return ret; =20 - return drm_simple_display_pipe_init(drm, &priv->pipe, &aspeed_gfx_funcs, - aspeed_gfx_formats, - ARRAY_SIZE(aspeed_gfx_formats), - NULL, - &priv->connector); + return 0; } diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c b/drivers/gpu/drm/aspe= ed/aspeed_gfx_drv.c index 46094cca2974..b2d805f0c16d 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include =20 @@ -130,7 +129,7 @@ static irqreturn_t aspeed_gfx_irq_handler(int irq, void= *data) reg =3D readl(priv->base + CRT_CTRL1); =20 if (reg & CRT_CTRL_VERTICAL_INTR_STS) { - drm_crtc_handle_vblank(&priv->pipe.crtc); + drm_crtc_handle_vblank(&priv->crtc); writel(reg, priv->base + priv->int_clr_reg); return IRQ_HANDLED; } --=20 2.43.0 From nobody Thu Jul 23 21:13:54 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1784192620; cv=none; d=zohomail.com; s=zohoarc; b=XgzGNAaY6H60b78uzv3V3PR3gHZr31qYxGQPz+ZfER/JcX7yINBckHiwOn5vHr1+aRVAVL7CEy5AeX6mOBv1yViX0V+khc9EBGeVF2lWPhUfmwKR8JKG5F/mL0O/zHYJNMZp0OfTGtwyH99TdSiYZkeRLwhXq6+vIXWQa8ZuUZw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1784192620; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3gs6ZFn51ViIywPhcgxd9Yb4ROtm55PINNXW4yAOhhE=; b=H5x/v8CVXnrIPcnbF/LIsgxXBrhc4mL1ryYnPTJJi0RFJVBlFc0l+s/d0MMKJ9lSYQXCOCduO7ulegAPHZf/j76x4nA4GGcF1amrkC+2hvnrjeU0kcgDp0IVrXW4Xxn0FAMh1yBa1L6M4X+5UN5kV7L72nRAEpUwqDxeWe1SYTA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1784192620254155.40577088331338; Thu, 16 Jul 2026 02:03:40 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.1363571.1615164 (Exim 4.92) (envelope-from ) id 1wkHzw-0002FF-Jf; Thu, 16 Jul 2026 09:03:16 +0000 Received: by outflank-mailman (output) from mailman id 1363571.1615164; Thu, 16 Jul 2026 09:03:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wkHzw-0002Eo-2i; Thu, 16 Jul 2026 09:03:16 +0000 Received: by outflank-mailman (input) for mailman id 1363571; Thu, 16 Jul 2026 09:03:14 +0000 Received: from mx.expurgate.net ([195.190.135.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wkHzu-0002CR-Fe for xen-devel@lists.xenproject.org; Thu, 16 Jul 2026 09:03:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wkHzt-005Ak4-SV for xen-devel@lists.xenproject.org; Thu, 16 Jul 2026 11:03:13 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a589e45-2eae-0a2a0a5409dd-0a2a4505b03c-40 for ; Thu, 16 Jul 2026 11:03:13 +0200 Received: from [205.220.168.131] (helo=mx0a-0031df01.pphosted.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.57.1) (envelope-from ) id 6a589e4f-4cb1-0a2a45050019-cddca8831ed0-3 for ; Thu, 16 Jul 2026 11:03:13 +0200 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 66G7DN4r2193181 for ; Thu, 16 Jul 2026 09:03:11 GMT Received: from mail-pl1-f197.google.com (mail-pl1-f197.google.com [209.85.214.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fetcf0frc-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 16 Jul 2026 09:03:10 +0000 (GMT) Received: by mail-pl1-f197.google.com with SMTP id d9443c01a7336-2cc5faecf01so123272985ad.1 for ; Thu, 16 Jul 2026 02:03:10 -0700 (PDT) Received: from le-cd01-lnx.qualcomm.com ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf106b271asm16592555ad.64.2026.07.16.02.03.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jul 2026 02:03:08 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=qcppdkim1 header.d=qualcomm.com header.i="@qualcomm.com" header.h="Cc:Content-Transfer-Encoding:Content-Type:Date:From:In-Reply-To:Message-Id:MIME-Version:References:Subject:To"; dkim=pass header.s=google header.d=oss.qualcomm.com header.i="@oss.qualcomm.com" header.h="Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 3gs6ZFn51ViIywPhcgxd9Yb4ROtm55PINNXW4yAOhhE=; b=PLzkANkoIcwLSt8u qxHbKYQBqEIGyO2zD8ScRdo116d1xg/kxNzHjH6wRUBPXjaSRWbwhIWprgtUuLPW KKXSZZjdsq6P20BmYmWkfRvjGicEbsDDRmbrScs3ts42gkrr6BG7rkMDzXfkQk7R XCM6gQv9sUWksFHIu4edURnNQqBEGuvw+hA2qNFkuswKLyLyNE/9rnRq6YmABhoO d/UeUHTGoFT6tFDGmMt/J71Jn/g9BodysDeOv4b751VtWPp0lgwJ83kqMdE538O8 rm+50X8hZFJXBYVKeXh2Iqpxeea25a7lbs8Dt0DH1gJBof+Wx3TcwLyDz6fJjHiX xZ3ULw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1784192590; x=1784797390; darn=lists.xenproject.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=3gs6ZFn51ViIywPhcgxd9Yb4ROtm55PINNXW4yAOhhE=; b=DGVsFK6TNWwpmxqWkycRK6R4K8LaMZeHb10d9DlbmSZuCcrQt8fWis7l+/LaWDoSvq +wk5u3kzYAkRSUezUQLErS7cHrJPbz02btrwYuhlLRQYim7YG050hueZ0gkxcvnd18/M WB8qHNwHkCeswAe1EasWLhoN4BEsBD8f5XqWRgmvBi4KgWYfaCbpyfg+P2P4cH4YTpWs hwF4D0VlAalvtPCjQieC1DcMuzLpjwswURLLWyP1Vn6GdsMuMdrFppGwQ+j05TmIGHmr yoha/QxsZB3kIVs6hsswnflOYddPK+qyCLHxuxAxQ8jFuQo8RVlcHuLK10dtMChb8mqR bEug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1784192590; x=1784797390; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=3gs6ZFn51ViIywPhcgxd9Yb4ROtm55PINNXW4yAOhhE=; b=o/ubf4yFvFLFSQiV7SxsXXgFRFNnn68r2wzkhV8txganb5s+Kv39Y/Qp7MZorgwCAZ klQ8P3vWIAh3lom9d2VPaf210+ldz3v+rhWHH3k3NXV3HmHgx7qKgQ0qCS1fO8rYrCmB gr+U2nxavFpmyN8pc2TCesuJqt8f7VrZJY8ybo0H5j3MWE9AU4MEv1SjZQ+tZKcvOEP6 U0ODtRTh+j++aMNWfN/N2DCEoLaG94rFeN//DtR8UX4GZwpo8+yaifRc1vK5GU7cF/re nnNhJD2VQo3hcC0+uB/gO9m5+zSQ/67aQ11MMKAp+fZnpUejgUqfHUwFJHb4TH/8bbAx 3HpQ== X-Forwarded-Encrypted: i=1; AHgh+Rq9IJ2NJosYi8Nni7kq9V+3SjZEl2LMrmUcs1gBLnMfhS6N+mc4ccjuGWHmKisaoCPOVQ0qbVPAGM4=@lists.xenproject.org X-Gm-Message-State: AOJu0YzlyNEijtYaSKPKOz4lH50xP5XbJXAqz9D6qGOXIW4LaZWlXsFo WI1usEMVORmDFDIRVEsLu/7A+FzMo4qjw37aLRVPWTAby0DMZNeEj200bhsAbbb24686gxXGy08 NvgrjIRuc0KpxQRLGc4b0qeFh4Q8NIIfUdmm2H0Gh8FtUfRRJxMgrrOzaIjsGBkyyijLRMIszJB E9zN/Y X-Gm-Gg: AfdE7ck+K7Pc5W9/Al1zx1m/43breUuU1sMNO9I/1yFbZ+8kTRz5VrWXsNAlohuPkme G/Z+0tVAc/EcKFH1cJnnOq7wSoWxGZk0dMlQpCSenqis9/PMg20pjrZR9onvRcPm57aGV0m95n9 Hf4PNeR1EqzzpC/jRrDJFTLPuv8ysc21JutUwfDdeG8S7IGOSWmziQehriBE9GAvH7nujLyM/GS zQVfTCz+KL2VQX3VyWuyFOqYKvhw6aC/zhn6ZItlLk6D2/oo6kZ6cUUAlUu6+HMrwoP01W9rnVQ 63YEi5JuSJW8M2M0gypzAH2Po1Floeb+SQAjfmgoRHUQCi4nuI0pGrj+rjegYja87I5bPPag88C Nwki+Xi70kxP1+KmsiBHa X-Received: by 2002:a17:903:458f:b0:2ca:304:f93e with SMTP id d9443c01a7336-2cee9b58fa9mr109883405ad.22.1784192589927; Thu, 16 Jul 2026 02:03:09 -0700 (PDT) X-Received: by 2002:a17:903:458f:b0:2ca:304:f93e with SMTP id d9443c01a7336-2cee9b58fa9mr109882915ad.22.1784192589269; Thu, 16 Jul 2026 02:03:09 -0700 (PDT) From: Ze Huang Date: Thu, 16 Jul 2026 17:01:55 +0800 Subject: [PATCH v2 3/8] drm/mcde: replace struct drm_simple_display_pipe with regular atomic helpers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260716-drm-simple-kms-removal-v2-3-1133a8fc3785@oss.qualcomm.com> References: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> In-Reply-To: <20260716-drm-simple-kms-removal-v2-0-1133a8fc3785@oss.qualcomm.com> To: Alexey Brodkin , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Stanley , Andrew Jeffery , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Linus Walleij , Hans de Goede , Alex Lanzano , Oleksandr Andrushchenko Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, Ze Huang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1784192560; l=15094; i=ze.huang@oss.qualcomm.com; s=20260716; h=from:subject:message-id; bh=68SyLROdh7gtSjTLnzbueeYHapUemcEJldTPDqGBdBg=; b=GZwBrZK7hIoCbv3x6DM9/eN8GGXvJVijZFHj5nkZmiajld9kb1tDcEAiNnFrtIIuriqYSY/32 F3xiVq3FpDRA9RMcdgRY89Bz0rhbKAJEmtJuYqvmpmgQ33WCA3AICwE X-Developer-Key: i=ze.huang@oss.qualcomm.com; a=ed25519; pk=8uGhlZHInA8NXq7G6u/g59qEcwXwuMRI7nBSnT/ijtY= X-Proofpoint-ORIG-GUID: RK8m6tIZ2J_xytIXCNVnnO8l4jBduiPK X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfX25LqL9ZH+6ri vuWeU+XzTaneCSKmkFeRm2amv1Goh0wu4pwlJtnjlapkIn2iMRgj3x6ZK7qDEisc7f7cuRRsjLK 0ZEBug0pjMUpdmLHlGiVIs2Yy5aUhIe12ddzElNjCNJ1UXP9Yx1eaLDXujmfBoQ2+zTCWYIHW1+ 0tlgps4QSJcrjLqEVxWj5+FpjPd0RXddIKgeRg6XYB4oELkaNlxrafHretJr6WBcwwq5mObtjj8 yCOehaY8T0JMv7lIYLa5VZC3kpm8r5N/gvADDFraaUXo3ASCBB/wCdfwK/9HahGGlCZt2495/vM 12SSP84Z4lWNnx67TqO3zIiYqJw12eRR7OhnGz4r7CbW0nitsIKf1Q8ii5j15VH0qEUvHfEiG6f Pz/y6wKujKwDViCx480uw4vUpwSgYdsusPhenOWEGUNiyYn7VGTDNnVw3UNtoLDsM74syWKsmjl ulLKxJOsFBEVx90zZFg== X-Authority-Analysis: v=2.4 cv=f8R4wuyM c=1 sm=1 tr=0 ts=6a589e4e cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=7TuhGXn_jpZpJwHYtc4A:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-GUID: RK8m6tIZ2J_xytIXCNVnnO8l4jBduiPK X-Proofpoint-Spam-Info: AW1haW4tMjYwNzE2MDA5MSBTYWx0ZWRfX5/uSnMnBB1n0 oY/TAkWm8sDt39kz5SM36+X9g7E5rDL+griduBse+uP1XCbOdeQOqFwcebY+JEunjbRyogmCFwS nF9rEDfUbLq1OGq6szbTb3FeEWSKMz8= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-16_03,2026-07-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 bulkscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607160091 X-purgate-ID: tlsNG-c201ff/1784192593-F5EA92A1-F02F7ECD/0/0 X-purgate-type: clean X-purgate-size: 15096 X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1784192621625158500 Convert MCDE to explicit plane, CRTC and encoder objects. Handle pending page-flip events from the CRTC atomic flush path using the commit-local CRTC state, and avoid manual connector/encoder attachment before the connector has been created by the bridge path. Signed-off-by: Ze Huang --- drivers/gpu/drm/mcde/mcde_display.c | 251 +++++++++++++++++++++++---------= ---- drivers/gpu/drm/mcde/mcde_drm.h | 8 +- drivers/gpu/drm/mcde/mcde_drv.c | 8 +- 3 files changed, 173 insertions(+), 94 deletions(-) diff --git a/drivers/gpu/drm/mcde/mcde_display.c b/drivers/gpu/drm/mcde/mcd= e_display.c index 257a6e84dd58..86edf94c5237 100644 --- a/drivers/gpu/drm/mcde/mcde_display.c +++ b/drivers/gpu/drm/mcde/mcde_display.c @@ -10,6 +10,7 @@ #include #include =20 +#include #include #include #include @@ -18,7 +19,6 @@ #include #include #include -#include #include #include #include