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This removes arcpgu's dependency on deprecated simple-KMS display pipe interface. Signed-off-by: Ze Huang --- drivers/gpu/drm/tiny/arcpgu.c | 165 +++++++++++++++++++++++++++++++++-----= ---- 1 file changed, 131 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/tiny/arcpgu.c b/drivers/gpu/drm/tiny/arcpgu.c index c93d61ac0bb7..375cdb79e4e8 100644 --- a/drivers/gpu/drm/tiny/arcpgu.c +++ b/drivers/gpu/drm/tiny/arcpgu.c @@ -17,12 +17,12 @@ #include #include #include +#include #include #include #include #include #include -#include #include #include #include @@ -52,14 +52,14 @@ struct arcpgu_drm_private { struct drm_device drm; void __iomem *regs; struct clk *clk; - struct drm_simple_display_pipe pipe; + struct drm_plane plane; + struct drm_crtc crtc; + struct drm_encoder encoder; struct drm_connector sim_conn; }; =20 #define dev_to_arcpgu(x) container_of(x, struct arcpgu_drm_private, drm) =20 -#define pipe_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, = pipe) - static inline void arc_pgu_write(struct arcpgu_drm_private *arcpgu, unsigned int reg, u32 value) { @@ -117,7 +117,7 @@ static const u32 arc_pgu_supported_formats[] =3D { =20 static void arc_pgu_set_pxl_fmt(struct arcpgu_drm_private *arcpgu) { - const struct drm_framebuffer *fb =3D arcpgu->pipe.plane.state->fb; + const struct drm_framebuffer *fb =3D arcpgu->plane.state->fb; uint32_t pixel_format =3D fb->format->format; u32 format =3D DRM_FORMAT_INVALID; int i; @@ -139,10 +139,10 @@ static void arc_pgu_set_pxl_fmt(struct arcpgu_drm_pri= vate *arcpgu) arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, reg_ctrl); } =20 -static enum drm_mode_status arc_pgu_mode_valid(struct drm_simple_display_p= ipe *pipe, - const struct drm_display_mode *mode) +static enum drm_mode_status arcpgu_crtc_helper_mode_valid(struct drm_crtc = *crtc, + const struct drm_display_mode *mode) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); long rate, clk_rate =3D mode->clock * 1000; long diff =3D clk_rate / 200; /* +-0.5% allowed by HDMI spec */ =20 @@ -155,7 +155,7 @@ static enum drm_mode_status arc_pgu_mode_valid(struct d= rm_simple_display_pipe *p =20 static void arc_pgu_mode_set(struct arcpgu_drm_private *arcpgu) { - struct drm_display_mode *m =3D &arcpgu->pipe.crtc.state->adjusted_mode; + struct drm_display_mode *m =3D &arcpgu->crtc.state->adjusted_mode; u32 val; =20 arc_pgu_write(arcpgu, ARCPGU_REG_FMT, @@ -194,11 +194,10 @@ static void arc_pgu_mode_set(struct arcpgu_drm_privat= e *arcpgu) clk_set_rate(arcpgu->clk, m->crtc_clock * 1000); } =20 -static void arc_pgu_enable(struct drm_simple_display_pipe *pipe, - struct drm_crtc_state *crtc_state, - struct drm_plane_state *plane_state) +static void arcpgu_crtc_helper_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); =20 arc_pgu_mode_set(arcpgu); =20 @@ -208,9 +207,10 @@ static void arc_pgu_enable(struct drm_simple_display_p= ipe *pipe, ARCPGU_CTRL_ENABLE_MASK); } =20 -static void arc_pgu_disable(struct drm_simple_display_pipe *pipe) +static void arcpgu_crtc_helper_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); =20 clk_disable_unprepare(arcpgu->clk); arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, @@ -218,35 +218,106 @@ static void arc_pgu_disable(struct drm_simple_displa= y_pipe *pipe) ~ARCPGU_CTRL_ENABLE_MASK); } =20 -static void arc_pgu_update(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *state) +static void arcpgu_plane_helper_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *state) { struct arcpgu_drm_private *arcpgu; struct drm_gem_dma_object *gem; =20 - if (!pipe->plane.state->fb) + if (!plane->state->fb) return; =20 - arcpgu =3D pipe_to_arcpgu_priv(pipe); - gem =3D drm_fb_dma_get_gem_obj(pipe->plane.state->fb, 0); + arcpgu =3D dev_to_arcpgu(plane->dev); + gem =3D drm_fb_dma_get_gem_obj(plane->state->fb, 0); arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->dma_addr); } =20 -static const struct drm_simple_display_pipe_funcs arc_pgu_pipe_funcs =3D { - .update =3D arc_pgu_update, - .mode_valid =3D arc_pgu_mode_valid, - .enable =3D arc_pgu_enable, - .disable =3D arc_pgu_disable, -}; - static const struct drm_mode_config_funcs arcpgu_drm_modecfg_funcs =3D { - .fb_create =3D drm_gem_fb_create, + .fb_create =3D drm_gem_fb_create, .atomic_check =3D drm_atomic_helper_check, .atomic_commit =3D drm_atomic_helper_commit, }; =20 DEFINE_DRM_GEM_DMA_FOPS(arcpgu_drm_ops); =20 +static int arcpgu_plane_helper_atomic_check(struct drm_plane *plane, + struct drm_atomic_commit *state) +{ + struct drm_plane_state *plane_state =3D drm_atomic_get_new_plane_state(st= ate, plane); + struct drm_crtc *crtc =3D plane_state->crtc; + struct drm_crtc_state *crtc_state =3D NULL; + int ret; + + if (crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(state, crtc); + + ret =3D drm_atomic_helper_check_plane_state(plane_state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); + return ret; +} + +static const struct drm_plane_helper_funcs arcpgu_plane_helper_funcs =3D { + .prepare_fb =3D drm_gem_plane_helper_prepare_fb, + .atomic_check =3D arcpgu_plane_helper_atomic_check, + .atomic_update =3D arcpgu_plane_helper_atomic_update, +}; + +static bool arcpgu_plane_format_mod_supported(struct drm_plane *plane, + u32 format, + u64 modifier) +{ + return modifier =3D=3D DRM_FORMAT_MOD_LINEAR; +} + +static const struct drm_plane_funcs arcpgu_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + .destroy =3D drm_plane_cleanup, + .reset =3D drm_atomic_helper_plane_reset, + .atomic_duplicate_state =3D drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_plane_destroy_state, + .format_mod_supported =3D arcpgu_plane_format_mod_supported, +}; + +static int arcpgu_crtc_helper_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_commit *state) +{ + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(state= , crtc); + int ret; + + if (!crtc_state->enable) + goto out; + + ret =3D drm_atomic_helper_check_crtc_primary_plane(crtc_state); + if (ret) + return ret; + +out: + return drm_atomic_add_affected_planes(state, crtc); +} + +static const struct drm_crtc_helper_funcs arcpgu_crtc_helper_funcs =3D { + .mode_valid =3D arcpgu_crtc_helper_mode_valid, + .atomic_check =3D arcpgu_crtc_helper_atomic_check, + .atomic_enable =3D arcpgu_crtc_helper_atomic_enable, + .atomic_disable =3D arcpgu_crtc_helper_atomic_disable, +}; + +static const struct drm_crtc_funcs arcpgu_crtc_funcs =3D { + .reset =3D drm_atomic_helper_crtc_reset, + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, +}; + +static const struct drm_encoder_funcs arcpgu_encoder_funcs =3D { + .destroy =3D drm_encoder_cleanup, +}; + static int arcpgu_load(struct arcpgu_drm_private *arcpgu) { struct platform_device *pdev =3D to_platform_device(arcpgu->drm.dev); @@ -254,6 +325,9 @@ static int arcpgu_load(struct arcpgu_drm_private *arcpg= u) struct device_node *endpoint_node =3D NULL; struct drm_connector *connector =3D NULL; struct drm_device *drm =3D &arcpgu->drm; + struct drm_plane *plane; + struct drm_encoder *encoder; + struct drm_crtc *crtc; int ret; =20 arcpgu->clk =3D devm_clk_get(drm->dev, "pxlclk"); @@ -301,12 +375,35 @@ static int arcpgu_load(struct arcpgu_drm_private *arc= pgu) return ret; } =20 - ret =3D drm_simple_display_pipe_init(drm, &arcpgu->pipe, &arc_pgu_pipe_fu= ncs, - arc_pgu_supported_formats, - ARRAY_SIZE(arc_pgu_supported_formats), - NULL, connector); + plane =3D &arcpgu->plane; + ret =3D drm_universal_plane_init(drm, plane, 0, + &arcpgu_plane_funcs, + arc_pgu_supported_formats, + ARRAY_SIZE(arc_pgu_supported_formats), + NULL, + DRM_PLANE_TYPE_PRIMARY, NULL); if (ret) return ret; + drm_plane_helper_add(plane, &arcpgu_plane_helper_funcs); + + crtc =3D &arcpgu->crtc; + ret =3D drm_crtc_init_with_planes(drm, crtc, plane, NULL, + &arcpgu_crtc_funcs, NULL); + if (ret) + return ret; + drm_crtc_helper_add(crtc, &arcpgu_crtc_helper_funcs); + + encoder =3D &arcpgu->encoder; + ret =3D drm_encoder_init(drm, encoder, &arcpgu_encoder_funcs, DRM_MODE_EN= CODER_NONE, NULL); + if (ret) + return ret; + encoder->possible_crtcs =3D drm_crtc_mask(crtc); + + if (connector) { + ret =3D drm_connector_attach_encoder(connector, encoder); + if (ret) + return ret; + } =20 if (encoder_node) { /* Locate drm bridge from the hdmi encoder DT node */ @@ -315,7 +412,7 @@ static int arcpgu_load(struct arcpgu_drm_private *arcpg= u) if (!bridge) return -EPROBE_DEFER; =20 - ret =3D drm_simple_display_pipe_attach_bridge(&arcpgu->pipe, bridge); + ret =3D drm_bridge_attach(encoder, bridge, NULL, 0); if (ret) return ret; } @@ -342,7 +439,7 @@ static int arcpgu_show_pxlclock(struct seq_file *m, voi= d *arg) struct drm_device *drm =3D node->minor->dev; struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(drm); unsigned long clkrate =3D clk_get_rate(arcpgu->clk); - unsigned long mode_clock =3D arcpgu->pipe.crtc.mode.crtc_clock * 1000; + unsigned long mode_clock =3D arcpgu->crtc.mode.crtc_clock * 1000; =20 seq_printf(m, "hw : %lu\n", clkrate); seq_printf(m, "mode: %lu\n", mode_clock); --=20 2.55.0