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This removes arcpgu's dependency on deprecated simple-KMS display pipe interface. Signed-off-by: Ze Huang --- drivers/gpu/drm/tiny/arcpgu.c | 165 +++++++++++++++++++++++++++++++++-----= ---- 1 file changed, 131 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/tiny/arcpgu.c b/drivers/gpu/drm/tiny/arcpgu.c index c93d61ac0bb7..375cdb79e4e8 100644 --- a/drivers/gpu/drm/tiny/arcpgu.c +++ b/drivers/gpu/drm/tiny/arcpgu.c @@ -17,12 +17,12 @@ #include #include #include +#include #include #include #include #include #include -#include #include #include #include @@ -52,14 +52,14 @@ struct arcpgu_drm_private { struct drm_device drm; void __iomem *regs; struct clk *clk; - struct drm_simple_display_pipe pipe; + struct drm_plane plane; + struct drm_crtc crtc; + struct drm_encoder encoder; struct drm_connector sim_conn; }; =20 #define dev_to_arcpgu(x) container_of(x, struct arcpgu_drm_private, drm) =20 -#define pipe_to_arcpgu_priv(x) container_of(x, struct arcpgu_drm_private, = pipe) - static inline void arc_pgu_write(struct arcpgu_drm_private *arcpgu, unsigned int reg, u32 value) { @@ -117,7 +117,7 @@ static const u32 arc_pgu_supported_formats[] =3D { =20 static void arc_pgu_set_pxl_fmt(struct arcpgu_drm_private *arcpgu) { - const struct drm_framebuffer *fb =3D arcpgu->pipe.plane.state->fb; + const struct drm_framebuffer *fb =3D arcpgu->plane.state->fb; uint32_t pixel_format =3D fb->format->format; u32 format =3D DRM_FORMAT_INVALID; int i; @@ -139,10 +139,10 @@ static void arc_pgu_set_pxl_fmt(struct arcpgu_drm_pri= vate *arcpgu) arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, reg_ctrl); } =20 -static enum drm_mode_status arc_pgu_mode_valid(struct drm_simple_display_p= ipe *pipe, - const struct drm_display_mode *mode) +static enum drm_mode_status arcpgu_crtc_helper_mode_valid(struct drm_crtc = *crtc, + const struct drm_display_mode *mode) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); long rate, clk_rate =3D mode->clock * 1000; long diff =3D clk_rate / 200; /* +-0.5% allowed by HDMI spec */ =20 @@ -155,7 +155,7 @@ static enum drm_mode_status arc_pgu_mode_valid(struct d= rm_simple_display_pipe *p =20 static void arc_pgu_mode_set(struct arcpgu_drm_private *arcpgu) { - struct drm_display_mode *m =3D &arcpgu->pipe.crtc.state->adjusted_mode; + struct drm_display_mode *m =3D &arcpgu->crtc.state->adjusted_mode; u32 val; =20 arc_pgu_write(arcpgu, ARCPGU_REG_FMT, @@ -194,11 +194,10 @@ static void arc_pgu_mode_set(struct arcpgu_drm_privat= e *arcpgu) clk_set_rate(arcpgu->clk, m->crtc_clock * 1000); } =20 -static void arc_pgu_enable(struct drm_simple_display_pipe *pipe, - struct drm_crtc_state *crtc_state, - struct drm_plane_state *plane_state) +static void arcpgu_crtc_helper_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); =20 arc_pgu_mode_set(arcpgu); =20 @@ -208,9 +207,10 @@ static void arc_pgu_enable(struct drm_simple_display_p= ipe *pipe, ARCPGU_CTRL_ENABLE_MASK); } =20 -static void arc_pgu_disable(struct drm_simple_display_pipe *pipe) +static void arcpgu_crtc_helper_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { - struct arcpgu_drm_private *arcpgu =3D pipe_to_arcpgu_priv(pipe); + struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(crtc->dev); =20 clk_disable_unprepare(arcpgu->clk); arc_pgu_write(arcpgu, ARCPGU_REG_CTRL, @@ -218,35 +218,106 @@ static void arc_pgu_disable(struct drm_simple_displa= y_pipe *pipe) ~ARCPGU_CTRL_ENABLE_MASK); } =20 -static void arc_pgu_update(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *state) +static void arcpgu_plane_helper_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *state) { struct arcpgu_drm_private *arcpgu; struct drm_gem_dma_object *gem; =20 - if (!pipe->plane.state->fb) + if (!plane->state->fb) return; =20 - arcpgu =3D pipe_to_arcpgu_priv(pipe); - gem =3D drm_fb_dma_get_gem_obj(pipe->plane.state->fb, 0); + arcpgu =3D dev_to_arcpgu(plane->dev); + gem =3D drm_fb_dma_get_gem_obj(plane->state->fb, 0); arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->dma_addr); } =20 -static const struct drm_simple_display_pipe_funcs arc_pgu_pipe_funcs =3D { - .update =3D arc_pgu_update, - .mode_valid =3D arc_pgu_mode_valid, - .enable =3D arc_pgu_enable, - .disable =3D arc_pgu_disable, -}; - static const struct drm_mode_config_funcs arcpgu_drm_modecfg_funcs =3D { - .fb_create =3D drm_gem_fb_create, + .fb_create =3D drm_gem_fb_create, .atomic_check =3D drm_atomic_helper_check, .atomic_commit =3D drm_atomic_helper_commit, }; =20 DEFINE_DRM_GEM_DMA_FOPS(arcpgu_drm_ops); =20 +static int arcpgu_plane_helper_atomic_check(struct drm_plane *plane, + struct drm_atomic_commit *state) +{ + struct drm_plane_state *plane_state =3D drm_atomic_get_new_plane_state(st= ate, plane); + struct drm_crtc *crtc =3D plane_state->crtc; + struct drm_crtc_state *crtc_state =3D NULL; + int ret; + + if (crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(state, crtc); + + ret =3D drm_atomic_helper_check_plane_state(plane_state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); + return ret; +} + +static const struct drm_plane_helper_funcs arcpgu_plane_helper_funcs =3D { + .prepare_fb =3D drm_gem_plane_helper_prepare_fb, + .atomic_check =3D arcpgu_plane_helper_atomic_check, + .atomic_update =3D arcpgu_plane_helper_atomic_update, +}; + +static bool arcpgu_plane_format_mod_supported(struct drm_plane *plane, + u32 format, + u64 modifier) +{ + return modifier =3D=3D DRM_FORMAT_MOD_LINEAR; +} + +static const struct drm_plane_funcs arcpgu_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + .destroy =3D drm_plane_cleanup, + .reset =3D drm_atomic_helper_plane_reset, + .atomic_duplicate_state =3D drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_plane_destroy_state, + .format_mod_supported =3D arcpgu_plane_format_mod_supported, +}; + +static int arcpgu_crtc_helper_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_commit *state) +{ + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(state= , crtc); + int ret; + + if (!crtc_state->enable) + goto out; + + ret =3D drm_atomic_helper_check_crtc_primary_plane(crtc_state); + if (ret) + return ret; + +out: + return drm_atomic_add_affected_planes(state, crtc); +} + +static const struct drm_crtc_helper_funcs arcpgu_crtc_helper_funcs =3D { + .mode_valid =3D arcpgu_crtc_helper_mode_valid, + .atomic_check =3D arcpgu_crtc_helper_atomic_check, + .atomic_enable =3D arcpgu_crtc_helper_atomic_enable, + .atomic_disable =3D arcpgu_crtc_helper_atomic_disable, +}; + +static const struct drm_crtc_funcs arcpgu_crtc_funcs =3D { + .reset =3D drm_atomic_helper_crtc_reset, + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, +}; + +static const struct drm_encoder_funcs arcpgu_encoder_funcs =3D { + .destroy =3D drm_encoder_cleanup, +}; + static int arcpgu_load(struct arcpgu_drm_private *arcpgu) { struct platform_device *pdev =3D to_platform_device(arcpgu->drm.dev); @@ -254,6 +325,9 @@ static int arcpgu_load(struct arcpgu_drm_private *arcpg= u) struct device_node *endpoint_node =3D NULL; struct drm_connector *connector =3D NULL; struct drm_device *drm =3D &arcpgu->drm; + struct drm_plane *plane; + struct drm_encoder *encoder; + struct drm_crtc *crtc; int ret; =20 arcpgu->clk =3D devm_clk_get(drm->dev, "pxlclk"); @@ -301,12 +375,35 @@ static int arcpgu_load(struct arcpgu_drm_private *arc= pgu) return ret; } =20 - ret =3D drm_simple_display_pipe_init(drm, &arcpgu->pipe, &arc_pgu_pipe_fu= ncs, - arc_pgu_supported_formats, - ARRAY_SIZE(arc_pgu_supported_formats), - NULL, connector); + plane =3D &arcpgu->plane; + ret =3D drm_universal_plane_init(drm, plane, 0, + &arcpgu_plane_funcs, + arc_pgu_supported_formats, + ARRAY_SIZE(arc_pgu_supported_formats), + NULL, + DRM_PLANE_TYPE_PRIMARY, NULL); if (ret) return ret; + drm_plane_helper_add(plane, &arcpgu_plane_helper_funcs); + + crtc =3D &arcpgu->crtc; + ret =3D drm_crtc_init_with_planes(drm, crtc, plane, NULL, + &arcpgu_crtc_funcs, NULL); + if (ret) + return ret; + drm_crtc_helper_add(crtc, &arcpgu_crtc_helper_funcs); + + encoder =3D &arcpgu->encoder; + ret =3D drm_encoder_init(drm, encoder, &arcpgu_encoder_funcs, DRM_MODE_EN= CODER_NONE, NULL); + if (ret) + return ret; + encoder->possible_crtcs =3D drm_crtc_mask(crtc); + + if (connector) { + ret =3D drm_connector_attach_encoder(connector, encoder); + if (ret) + return ret; + } =20 if (encoder_node) { /* Locate drm bridge from the hdmi encoder DT node */ @@ -315,7 +412,7 @@ static int arcpgu_load(struct arcpgu_drm_private *arcpg= u) if (!bridge) return -EPROBE_DEFER; =20 - ret =3D drm_simple_display_pipe_attach_bridge(&arcpgu->pipe, bridge); + ret =3D drm_bridge_attach(encoder, bridge, NULL, 0); if (ret) return ret; } @@ -342,7 +439,7 @@ static int arcpgu_show_pxlclock(struct seq_file *m, voi= d *arg) struct drm_device *drm =3D node->minor->dev; struct arcpgu_drm_private *arcpgu =3D dev_to_arcpgu(drm); unsigned long clkrate =3D clk_get_rate(arcpgu->clk); - unsigned long mode_clock =3D arcpgu->pipe.crtc.mode.crtc_clock * 1000; + unsigned long mode_clock =3D arcpgu->crtc.mode.crtc_clock * 1000; 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Move callbacks to plane and CRTC helpers, with vblank handling through drm_crtc_funcs. This removes intermediate simple-pipe layer and uses standard atomic helper wiring. Signed-off-by: Ze Huang --- drivers/gpu/drm/aspeed/aspeed_gfx.h | 5 +- drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 156 +++++++++++++++++++++++----= ---- drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 3 +- 3 files changed, 123 insertions(+), 41 deletions(-) diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/a= speed_gfx.h index 4e6a442c3886..a34811564c0d 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h @@ -2,7 +2,6 @@ /* Copyright 2018 IBM Corporation */ =20 #include -#include =20 struct aspeed_gfx { struct drm_device drm; @@ -17,7 +16,9 @@ struct aspeed_gfx { u32 throd_val; u32 scan_line_max; =20 - struct drm_simple_display_pipe pipe; + struct drm_plane plane; + struct drm_crtc crtc; + struct drm_encoder encoder; struct drm_connector connector; }; #define to_aspeed_gfx(x) container_of(x, struct aspeed_gfx, drm) diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c b/drivers/gpu/drm/asp= eed/aspeed_gfx_crtc.c index 7877a57b8e26..3294795c31c4 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c @@ -5,6 +5,8 @@ #include #include =20 +#include +#include #include #include #include @@ -12,20 +14,13 @@ #include #include #include -#include #include =20 #include "aspeed_gfx.h" =20 -static struct aspeed_gfx * -drm_pipe_to_aspeed_gfx(struct drm_simple_display_pipe *pipe) -{ - return container_of(pipe, struct aspeed_gfx, pipe); -} - static int aspeed_gfx_set_pixel_fmt(struct aspeed_gfx *priv, u32 *bpp) { - struct drm_crtc *crtc =3D &priv->pipe.crtc; + struct drm_crtc *crtc =3D &priv->crtc; struct drm_device *drm =3D crtc->dev; const u32 format =3D crtc->primary->state->fb->format->format; u32 ctrl1; @@ -79,7 +74,7 @@ static void aspeed_gfx_disable_controller(struct aspeed_g= fx *priv) =20 static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv) { - struct drm_display_mode *m =3D &priv->pipe.crtc.state->adjusted_mode; + struct drm_display_mode *m =3D &priv->crtc.state->adjusted_mode; u32 ctrl1, d_offset, t_count, bpp; int err; =20 @@ -139,33 +134,31 @@ static void aspeed_gfx_crtc_mode_set_nofb(struct aspe= ed_gfx *priv) writel(priv->throd_val, priv->base + CRT_THROD); } =20 -static void aspeed_gfx_pipe_enable(struct drm_simple_display_pipe *pipe, - struct drm_crtc_state *crtc_state, - struct drm_plane_state *plane_state) +static void aspeed_gfx_crtc_helper_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); - struct drm_crtc *crtc =3D &pipe->crtc; + struct aspeed_gfx *priv =3D container_of(crtc, struct aspeed_gfx, crtc); =20 aspeed_gfx_crtc_mode_set_nofb(priv); aspeed_gfx_enable_controller(priv); drm_crtc_vblank_on(crtc); } =20 -static void aspeed_gfx_pipe_disable(struct drm_simple_display_pipe *pipe) +static void aspeed_gfx_crtc_helper_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); - struct drm_crtc *crtc =3D &pipe->crtc; + struct aspeed_gfx *priv =3D container_of(crtc, struct aspeed_gfx, crtc); =20 drm_crtc_vblank_off(crtc); aspeed_gfx_disable_controller(priv); } =20 -static void aspeed_gfx_pipe_update(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *plane_state) +static void aspeed_gfx_plane_helper_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *state) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); - struct drm_crtc *crtc =3D &pipe->crtc; - struct drm_framebuffer *fb =3D pipe->plane.state->fb; + struct aspeed_gfx *priv =3D container_of(plane, struct aspeed_gfx, plane); + struct drm_crtc *crtc =3D &priv->crtc; + struct drm_framebuffer *fb =3D plane->state->fb; struct drm_pending_vblank_event *event; struct drm_gem_dma_object *gem; =20 @@ -190,9 +183,9 @@ static void aspeed_gfx_pipe_update(struct drm_simple_di= splay_pipe *pipe, writel(gem->dma_addr, priv->base + CRT_ADDR); } =20 -static int aspeed_gfx_enable_vblank(struct drm_simple_display_pipe *pipe) +static int aspeed_gfx_crtc_enable_vblank(struct drm_crtc *crtc) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); + struct aspeed_gfx *priv =3D container_of(crtc, struct aspeed_gfx, crtc); u32 reg =3D readl(priv->base + CRT_CTRL1); =20 /* Clear pending VBLANK IRQ */ @@ -204,9 +197,9 @@ static int aspeed_gfx_enable_vblank(struct drm_simple_d= isplay_pipe *pipe) return 0; } =20 -static void aspeed_gfx_disable_vblank(struct drm_simple_display_pipe *pipe) +static void aspeed_gfx_crtc_disable_vblank(struct drm_crtc *crtc) { - struct aspeed_gfx *priv =3D drm_pipe_to_aspeed_gfx(pipe); + struct aspeed_gfx *priv =3D container_of(crtc, struct aspeed_gfx, crtc); u32 reg =3D readl(priv->base + CRT_CTRL1); =20 reg &=3D ~CRT_CTRL_VERTICAL_INTR_EN; @@ -216,12 +209,75 @@ static void aspeed_gfx_disable_vblank(struct drm_simp= le_display_pipe *pipe) writel(reg | CRT_CTRL_VERTICAL_INTR_STS, priv->base + CRT_CTRL1); } =20 -static const struct drm_simple_display_pipe_funcs aspeed_gfx_funcs =3D { - .enable =3D aspeed_gfx_pipe_enable, - .disable =3D aspeed_gfx_pipe_disable, - .update =3D aspeed_gfx_pipe_update, - .enable_vblank =3D aspeed_gfx_enable_vblank, - .disable_vblank =3D aspeed_gfx_disable_vblank, +static int aspeed_gfx_plane_helper_atomic_check(struct drm_plane *plane, + struct drm_atomic_commit *state) +{ + struct drm_plane_state *plane_state =3D drm_atomic_get_new_plane_state(st= ate, plane); + struct drm_crtc *crtc =3D plane_state->crtc; + struct drm_crtc_state *crtc_state =3D NULL; + int ret; + + if (crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(state, crtc); + + ret =3D drm_atomic_helper_check_plane_state(plane_state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); + return ret; +} + +static const struct drm_plane_helper_funcs aspeed_gfx_plane_helper_funcs = =3D { + .prepare_fb =3D drm_gem_plane_helper_prepare_fb, + .atomic_check =3D aspeed_gfx_plane_helper_atomic_check, + .atomic_update =3D aspeed_gfx_plane_helper_atomic_update, +}; + +static const struct drm_plane_funcs aspeed_gfx_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + .destroy =3D drm_plane_cleanup, + .reset =3D drm_atomic_helper_plane_reset, + .atomic_duplicate_state =3D drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_plane_destroy_state, +}; + +static int aspeed_gfx_crtc_helper_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_commit *state) +{ + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(state= , crtc); + int ret; + + if (!crtc_state->enable) + goto out; + + ret =3D drm_atomic_helper_check_crtc_primary_plane(crtc_state); + if (ret) + return ret; + +out: + return drm_atomic_add_affected_planes(state, crtc); +} + +static const struct drm_crtc_helper_funcs aspeed_gfx_crtc_helper_funcs =3D= { + .atomic_check =3D aspeed_gfx_crtc_helper_atomic_check, + .atomic_enable =3D aspeed_gfx_crtc_helper_atomic_enable, + .atomic_disable =3D aspeed_gfx_crtc_helper_atomic_disable, +}; + +static const struct drm_crtc_funcs aspeed_gfx_crtc_funcs =3D { + .reset =3D drm_atomic_helper_crtc_reset, + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, + .enable_vblank =3D aspeed_gfx_crtc_enable_vblank, + .disable_vblank =3D aspeed_gfx_crtc_disable_vblank, +}; + +static const struct drm_encoder_funcs aspeed_gfx_encoder_funcs =3D { + .destroy =3D drm_encoder_cleanup, }; =20 static const uint32_t aspeed_gfx_formats[] =3D { @@ -232,10 +288,36 @@ static const uint32_t aspeed_gfx_formats[] =3D { int aspeed_gfx_create_pipe(struct drm_device *drm) { struct aspeed_gfx *priv =3D to_aspeed_gfx(drm); + struct drm_plane *plane =3D &priv->plane; + struct drm_crtc *crtc =3D &priv->crtc; + struct drm_encoder *encoder =3D &priv->encoder; + int ret; + + ret =3D drm_universal_plane_init(drm, plane, 0, + &aspeed_gfx_plane_funcs, + aspeed_gfx_formats, + ARRAY_SIZE(aspeed_gfx_formats), + NULL, + DRM_PLANE_TYPE_PRIMARY, NULL); + if (ret) + return ret; + drm_plane_helper_add(plane, &aspeed_gfx_plane_helper_funcs); + + ret =3D drm_crtc_init_with_planes(drm, crtc, plane, NULL, + &aspeed_gfx_crtc_funcs, NULL); + if (ret) + return ret; + drm_crtc_helper_add(crtc, &aspeed_gfx_crtc_helper_funcs); + + ret =3D drm_encoder_init(drm, encoder, &aspeed_gfx_encoder_funcs, + DRM_MODE_ENCODER_NONE, NULL); + if (ret) + return ret; + encoder->possible_crtcs =3D drm_crtc_mask(crtc); + + ret =3D drm_connector_attach_encoder(&priv->connector, encoder); + if (ret) + return ret; =20 - return drm_simple_display_pipe_init(drm, &priv->pipe, &aspeed_gfx_funcs, - aspeed_gfx_formats, - ARRAY_SIZE(aspeed_gfx_formats), - NULL, - &priv->connector); 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Keep no-scaling plane check and GEM framebuffer prepare callback from simple-KMS path. Only touch hardware state when framebuffer exists, since atomic plane updates can run on disabling transitions. Signed-off-by: Ze Huang --- drivers/gpu/drm/imx/lcdc/imx-lcdc.c | 178 ++++++++++++++++++++++++++------= ---- 1 file changed, 130 insertions(+), 48 deletions(-) diff --git a/drivers/gpu/drm/imx/lcdc/imx-lcdc.c b/drivers/gpu/drm/imx/lcdc= /imx-lcdc.c index f52832b43aca..d091dc562098 100644 --- a/drivers/gpu/drm/imx/lcdc/imx-lcdc.c +++ b/drivers/gpu/drm/imx/lcdc/imx-lcdc.c @@ -14,9 +14,9 @@ #include #include #include +#include #include #include -#include #include #include #include @@ -102,7 +102,9 @@ =20 struct imx_lcdc { struct drm_device drm; - struct drm_simple_display_pipe pipe; + struct drm_plane plane; + struct drm_crtc crtc; + struct drm_encoder encoder; struct drm_connector *connector; void __iomem *base; =20 @@ -135,14 +137,13 @@ static unsigned int imx_lcdc_get_format(unsigned int = drm_format) } } =20 -static void imx_lcdc_update_hw_registers(struct drm_simple_display_pipe *p= ipe, +static void imx_lcdc_update_hw_registers(struct drm_crtc *crtc, struct drm_plane_state *old_state, bool mode_set) { - struct drm_crtc *crtc =3D &pipe->crtc; - struct drm_plane_state *new_state =3D pipe->plane.state; + struct drm_plane_state *new_state =3D crtc->primary->state; struct drm_framebuffer *fb =3D new_state->fb; - struct imx_lcdc *lcdc =3D imx_lcdc_from_drmdev(pipe->crtc.dev); + struct imx_lcdc *lcdc =3D imx_lcdc_from_drmdev(crtc->dev); u32 lpcr, lvcr, lhcr; u32 framesize; dma_addr_t addr; @@ -188,16 +189,16 @@ static void imx_lcdc_update_hw_registers(struct drm_s= imple_display_pipe *pipe, clk_prepare_enable(lcdc->clk_per); } =20 -static void imx_lcdc_pipe_enable(struct drm_simple_display_pipe *pipe, - struct drm_crtc_state *crtc_state, - struct drm_plane_state *plane_state) +static void imx_lcdc_crtc_helper_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { int ret; int clk_div; int bpp; - struct imx_lcdc *lcdc =3D imx_lcdc_from_drmdev(pipe->crtc.dev); - struct drm_display_mode *mode =3D &pipe->crtc.mode; + struct imx_lcdc *lcdc =3D imx_lcdc_from_drmdev(crtc->dev); + struct drm_display_mode *mode =3D &crtc->mode; struct drm_display_info *disp_info =3D &lcdc->connector->display_info; + struct drm_plane_state *plane_state =3D crtc->primary->state; const int hsync_pol =3D (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : 1; const int vsync_pol =3D (mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : 1; const int data_enable_pol =3D @@ -231,34 +232,34 @@ static void imx_lcdc_pipe_enable(struct drm_simple_di= splay_pipe *pipe, =20 ret =3D clk_prepare_enable(lcdc->clk_ipg); if (ret) { - dev_err(pipe->crtc.dev->dev, "Cannot enable ipg clock: %pe\n", ERR_PTR(r= et)); + dev_err(crtc->dev->dev, "Cannot enable ipg clock: %pe\n", ERR_PTR(ret)); return; } ret =3D clk_prepare_enable(lcdc->clk_ahb); if (ret) { - dev_err(pipe->crtc.dev->dev, "Cannot enable ahb clock: %pe\n", ERR_PTR(r= et)); + dev_err(crtc->dev->dev, "Cannot enable ahb clock: %pe\n", ERR_PTR(ret)); =20 clk_disable_unprepare(lcdc->clk_ipg); =20 return; } =20 - imx_lcdc_update_hw_registers(pipe, NULL, true); + imx_lcdc_update_hw_registers(crtc, NULL, true); =20 /* Enable VBLANK Interrupt */ writel(INTR_EOF, lcdc->base + IMX21LCDC_LIER); } =20 -static void imx_lcdc_pipe_disable(struct drm_simple_display_pipe *pipe) +static void imx_lcdc_crtc_helper_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { - struct imx_lcdc *lcdc =3D imx_lcdc_from_drmdev(pipe->crtc.dev); - struct drm_crtc *crtc =3D &lcdc->pipe.crtc; + struct imx_lcdc *lcdc =3D imx_lcdc_from_drmdev(crtc->dev); struct drm_pending_vblank_event *event; =20 clk_disable_unprepare(lcdc->clk_ahb); clk_disable_unprepare(lcdc->clk_ipg); =20 - if (pipe->crtc.enabled) + if (crtc->enabled) clk_disable_unprepare(lcdc->clk_per); =20 spin_lock_irq(&lcdc->drm.event_lock); @@ -273,17 +274,18 @@ static void imx_lcdc_pipe_disable(struct drm_simple_d= isplay_pipe *pipe) writel(0, lcdc->base + IMX21LCDC_LIER); } =20 -static int imx_lcdc_pipe_check(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *plane_state, - struct drm_crtc_state *crtc_state) +static int imx_lcdc_crtc_helper_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_commit *state) { + struct drm_crtc_state *crtc_state =3D drm_atomic_get_new_crtc_state(state= , crtc); const struct drm_display_mode *mode =3D &crtc_state->mode; - const struct drm_display_mode *old_mode =3D &pipe->crtc.state->mode; + const struct drm_display_mode *old_mode =3D &crtc->state->mode; + int ret; =20 if (mode->hdisplay < LCDC_MIN_XRES || mode->hdisplay > LCDC_MAX_XRES || mode->vdisplay < LCDC_MIN_YRES || mode->vdisplay > LCDC_MAX_YRES || mode->hdisplay % 0x10) { /* must be multiple of 16 */ - drm_err(pipe->crtc.dev, "unsupported display mode (%u x %u)\n", + drm_err(crtc->dev, "unsupported display mode (%u x %u)\n", mode->hdisplay, mode->vdisplay); return -EINVAL; } @@ -292,27 +294,42 @@ static int imx_lcdc_pipe_check(struct drm_simple_disp= lay_pipe *pipe, old_mode->hdisplay !=3D mode->hdisplay || old_mode->vdisplay !=3D mode->vdisplay; =20 - return 0; + if (!crtc_state->enable) + goto out; + + ret =3D drm_atomic_helper_check_crtc_primary_plane(crtc_state); + if (ret) + return ret; + +out: + return drm_atomic_add_affected_planes(state, crtc); } =20 -static void imx_lcdc_pipe_update(struct drm_simple_display_pipe *pipe, - struct drm_plane_state *old_state) +static void imx_lcdc_plane_helper_atomic_update(struct drm_plane *plane, + struct drm_atomic_commit *state) { - struct drm_crtc *crtc =3D &pipe->crtc; - struct drm_pending_vblank_event *event =3D crtc->state->event; - struct drm_plane_state *new_state =3D pipe->plane.state; + struct drm_plane_state *old_state =3D drm_atomic_get_old_plane_state(stat= e, plane); + struct drm_plane_state *new_state =3D plane->state; + struct drm_crtc *crtc =3D new_state->crtc ?: old_state->crtc; + struct drm_pending_vblank_event *event; struct drm_framebuffer *fb =3D new_state->fb; struct drm_framebuffer *old_fb =3D old_state->fb; struct drm_crtc *old_crtc =3D old_state->crtc; bool mode_changed =3D false; =20 - if (old_fb && old_fb->format !=3D fb->format) - mode_changed =3D true; - else if (old_crtc !=3D crtc) - mode_changed =3D true; + if (!crtc) + return; =20 - imx_lcdc_update_hw_registers(pipe, old_state, mode_changed); + if (fb) { + if (old_fb && old_fb->format !=3D fb->format) + mode_changed =3D true; + else if (old_crtc !=3D crtc) + mode_changed =3D true; =20 + imx_lcdc_update_hw_registers(crtc, old_state, mode_changed); + } + + event =3D crtc->state->event; if (event) { crtc->state->event =3D NULL; =20 @@ -327,11 +344,56 @@ static void imx_lcdc_pipe_update(struct drm_simple_di= splay_pipe *pipe, } } =20 -static const struct drm_simple_display_pipe_funcs imx_lcdc_pipe_funcs =3D { - .enable =3D imx_lcdc_pipe_enable, - .disable =3D imx_lcdc_pipe_disable, - .check =3D imx_lcdc_pipe_check, - .update =3D imx_lcdc_pipe_update, +static int imx_lcdc_plane_helper_atomic_check(struct drm_plane *plane, + struct drm_atomic_commit *state) +{ + struct drm_plane_state *plane_state =3D drm_atomic_get_new_plane_state(st= ate, plane); + struct drm_crtc *crtc =3D plane_state->crtc; + struct drm_crtc_state *crtc_state =3D NULL; + int ret; + + if (crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(state, crtc); + + ret =3D drm_atomic_helper_check_plane_state(plane_state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); + return ret; +} + +static const struct drm_plane_helper_funcs imx_lcdc_plane_helper_funcs =3D= { + .prepare_fb =3D drm_gem_plane_helper_prepare_fb, + .atomic_check =3D imx_lcdc_plane_helper_atomic_check, + .atomic_update =3D imx_lcdc_plane_helper_atomic_update, +}; + +static const struct drm_plane_funcs imx_lcdc_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + .destroy =3D drm_plane_cleanup, + .reset =3D drm_atomic_helper_plane_reset, + .atomic_duplicate_state =3D drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_plane_destroy_state, +}; + +static const struct drm_crtc_helper_funcs imx_lcdc_crtc_helper_funcs =3D { + .atomic_check =3D imx_lcdc_crtc_helper_atomic_check, + .atomic_enable =3D imx_lcdc_crtc_helper_atomic_enable, + .atomic_disable =3D imx_lcdc_crtc_helper_atomic_disable, +}; + +static const struct drm_crtc_funcs imx_lcdc_crtc_funcs =3D { + .reset =3D drm_atomic_helper_crtc_reset, + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, +}; + +static const struct drm_encoder_funcs imx_lcdc_encoder_funcs =3D { + .destroy =3D drm_encoder_cleanup, }; =20 static const struct drm_mode_config_funcs imx_lcdc_mode_config_funcs =3D { @@ -369,7 +431,7 @@ MODULE_DEVICE_TABLE(of, imx_lcdc_of_dev_id); static irqreturn_t imx_lcdc_irq_handler(int irq, void *arg) { struct imx_lcdc *lcdc =3D arg; - struct drm_crtc *crtc =3D &lcdc->pipe.crtc; + struct drm_crtc *crtc =3D &lcdc->crtc; unsigned int status; =20 status =3D readl(lcdc->base + IMX21LCDC_LISR); @@ -387,6 +449,9 @@ static int imx_lcdc_probe(struct platform_device *pdev) struct imx_lcdc *lcdc; struct drm_device *drm; struct drm_bridge *bridge; + struct drm_plane *plane; + struct drm_crtc *crtc; + struct drm_encoder *encoder; int irq; int ret; struct device *dev =3D &pdev->dev; @@ -428,23 +493,40 @@ static int imx_lcdc_probe(struct platform_device *pde= v) if (ret) return dev_err_probe(dev, ret, "Cannot initialize mode configuration str= ucture\n"); =20 - /* CRTC, Plane, Encoder */ - ret =3D drm_simple_display_pipe_init(drm, &lcdc->pipe, - &imx_lcdc_pipe_funcs, - imx_lcdc_formats, - ARRAY_SIZE(imx_lcdc_formats), NULL, NULL); + plane =3D &lcdc->plane; + ret =3D drm_universal_plane_init(drm, plane, 0, + &imx_lcdc_plane_funcs, + imx_lcdc_formats, + ARRAY_SIZE(imx_lcdc_formats), + NULL, + DRM_PLANE_TYPE_PRIMARY, NULL); + if (ret < 0) + return dev_err_probe(drm->dev, ret, "Cannot initialize primary plane\n"); + drm_plane_helper_add(plane, &imx_lcdc_plane_helper_funcs); + + crtc =3D &lcdc->crtc; + ret =3D drm_crtc_init_with_planes(drm, crtc, plane, NULL, + &imx_lcdc_crtc_funcs, NULL); + if (ret < 0) + return dev_err_probe(drm->dev, ret, "Cannot initialize CRTC\n"); + drm_crtc_helper_add(crtc, &imx_lcdc_crtc_helper_funcs); + + encoder =3D &lcdc->encoder; + ret =3D drm_encoder_init(drm, encoder, &imx_lcdc_encoder_funcs, + DRM_MODE_ENCODER_NONE, NULL); if (ret < 0) - return dev_err_probe(drm->dev, ret, "Cannot setup simple display pipe\n"= ); + return dev_err_probe(drm->dev, ret, "Cannot initialize encoder\n"); + encoder->possible_crtcs =3D drm_crtc_mask(crtc); =20 ret =3D drm_vblank_init(drm, drm->mode_config.num_crtc); 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Keep FIFO, event and framebuffer update sequencing intact, and install GEM framebuffer prepare callback explicitly. Signed-off-by: Ze Huang --- drivers/gpu/drm/mcde/mcde_display.c | 162 +++++++++++++++++++++++++++-----= ---- drivers/gpu/drm/mcde/mcde_drm.h | 6 +- drivers/gpu/drm/mcde/mcde_drv.c | 3 +- 3 files changed, 129 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/mcde/mcde_display.c b/drivers/gpu/drm/mcde/mcd= e_display.c index 257a6e84dd58..4d86fa5030eb 100644 --- a/drivers/gpu/drm/mcde/mcde_display.c +++ b/drivers/gpu/drm/mcde/mcde_display.c @@ -10,6 +10,7 @@ #include #include =20 +#include #include #include #include @@ -18,7 +19,6 @@ #include #include #include -#include #include #include #include