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From: Ross Lagerwall To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Daniel P. Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Ross Lagerwall Subject: [PATCH v1 8/8] x86: Cleanup cr0.TS flag handling Date: Thu, 19 Mar 2026 13:29:24 +0000 Message-ID: <20260319132924.1469809-9-ross.lagerwall@citrix.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260319132924.1469809-1-ross.lagerwall@citrix.com> References: <20260319132924.1469809-1-ross.lagerwall@citrix.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: LO4P123CA0386.GBRP123.PROD.OUTLOOK.COM (2603:10a6:600:18f::13) To DS0PR03MB8272.namprd03.prod.outlook.com (2603:10b6:8:28f::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR03MB8272:EE_|SA5PR03MB989126:EE_ X-MS-Office365-Filtering-Correlation-Id: d151aaed-d82d-476c-06b0-08de85bb9cea X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|18002099003|56012099003|22082099003; X-Microsoft-Antispam-Message-Info: K+D7OHr7VF72xv+793Yv9oP+I2jIrVZc459Fc6EpgKidupw4IEEzv6OgSf2+TNzdrQtoPrU+deL6ue7SsHs8L1Yw3+Lmkw/TPuiJEOAFv5bGuGZftthwHd89y+pvEoTHSpmaAkcceahPJK4zj9i6a6cGzCtt3Gyk5y3zIgk8LI14x+9KqJBTUU+o6zwqv5BpWrig490W134fhsrFx1WVc5Zp35Sb16L2uc2+cuuHPs6oHoVc1E+mzqw70v/czLp7ftaKE69/ovcMQnh9dU1uP1CTIiHsXuzFiYkZrEOePE95MFYXr+4LOSWcHm/y1xJAi1l6IPNn8brF9b8bpkYAmy11YqbIiwzPGFV+EnpypN58R3SoKBbONTU8ixcKvPsSqNc3/culPR10BEDiSO5KDevOO4vXscAChRPNQzpy+PVs2Ab1DUFU5w0jagGxG9lIYSr2j90FqJJkHE2lF5vCJyPn0CZyWhZxoySKJuFH8MDz1OeU1bvbOxlZxYDc/pvqu9DBjU6IFV8N+7r63rMAQcAJPqh1XUpb/L9FcCMb7OxlB2Wm6yr+wZpzXilGUi98FrxN3h+d3IhKpw13K7VBOPk6C6yhXuOfz+qfG0KPMBFZ/CJ4MWyyi09DHAJwIWpHbb1vvnryK2hn3MQEv9tnVaxHSy+HwdQu+pM3UYacBgkbA12auc5ejGObM48TK5IBntxT+/WnQbrZiUnFOu45yR9C1Efkqwm7IrxAP6da5xU= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DS0PR03MB8272.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(376014)(18002099003)(56012099003)(22082099003);DIR:OUT;SFP:1101; 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charset="utf-8" With lazy FPU removed, Xen does not need to touch the cr0.TS flag on context switch except when saving/restoring the FPU for a PV guest. Signed-off-by: Ross Lagerwall --- xen/arch/x86/cpu/common.c | 3 --- xen/arch/x86/hvm/emulate.c | 14 ++------------ xen/arch/x86/i387.c | 22 +++------------------- xen/arch/x86/include/asm/i387.h | 1 - xen/common/efi/runtime.c | 2 +- 5 files changed, 6 insertions(+), 36 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 5d0523a78b52..04a049f01c07 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -883,9 +883,6 @@ void cpu_init(void) /* Install correct page table. */ write_ptbase(current); =20 - /* Ensure FPU gets initialised for each domain. */ - stts(); - /* Reset debug registers: */ write_debugreg(0, 0); write_debugreg(1, 0); diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 48c7320360c7..f3aae158e9f8 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2527,14 +2527,8 @@ static int cf_check hvmemul_get_fpu( * Latch current register state so that we can back out changes * if needed (namely when a memory write fails after register state * has already been updated). - * NB: We don't really need the "enable" part of the called functi= on - * (->fpu_dirtied set implies CR0.TS clear), but the additional - * overhead should be low enough to not warrant introduction of yet - * another slightly different function. However, we need to undo t= he - * ->fpu_dirtied clearing the function does as well as the possible - * masking of all exceptions by FNSTENV.) */ - save_fpu_enable(); + vcpu_save_fpu(curr); if ( (fpu_ctxt->fcw & 0x3f) !=3D 0x3f ) { uint16_t fcw; @@ -2572,12 +2566,8 @@ static void cf_check hvmemul_put_fpu( * Latch current register state so that we can replace FIP/FDP/FOP * (which have values resulting from our own invocation of the FPU * instruction during emulation). - * NB: See also the comment in hvmemul_get_fpu(); we don't need to - * set ->fpu_dirtied here as it is going to be cleared below, and - * we also don't need to reload FCW as we're forcing full state to - * be reloaded anyway. */ - save_fpu_enable(); + vcpu_save_fpu(curr); =20 if ( boot_cpu_has(X86_FEATURE_FDP_EXCP_ONLY) && !(fpu_ctxt->fsw & ~fpu_ctxt->fcw & 0x003f) ) diff --git a/xen/arch/x86/i387.c b/xen/arch/x86/i387.c index 9acaaf4673df..336bc83b6e13 100644 --- a/xen/arch/x86/i387.c +++ b/xen/arch/x86/i387.c @@ -176,9 +176,6 @@ void vcpu_restore_fpu(struct vcpu *v) { ASSERT(!is_idle_vcpu(v)); =20 - /* Avoid recursion */ - clts(); - if ( cpu_has_xsave ) fpu_xrstor(v, XSTATE_ALL); else @@ -193,31 +190,18 @@ void vcpu_restore_fpu(struct vcpu *v) * On each context switch, save the necessary FPU info of VCPU being switc= h=20 * out. It dispatches saving operation based on CPU's capability. */ -static bool _vcpu_save_fpu(struct vcpu *v) +void vcpu_save_fpu(struct vcpu *v) { ASSERT(!is_idle_vcpu(v)); =20 /* This can happen, if a paravirtualised guest OS has set its CR0.TS. = */ - clts(); + if ( is_pv_vcpu(v) ) + clts(); =20 if ( cpu_has_xsave ) fpu_xsave(v); else fpu_fxsave(v); - - return true; -} - -void vcpu_save_fpu(struct vcpu *v) -{ - _vcpu_save_fpu(v); - stts(); -} - -void save_fpu_enable(void) -{ - if ( !_vcpu_save_fpu(current) ) - clts(); } =20 /* Initialize FPU's context save area */ diff --git a/xen/arch/x86/include/asm/i387.h b/xen/arch/x86/include/asm/i38= 7.h index fe5e4419b6f4..0717005d31f0 100644 --- a/xen/arch/x86/include/asm/i387.h +++ b/xen/arch/x86/include/asm/i387.h @@ -29,7 +29,6 @@ struct ix87_env { =20 void vcpu_restore_fpu(struct vcpu *v); void vcpu_save_fpu(struct vcpu *v); -void save_fpu_enable(void); int vcpu_init_fpu(struct vcpu *v); void vcpu_destroy_fpu(struct vcpu *v); =20 diff --git a/xen/common/efi/runtime.c b/xen/common/efi/runtime.c index 982e42e8f341..0f1cc765ec5e 100644 --- a/xen/common/efi/runtime.c +++ b/xen/common/efi/runtime.c @@ -94,7 +94,7 @@ struct efi_rs_state efi_rs_enter(void) return state; =20 state.cr3 =3D read_cr3(); - save_fpu_enable(); + vcpu_save_fpu(current); asm volatile ( "fnclex; fldcw %0" :: "m" (fcw) ); asm volatile ( "ldmxcsr %0" :: "m" (mxcsr) ); =20 --=20 2.53.0