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[92.22.18.152]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483a31f0330sm241787025e9.9.2026.02.23.09.08.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Feb 2026 09:08:58 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 590e3ee4-10da-11f1-9ccf-f158ae23cfc8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1771866540; x=1772471340; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=z9goABibW6F5ClxCUwPd0b9Zafr4H2ZAyBuwnOzWKO0=; b=jYEU1sZAXBiVsQiXp08RaBmgqaSsM0TSQUDmCqMs1x3a3IS+ui5Y+BFMQtUQWzcnew qikIr5xQ73pOQOBbt9yIT6L5W7EjTFh16tUGqXffqOFZYz9F4M6veqPzzJJuoeYiPhaT QNmIQKUwEOAktIruxCFVUJeqoLhH7feQlrRsw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771866540; x=1772471340; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=z9goABibW6F5ClxCUwPd0b9Zafr4H2ZAyBuwnOzWKO0=; b=mnUzkvd8QfwUNIIxI55xaGVrFZnatIJLninf1/HuB0A6C9iwPrETkRt+UqHKDTXoB8 7C5Yq7wY+g3uEqaRqN5W8uJP8hRTdkmkGxzSW66akvfmErSuAjtZnIzS/2TkSjEOOrTU rEA8X5JX1G+ZXC38oxy60WpIEhrF2KTPH2xKpdj74dyfzxyQr/M5VoXbDhmTqRXX88jn EWXKrU7LTrwsKKHANCkTlpkCSZJbu8kq4k+nOOztzdSK/k+aUicO+TLTVMMo41Mh5DBf T/yIXV6MPMj0/ovLQkkRV58L6zFGPwHJ4wZEN8NsODuVLvdZDHt9HG4AUcRukhZ78Bm0 u7rw== X-Gm-Message-State: AOJu0YwuKLad8I/e51X6hnXZJ0NoA7PW4Oq8D+JYRDxhaMzVx61lJJKu zOMzHWpLmAD0Da+J5dqjD3XMKgDZCuPSAtEOjNj3bkB7g2pGpXJq1mRfKt4yyR/l8sHCdt+HnUa TGySn X-Gm-Gg: AZuq6aL7wfWFvNJHIopoRa6cGO/RwR6fMG4rOgnUxwQ1KmzpYQKnvny1OF7CtA4De1x 7YNnVnX0rs9RNHplV6vpAU2wwdUGEvl9+WrtuDLv6p4ESJU5haj4d1Sv9EVpkMD2yNIqltlJJ2t tTeo9JyYuYDksCZx4hQIMnhyVYSN/kf19tBe7sumY7zR3BQZMKPUcXRm3tmwTta9CapEBR/H3cf VybsKhwXMDOxc6qM8z1AGE9pbtS5/dEDEKuLysSPw9LzZCzQc1ON+xnmD53wv8mrdoR7VocJqcf sArTs5h7ow2mLUMAZemRO4KGaR/qQf4VnirgO1p5MwHHO4AcT9sh9p5zcEJLl51PvDy0bKVw0MD fZlUYqEm26aLfst2wo3zPoWDkTee9T80Srh+ndeUoNrfGH7dJdbJi4dpUy33uQQQQcmiQcSdcPD 7w9z8hNBMsYnnggG8EVHRE9qqFK2lVZ9AEGYvaFsyOGEwnk9nJWaMEC5NWY/b4ySszU0+XrVc= X-Received: by 2002:a05:600c:8b44:b0:480:6852:8d94 with SMTP id 5b1f17b1804b1-483a95eabccmr153125545e9.27.1771866539380; Mon, 23 Feb 2026 09:08:59 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH] x86/emul: Remove fallback path from SWAPGS Date: Mon, 23 Feb 2026 17:08:56 +0000 Message-Id: <20260223170856.3594016-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1771866576633158500 In real hardware, accesses to the registers cannot fail. The error paths a= re just an artefact of the hook functions needing to return something. The best effort unwind is also something that doesn't exist in real hardwar= e, and complicates following the logic. Instead, use an ASSERT_UNREACHABLE() with a fallback of injecting #DF. Hitting this path is an error in Xen. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 Tested using LKGS's extention of the test emulator for SWAPGS. --- xen/arch/x86/x86_emulate/0f01.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/x86_emulate/0f01.c b/xen/arch/x86/x86_emulate/0f0= 1.c index 6c10979dd650..760f5f865913 100644 --- a/xen/arch/x86/x86_emulate/0f01.c +++ b/xen/arch/x86/x86_emulate/0f01.c @@ -192,18 +192,21 @@ int x86emul_0f01(struct x86_emulate_state *s, if ( (rc =3D ops->read_segment(x86_seg_gs, &sreg, ctxt)) !=3D X86EMUL_OKAY || (rc =3D ops->read_msr(MSR_SHADOW_GS_BASE, &msr_val, - ctxt)) !=3D X86EMUL_OKAY || - (rc =3D ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, - ctxt, false)) !=3D X86EMUL_OKAY ) + ctxt)) !=3D X86EMUL_OKAY ) goto done; - sreg.base =3D msr_val; - if ( (rc =3D ops->write_segment(x86_seg_gs, &sreg, - ctxt)) !=3D X86EMUL_OKAY ) + if ( (rc =3D ops->write_msr(MSR_SHADOW_GS_BASE, sreg.base, + ctxt, false)) !=3D X86EMUL_OKAY || + (sreg.base =3D msr_val, + (rc =3D ops->write_segment(x86_seg_gs, &sreg, + ctxt)) !=3D X86EMUL_OKAY) ) { - /* Best effort unwind (i.e. no real error checking). */ - if ( ops->write_msr(MSR_SHADOW_GS_BASE, msr_val, - ctxt, false) =3D=3D X86EMUL_EXCEPTION ) - x86_emul_reset_event(ctxt); + /* + * In real hardware, access to the registers cannot fail. It = is + * an error in Xen if the writes fail given that both MSRs have + * equivalent checks. + */ + ASSERT_UNREACHABLE(); + generate_exception(X86_EXC_DF); goto done; } break; --=20 2.39.5